Abstract: An automatic gain control circuit (e.g. for use in a SECAM television receiver) comprising: an input node (2); an output node (40); controllable gain amplifier means (6) having a signal input (4) connected to the input node, a control input (24) and an output (8); automatic gain control means (20) having an input (18) coupled to the output of the controllable gain amplifier means and an output (22) connected to the control input of the controllable gain amplifier means; and divider means (30) having a first signal input (28) coupled to the output of the controllable gain amplifier means, a divide signal input (36) coupled to the input of the automatic gain control means and an output connected to the output node of circuit, whereby the signal produced at the output of the divider means is substantially independent of the signal level produced at the output of the controllable gain amplifier means.

Abstract: A shift register stage responsive to a clock signal having first and second phases, the stage having an input and an output node (206 and 228) and comprising: capacitive storage means (208); switch means (202, 210) connected between the capacitive storage means and the input node of the stage and having a control electrode; and amplifier means (230) connected between the capacitive storage means and the output node of the stage, the switch means being conductive and non-conductive respectively during the first and second phases of the clock signal so that the capacitive storage means is charged during the first phase of the clock signal to a voltage representative of the voltage at the input node of the stage, and the amplifier means being operative during at least the second phase of the clock signal so that the amplifier means produces at the output node of the stage a voltage representative of the voltage on the capacitive storage means, wherein the voltage applied to the control electrode of the switch me

Abstract: Method of adjusting a BORSHT/SLIC circuit and to a circuit arrangement therefor. The BORSHT/SLIC circuit includes a pair of signal paths coupling a receive terminal of a four-wire interface with the terminals of a two-wire subscriber line. An applied current is periodically switched from one to the other of the terminals of the two-wire interface and the gain of at least one of the signal paths is adjusted in response to detected common mode signals induced by the applied current in a signal path coupling the terminals of the two-wire interface with the transmit terminal of the four-wire interface.

Abstract: The invention relates to a crystal controllable oscillator circuit. The oscillator includes an amplifier and an oscillation sustaining feed-back loop coupled between an output and an input of the amplifier the loop including two integrators in series for inhibiting oscillation at crystal overtones. Each integrator provides 90.degree. phase shift independently of the oscillators defining RC product which determines only the gain thereby making the oscillator less sensitive to variations in circuit time constants due to temperature and manufacturing tolerance effects. The invention is particularly suitable for incorporating in integrated circuit form where only a single pin connection is required for the controlling crystal.

Abstract: A notch filter is provided having a low-pass section and a summing section which are capable of being integrated on a single semiconductor chip. The summing section provides an output signal which is the sum of a first component signal proportional to an output signal of the low-pass section and a second component signal proportional to current flowing in a capacitor in the low-pass section such that the high-frequency response of the low pass section is compensated to provide an output signal characteristic of a notch filter.

Abstract: An integrable auto-tuned frequency discriminator is provided having a feedback circuit to tune the discriminator when an input signal having a reference frequency is applied at the input of the frequency discriminator. The input signal is multiplied by a delayed version thereof which is provided by a delay filter. The length of delay is varied by altering the transfer function of the delay filter in response to delay filter control inputs. The discriminator output is coupled to a feedback circuit which generates the control input signals, thereby tuning the delay filter to provide a discriminator output reference level. A control input to the feedback circuit provides the capability to tune the delay filter to a carrier frequency which is offset from the reference frequency. A gate input to the feedback circuit disables the feedback input after the frequency discriminator has been tuned.

Abstract: A combined phase detector and low pass filter comprises charge storage means (10) which is responsive to an input signal (VI) and which is charged to a level dependent upon the magnitude and phase of the input signal in response to a first control signal (S1) which is a digital signal of given frequency. The potential stored in the charge storage means (10) is alternatively gated out by first and second gating circuits (12,14) into an integrating circuit (16) having an output VO. The gating circuits are connected such that the polarity of the connection of the stored potential to the integrating circuit is alternated. The gating circuits are responsive to second and third control signals (S2, S3), respectively, the second and third control signals having a frequency one-half that of the first control signal, and the phase difference between the second and third control signals being 180 degrees.

Abstract: A delay circuit is provided having a low-pass filter and a subtracting circuit which are both integrable on a single semiconductor chip. The subtracting circuit provides an output signal proportional to the difference in magnitude of the delay circuit input signal and a differentiated output signal of the low-pass filter such that the output signal is a phase-delayed version of the input signal. The phase delay provided by the delay circuit is enabled and disabled by a control signal present at a control input to the delay circuit.

Abstract: A phase detector suitable for use in an identification circuitry of a PAL/SECAM Television Receiver or the like for identifying the line sequence, wherein the input of the phase detector is adapted to receive the differential output signals from a frequency discriminator. The phase detector includes a differential amplifier stage adapted to receive the output from the frequency discriminator, a multiplier section adapted to receive switching signals and a current mirror circuit coupled with the outputs of the multiplier section for producing a single-ended output at an output terminal. The differential input signals are multiplied by the switching signals to produce an output signal at the output terminal of the phase detector the sense of which is determined by the phase relationship between the differential input signals and the switching signal.

Abstract: A cancellation circuit which may be utilized in a subscriber loop interface circuit to allow a tone to be supplied in the receive path of the hybrid circuit to be received by the calling subscriber and for cancelling said tone from being transmitted to a called subscriber that is coupled via a carrier channel to the hybrid circuit. The cancellation circuit comprises circuitry responsive to the tone appearing on the transmit path for supplying in-phase and quadrature phase signals at the frequency of this tone to cancel the same to prohibit transmission thereof while simultaneously varying the output impedance of the hybrid circuit at the frequency of the applied tone.

Abstract: A modulator receiving an analog input signal and a switching signal for providing an amplitude modulated output signal. The modulator includes a differential input amplifier coupled to a multiplier wherein the analog input signal is commutated through a load resistor by the switching signals that are supplied to the multiplier. A gating circuit is coupled to the multiplier whereby the analog input signal is commutated to a feedback circuit coupled between the gating circuit and the second input of the differential input amplifier. The feedback circuit produces an output for adjusting the bias potential at the second input of the differential input amplifier to equalize the differential output currents therefrom when the analog input signal is set to a nominal zero level and the gating circuit is activated.

Abstract: A comparison circuit suitable for utilization in a television.

Abstract: A bias control circuit adapted to be utilized with complementary, tracking current sources for use in an audio reproduction system including volume and tone control circuits to optimize the signal to noise ratio of the system at maximum gain without compromising the signal handling capabilities of the system. The bias control circuit includes an interface circuit responsive to an applied volume control signal for varying a bias signal connected to the output of the interface circuit. A second and third circuit are coupled with the output of the interface circuit which are responsive to the bias signal for deriving, respectively, a volume output signal to control the gain of the volume control circuit and a current biasing signal for controlling the bias levels of the tone control circuits. The current biasing signal varys proportionally with increases in the volume control signal from a first level to a second level remaining constant thereafter.

Abstract: A demodulating system to be utilized in Secam television receivers for deriving the R-Y and B-Y chrominance information signals from the frequency modulated Secam RF subcarrier frequencies without the necessity for precise and stable tuned circuits. The demodulating system includes a single discriminator having an electronically tunable center frequency, a remodulator, for producing a reference frequency amplitude modulated by the chrominance information signals which are supplied to a commutator as known, and a feedback circuit coupled between the discriminator and remodulator. The discriminator is selectively tuned to a reference center frequency during each picture line clamp period to produce a zero level output signal.

Abstract: A circuit is disclosed which provides first and second control voltages for controlling the gains of first and second variable gain amplifiers such that the relative gains provided by the first and second amplifiers can be varied while maintaining the total power gain provided by the first and second amplifiers substantially constant. The first and second control voltages are generated by passing first and second primary currents across semiconductor junctions. The first and second primary currents are controlled respectively by first and second secondary currents, the secondary currents being substantially proportional to the square of the respective primary current. The circuit allows the ratio of the secondary currents to be varied while maintaining the sum of the secondary currents substantially constant. The primary currents are thereby varied such that the sum of the squares of the primary currents remains substantially constant.

Abstract: Circuits for a high fidelity sound reproducing system which are suitable for providing treble, bass tone boost and cut functions. The audio input signal is utilized for producing a signal having the magnitude thereof frequency dependent. This frequency dependent signal is divided by a splitter circuit into feedback and feed forward signals and combined with the audio signal to either decrease or increase the magnitude of the audio signal appearing at an output thereof as a function of frequency. The ratio of feedback to feed forward signals produced by the splitter circuit is controlled by a direct current (DC) control voltage applied thereto. Because the control of the frequency dependent signals to vary the function of the circuit is accomplished elsewhere than in signal path of the audio signal the circuit is suitable for providing tone control remotely.

Abstract: A gain controlled audio amplifier for each channel which includes a differential to single ended converter fed by a differential amplifier, the common emitters of which are coupled to balance and volume control circuitry for controlling the amount of current flowing in the amplifier relative to the other three amplifiers. A pair of diodes are connected in back-to-back relationship between the control electrodes of the differential amplifier and receive a signal from an enhancement circuit which controls the amount of signal being applied to the input of the differential amplifier. The enhancement circuit includes a pair of amplifier sections which are connected together so that the output voltage of one increases as the other decreases and vice versa and the decrease of output voltage in either section occurs substantially more rapidly than the increase of output voltage in the other section.

Abstract: The disclosed methods and systems provide a variety of 38 kilohertz signals suitable for use with various stereo decoding circuits. The methods relate to the generation of reference and related rectangular waves and the combination thereof to remove the third harmonic component from the resulting multi-level decoding signal. The disclosed decoding signal generator system structure includes an oscillator, a shift register and a single combiner. The oscillator provides an output signal which is a predetermined multiple of the stereo decoding signal. The shift register derives frequency divided and phase shifted signals from the output signal of the oscillator and the signal combiner to form the stereo decoding signal.

Abstract: The disclosed amplifier has a simple structure which is particularly suited for integrated circuit applications. The amplifier includes a differential amplifier having first and second input terminals across which an input signal is developed. Diodes are connected from each of the input terminals to a circuit node. A reference signal is coupled to the input terminals of the differential amplifier and hence to the diodes. A gain control transistor is connected between the circuit node and ground. The conductance of the gain control transistor varies in response to a gain control signal to thereby control the conductance of the diodes. As the conductances of the diodes increase, less of the input signal voltage is developed across the diodes and hence the gain is decreased and vice versa. The d.c. output voltage remains constant even though the gain is changed.

Abstract: A gain controlled audio amplifier for each channel which includes a differential to single ended converter fed by a differential amplifier, the common emitters of which are coupled to balance and volume control circuitry for controlling the amount of current flowing in the amplifier relative to the other three amplifiers. A pair of diodes are connected in back-to-back relationship between the control electrodes of the differential amplifier and receive a signal from an enhancement circuit which controls the amount of signal being applied to the input of the differential amplifier. The enhancement circuit includes a pair of amplifier sections which are connected together so that the output voltage of one increases as the other decreases and vice versa and the decrease of output voltage in either section occurs substantially more rapidly than the increase of output voltage in the other section.