Abstract: Embodiments of the present invention sets forth a method and system for reducing memory bandwidth requirements for an anti-aliasing operation. The first virtual coverage information for a pixel involved in an anti-aliasing operation is maintained in memory. If a certain operating condition of the anti-aliasing operation deterministically implies the second virtual coverage information for this pixel, the second virtual coverage information, as opposed to the first virtual coverage information, is used in the anti-aliasing operation. In such situations, since the virtual coverage information is implied, it does not have to be accessed from memory, thereby improving overall system performance.

Abstract: A scalable shader architecture is disclosed. In accord with that architecture, a shader includes multiple shader pipelines, each of which can perform processing operations on rasterized pixel data. Shader pipelines can be functionally removed as required, thus preventing a defective shader pipeline from causing a chip rejection. The shader includes a shader distributor that processes rasterized pixel data and then selectively distributes the processed rasterized pixel data to the various shader pipelines, beneficially in a manner that balances workloads. A shader collector formats the outputs of the various shader pipelines into proper order to form shaded pixel data. A shader instruction processor (scheduler) programs the individual shader pipelines to perform their intended tasks.

Abstract: A computer-implemented graphics system has a mode of operation in which primitive coverage information is generated for real sample locations and virtual sample locations for use in anti-aliasing. An individual pixel includes a single real sample location and at least one virtual sample location. A block of real sample locations can be selected to delineate and encompass a region containing a number of virtual sample locations. Pixel attribute values (e.g., z-depth or stencil values) associated with the block of selected real sample locations can be used to associate each virtual sample location within the region with one of the selected real sample locations. The virtual sample location assumes the pixel attribute value of the real sample location with which it is associated.

Abstract: In a raster unit of a graphics processor, a method for bounding region accumulation for graphics rendering. The method includes receiving a plurality of graphics primitives for rasterization in a raster stage of a graphics processor and rasterizing the graphics primitives to generate a plurality pixels related to the graphics primitives and a plurality of respective bounding regions related to the graphics primitives. Upon receiving an accumulation start command, the bounding regions are accumulated in an accumulation register. The accumulation continues until an accumulation stop command is received. The operation results in an accumulated bounding region. Access to the accumulated bounding region is enabled to facilitate a subsequent graphics rendering operation.

Abstract: Data that includes an encoded version of sets of color component values for a block of texels is accessed. The encoded version includes a first set of color component values selected from a pre-encoded version of the sets and a second set of color component values selected from the pre-encoded version of the sets. The first set and the second set correspond to endpoints of a range of colors. The encoded version further includes index values associated with the texels. The first set and the second set and an index value associated with a texel are used to decode a third set of color component values that describes a color for the texel. The index value indicates how to determine the third set using the first set and the second set.

Abstract: Systems and methods used for font filtering may also be used to perform texture blits. Texture data is read in blocks that are coarsely aligned. Font engines may be used to align the texture data as specified by a copy (blit) instruction to provide a finely aligned region of the texture data within a font filter footprint. The finely aligned region is then bilinearly filtered using a “nearest” mode to provide the bit aligned region of the texture map specified by the copy instruction.

Abstract: Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in a fast and efficient manner. One such texture circuit provides an increased number of bilerps for each pixel in a group of pixels, particularly when trilinear or aniso filtering is needed. For trilinear filtering, texels in a first and second level of detail are retrieved for a number of pixels during a clock cycle. When aniso filtering is performed, multiple bilerps can be retrieved for each of a number of pixels during one clock cycle.

Abstract: Systems and methods for identifying pixels that are inside a two-dimensional path may be used to fill the path. The path is segmented and a slope direction is determined for each pixel that is covered by the segmented path. The slope directions are stored in a derivative mask that may be integrated for each scanline to produce a fill mask. The resulting fill mask indicates the pixels that are inside the two-dimensional path. The fill mask may be used to fill the path.

Abstract: Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in a fast and efficient manner. One such texture circuit provides an increased number of bilerps for each pixel in a group of pixels, particularly when trilinear or aniso filtering is needed. For trilinear filtering, texels in a first and second level of detail are retrieved for a number of pixels during a clock cycle. When aniso filtering is performed, multiple bilerps can be retrieved for each of a number of pixels during one clock cycle.

Abstract: Systems and methods for positioning bilinear texture samples to produce an anisotropically filtered texture mapped pixel may improve texture mapping performance and image quality. The bilinear texture samples are positioned along a major axis of anisotropy to approximate an elliptical footprint, ensuring that the bilinear texture samples span the entire axis of anisotropy without extending beyond the major axis of anisotropy. An additional bilinear texture sample or a pair of additional bilinear texture samples is positioned in the center of the axis of anisotropy dependent on the anisotropic ratio. The additional bilinear texture samples are weighed less than the other bilinear texture samples and all of the bilinear textures samples lie within the anisotropic footprint.

Abstract: A method for implementing LOD (level of detail) filtering in a cube mapping application. The method includes accessing a first sample and a second sample for a cube map. A cube map path is computed between the first sample and the second sample. A distance is computed between the first sample and the second sample, wherein the distance is measured using the cube map path. LOD filtering is then implemented by using the distance between the first sample and the second sample.

Abstract: A system and method for providing explicit weights for texture filtering permits filter weights to vary for each pixel within a primitive. A different filter kernel may be used for each pixel. The weights may be computed or read from a texture map. Because the weights are explicit, the fractional portions of the texture map coordinates that are typically used to determine a bilinearly filtered texel are not used.

Abstract: A pixel center position that is not covered by a primitive covering a portion of the pixel is displaced to lie within a fragment formed by the intersection of the primitive and the pixel. X,y coordinates of a pixel center are adjusted to displace the pixel center position to lie within the fragment, affecting actual texture map coordinates or barycentric weights. Alternatively, a centroid sub-pixel sample position is determined based on coverage data for the pixel and a multisample mode. The centroid sub-pixel sample position is used to compute pixel or sub-pixel parameters for the fragment.

Abstract: A graphics system has a mode of operation in which real samples and virtual samples are generated for anti-aliasing pixels. Each virtual sample identifies a set of real samples associated with a common primitive that covers a virtual sample location within a pixel. The virtual samples provide additional coverage information that may be used to adjust the weights of real samples.

Abstract: A method for optimizing the number of bilinear samples includes the steps of computing a desired bilerp count for a pixel footprint in a mipmap, where a fractional distance represents the distance between the desired bilerp count and a first available bilerp count relative to the distance between a second available bilerp count and the first available bilerp count, determining a modified bilerp count based on the desired bilerp count, and computing a modified fractional distance based on the modified bilerp count, where the modified fractional distance is zero if the fractional distance is between zero and a first-non-zero value, but is between zero and one if the fractional distance is within a transition band. Texture values for the bilerps in the first available count and one or more additional bilerps are average to generate a pixel texture value, where the modified fractional distance determines the weights applied.

Abstract: Data for data elements (e.g., pixels) can be stored in an addressable storage unit that can store a number of bits that is not a whole number multiple of the number of bits of data per data element. Similarly, a number of the data elements can be transferred per unit of time over a bus, where the width of the bus is not a whole number multiple of the number of bits of data per data element. Data for none of the data elements is stored in more than one of the storage units or transferred in more than one unit of time. Also, data for multiple data elements is packaged contiguously in the storage unit or across the width of the bus.

Abstract: Hybrid sampling of pixels of an image involves generating shading values at multiple shading sample locations and generating depth values at multiple depth sample locations, with the number of depth sample locations exceeding the number of shading sample locations. Each shading sample location is associated with one or more of the depth sample locations. Generation and filtering of hybrid sampled pixel data can be done within a graphics processing system, transparent to an application that provides image data.

Abstract: Sourcing immediate values from a very long instruction word includes determining if a VLIW sub-instruction expansion condition exists. If the sub-instruction expansion condition exists, operation of a portion of a first arithmetic logic unit component is minimized. In addition, a part of a second arithmetic logic unit component is expanded by utilizing a block of a very long instruction word, which is normally utilized by the first arithmetic logic unit component, for the second arithmetic logic unit component if the sub-instruction expansion condition exists.

Abstract: An arithmetic logic stage in a graphics processor unit includes arithmetic logic units (ALUs) and global registers. The registers contain global values for a group of pixels. Global values may be read from any of the registers, regardless of which of the pixels is being operated on by the ALUs. However, when writing results of the ALU operations, only some of the global registers are candidates to be written to, depending on the pixel number. Accordingly, overwriting of data is prevented.

Abstract: A system, apparatus, and method are disclosed for modifying positions of sample positions for selectably oversampling pixels to anti-alias non-geometric portions of computer-generated images, such as texture, at least in part, by shifting shading sample positions relative to a frame of reference. There is generally no relative motion between the geometries and the coverage sample positions. In one embodiment, an apparatus, such as a graphics pipeline and/or a general purpose graphics processing unit, anti-aliases geometries of a computer-generated object. The apparatus includes at least a texture unit and a pipeline front end unit to determine geometry coverage and a subpixel shifter to shift shading sample positions relative to the frame of reference. The apparatus can receive subpixel shifting masks to select subsets of shading sample positions. Each of the shading sample positions is shifted to a coverage sample position to reduce level of detail (“LOD”) artifacts.