Abstract: A method of forming a wall structure in a microelectronic assembly includes selectively depositing a flowable material on an upper surface of a first element in the microelectronic assembly, positioning a molding surface in contact with the deposited flowable material and controlling a distance between the upper surface of the first element and the molding surface with one or more objects positioned between the upper surface and the molding surface.

Abstract: A method of making chip assemblies includes providing an in-process assembly including a semiconductor wafer, a wafer compliant structure overlying a front surface of the wafer and cavities, and terminals carried on the compliant structure adjacent the cavities and electrically connected to the wafer, the cavities being substantially sealed. The method includes subdividing the in-process assembly to form individual chip assemblies, each including one or more chip regions of the wafer, a portion of the compliant structure and the terminals carried on the portion, and opening vents communicating with said cavities after said providing step.

Abstract: A microelectronic device includes a chip having a front surface and a rear surface, the front surface having an active region and a plurality of contacts exposed at the front surface outside of the active region. The device further includes a lid overlying the front surface. The lid has edges bounding the lid, at least one of the edges including one or more outer portions and one or more recesses extending laterally inwardly from the outer portions, with the contacts being aligned with the recesses and exposed through them.

Abstract: The present invention provides an integrated circuit chip assembly and a method of manufacturing the same. The assembly includes a package element having a top surface and an integrated circuit chip having a top surface, a bottom surface, edge surface between the top and bottom surfaces, and contacts exposed at the top surface. The package element is disposed below the chip with the top surface of the package element facing toward the bottom surface of the chip. At least one spacer element resides between the top surface of the package element and the bottom surface of the chip. According to one embodiment, the at least one spacer element may form a substantially closed cavity between the package element and the integrated circuit chip. According to another embodiment, first conductive features may extend from the contacts of the chip along the top surface, and at least some of said first conductive features extend along at least one of the edge surfaces of the chip.

Abstract: A lidded chip is provided which includes a chip having a major surface and a plurality of first chip contacts exposed at the major surface. A lid overlies the major surface. A chip carrier is disposed between the chip and the lid, the chip carrier having an inner surface confronting the major surface and an outer surface confronting the lid. A plurality of first carrier contacts of the chip carrier are conductively connected to the first chip contacts. A plurality of second carrier contacts extend upwardly at least partially through the openings in the lid.

Abstract: A compliant structure is provided on a semiconductor wafer. The compliant structure includes cavities. The compliant structure and the wafer seal the cavities during process steps used to form conductive elements on the compliant structure. After processing, vents are opened to connect the cavities to the exterior of the assembly. The vents may be formed by severing the wafer and compliant structure to form individual units, so that the severance planes intersect channels or other voids communicating with the cavities. Alternatively, the vents may be formed by forming holes in the compliant structure, or by opening bores extending through the wafer.

Abstract: A microelectronic device includes a chip having a front surface and a rear surface, the front surface having an active region and a plurality of contacts exposed at the front surface outside of the active region. The device further includes a lid overlying the front surface. The lid has edges bounding the lid, at least one of the edges including one or more outer portions and one or more recesses extending laterally inwardly from the outer portions, with the contacts being aligned with the recesses and exposed through them.

Abstract: The present invention relates to a camera module. The camera module includes a circuit panel having a top side, a bottom side and transparent region, the circuit panel having conductors. The module further includes sensor unit disposed on the bottom side of the circuit panel, and the sensor unit includes a semiconductor chip having a front surface including an imaging area facing in a forward direction in alignment with the transparent region and an imaging circuit adapted to generate signals representative of an optical image impinging on the imaging area. The module further includes posts protruding from the bottom side of the circuit panel, wherein at least some of the posts being engagement posts having bottom surfaces, and at least some of the bottom surfaces abutting an engagement surface of the sensor unit.

Abstract: A method of forming a microelectronic assembly includes positioning a support structure adjacent to an active region of a device but not extending onto the active region. The support structure has planar sections. Each planar section has a substantially uniform composition. The composition of at least one of the planar sections differs from the composition of at least one of the other planar sections. A lid is positioned in contact with the support structure and extends over the active region. The support structure is bonded to the device and to the lid.

Abstract: A method of forming a wall structure in a microelectronic assembly includes selectively depositing a flowable material on an upper surface of a first element in the microelectronic assembly, positioning a molding surface in contact with the deposited flowable material and controlling a distance between the upper surface of the first element and the molding surface with one or more objects positioned between the upper surface and the molding surface.

Abstract: A light-emitting device contains getter material (58) typically distributed in a relatively uniform manner across the device's active light-emitting portion. An electron-emitting device similarly contains getter material (112, 110/112, 128, 132, and 142) typically distributed relatively uniformly across the active electron-emitting portion of the device.

Abstract: Methods and apparatus for non-contact electrical probes are described. In accordance with the invention, non-contact electrical probes use negative or positive corona discharge. Non-contact electrical probes are suited for testing of OLED flat panel displays.

Abstract: Selective area stamping of optical elements may be performed to make multiple micro-optic components on one or two sides of a substrate may be fabricated using a batch process. The presence of molding material may be controlled on the substrate through the use of gaps.

Abstract: A flat-panel display is fabricated by a process in which a spacer (24) having a rough face (54 or 56) is positioned between a pair of plate structure (20 and 22). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as providing suitable depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92) along the spacer's face.

Abstract: A solder joint or seal attaching components having dissimilar coefficients of thermal expansion is made thin (e.g., less than 20 ?m and preferably about 5 ?m) and of a solder such as an indium-based solder that has a tendency to creep. The solder is toroidal or otherwise shaped to avoid tensile stress in the solder. Axial shearing stress in the solder causes reversible creep without causing failure of the joint or seal. In one embodiment, a toroidal solder seal has a diameter, a footprint, and a thickness in approximate proportions of 5000:200:1.

Abstract: The present invention provides a spacer assembly which is tailored to provide a secondary electron emission coefficient of approximately 1 for the spacer assembly when the spacer assembly is subjected to flat panel display operating voltages. The present invention further provides a spacer assembly which accomplishes the above achievement and which does not degrade severely when subjected to electron bombardment. The present invention further provides a spacer assembly which accomplishes both of the above-listed achievements and which does not significantly contribute to contamination of the vacuum environment of the flat panel display or be susceptible to contamination that may evolve within the tube. Specifically, in one embodiment, the present invention is comprised of a spacer structure which has a specific secondary electron emission coefficient function associated therewith.

Abstract: Fluxless soldering processes use pressure variations and vented cavities within large-area solder joints to reduce void volumes and improve the properties of the large-area solder joints. The vents can be sealed after soldering if closed cavities are desired. A cavity can also improve hermeticity of a solder joint by providing an additional solder fillet around the cavity in addition to the solder fillet around the perimeter of the solder joint.

Abstract: A structure suitable for partial or full use in a spacer (24) of a flat-panel display has a porous face (54). The structure may be formed with multiple aggregates (100) of coated particles (102) bonded together in an open manner to form pores (58). A coating (88) consisting primarily of carbon and having a highly uniform thickness may extend into pores of a porous body (46). The coating can be created by removing non-carbon material from carbon-containing species provided along the pores. A solid porous film (82) whose thickness is normally no more than 20 &mgr;m has a resistivity of 108-1014 ohm-cm. A spacer for a flat-panel display contains a support body (80) and an overlying, normally porous, layer (82) whose resistivity is greater parallel to a face of the support body than perpendicular to the body's face.

Abstract: A flat-panel display is fabricated according to a process in which a liquid-containing film (92, 116, 124, 132, 144, or 166) is formed over a substrate (80). In addition to suitable liquid, the liquid-containing film contains oxide or/and hydroxide. Liquid is removed from the liquid-containing film to convert it into a solid porous film (82 or 150) having (a) a porosity of at least 10% along an exposed face of the film, (b) an average resistivity of 108-1014 ohm-cm at 25° C., and (c) an average thickness of no more than 20 &mgr;m. A spacer (24) formed with at least a segment of the substrate and overlying solid porous film is positioned between opposing first and second plate structures (20 and 22) of the display. The second plate structure (22) emits light upon receiving electrons emitted by the first plate structure (20).

Abstract: A solder joint or seal attaching components having dissimilar coefficients of thermal expansion is made thin (e.g., less than 20 &mgr;m and preferably about 5 &mgr;m) and of a solder such as an indium-based solder that has a tendency to creep. The solder is toroidal or otherwise shaped to avoid tensile stress in the solder. Axial shearing stress in the solder causes reversible creep without causing failure of the joint or seal. In one embodiment, a toroidal solder seal has a diameter, a footprint, and a thickness in approximate proportions of 5000:200:1.