Abstract: A coagulation test device for measuring clotting time and clot characteristics of a whole blood sample under different hemostatic conditions. Results of the test are used as an aid in management of patients with coagulopathy of unknown etiology in order to help the physician determine appropriate clinical action to arrest bleeding in a patient.

Abstract: A network interface device includes a host interface for connection to a host processor and a network interface, which is configured to transmit and receive data packets over a network, and which comprises multiple distinct physical ports configured for connection to the network. Processing circuitry is configured to receive, via one of the physical ports, a data packet from the network and to decide, responsively to a destination identifier in the packet, whether to deliver a payload of the data packet to the host processor via the host interface or to forward the data packet to the network via another one of the physical ports.

Abstract: A coagulation test device for measuring clotting time and clot characteristics of a whole blood sample under different hemostatic conditions. Results of the test are used as an aid in management of patients with coagulopathy of unknown etiology in order to help the physician determine appropriate clinical action to arrest bleeding in a patient.

Abstract: A method for data transfer includes transmitting a sequence of data packets, including at least a first packet and a second packet transmitted subsequently to the first packet, from a first computer over a network to a second computer in a single remote direct memory access (RDMA) data transfer transaction. Upon receipt of the second packet at the second computer without previously having received the first packet, a negative acknowledgment (NAK) packet is sent from the second computer over the network to the first computer, indicating that the first packet was not received. In response to the NAK packet, the first packet is retransmitted from the first computer to the second computer without retransmitting the second packet.

Abstract: A switch in a data network is configured to mediate data exchanges among network elements. The apparatus further includes a processor, which organizes the network elements into a hierarchical tree having a root node network element, vertex node network elements, and child node network elements that include leaf node network elements. The leaf node network elements are originate aggregation data and transmit the aggregation data to respective parent vertex node network elements. The vertex node network elements combine the aggregation data from at least a portion of the child node network elements, and transmit the combined aggregation data from the vertex node network elements to parent vertex node network elements. The root node network element is operative for initiating a reduction operation on the aggregation data.

Abstract: A method for congestion control includes receiving at a destination computer a packet transmitted on a given flow, in accordance with a predefined transport protocol, through a network by a transmitting network interface controller (NIC) of a source computer, and marked by an element in the network with a forward congestion notification. Upon receiving the marked packet in a receiving NIC of the destination computer, a congestion notification packet (CNP) indicating a flow to be throttled is immediately queued for transmission from the receiving NIC through the network to the source computer. Upon receiving the CNP in the transmitting NIC, transmission of further packets on at least the flow indicated by the CNP from the transmitting NIC to the network is immediately throttled, and an indication of the given flow is passed from the transmitting NIC to a protocol processing software stack running on the source computer.

Abstract: Apparatus for data communications includes a host interface and a network interface, which receives from a packet communication network data packets containing video data comprising interleaved words of luminance data and chrominance data. In one embodiment, packet processing circuitry separates the luminance data from the chrominance data and writes the luminance data, via the host interface, to a luminance buffer in the host memory while writing the chrominance data, via the host interface, to at least one chrominance buffer in the memory, separate from the luminance buffer. In another embodiment, in which the video data include data words of more than eight bits, the packet processing circuitry writes the video data to at least one buffer while justifying the video data in the memory so that the video data with respect to successive pixels in the sequence are byte-aligned in the buffer.

Abstract: Provided herein are compositions comprising eicosapentaenoic acid (EPA) and polar lipids (e.g., glycolipids and phospholipids), and which do not contain any docosahexaenoic acid (DHA) or esterified fatty acids.

Abstract: Described are systems, devices, and methods which related to various aspects of assays for detecting and/or determining a measure of the concentration of analyte molecules or particles in a sample fluid. In some cases, the systems employ an assay consumable comprising a plurality of assay sites. The systems, devices, and/or methods, in some cases, are automated. In some cases, the systems, devices, and/or methods relate to inserting a plurality of beads into assay sites, sealing assay sites, imaging assay sites, or the like.

Abstract: A method for communication includes receiving at a receiving node over a network from a sending node a succession of data packets belonging to a sequence of transactions, including at least one or more first packets belonging to a first transaction and one or more second packets belonging to a second transaction executed by the sending node after the first transaction, wherein at least one of the second packets is received at the receiving node before at least one of the first packets. At the receiving node, upon receipt of the data packets, data are written from the data packets in the succession to respective locations in a buffer. Execution of the second transaction at the receiving node is delayed until all of the first packets have been received and the first transaction has been executed at the receiving node.

Abstract: Provided herein are compositions comprising eicosapentaenoic acid (EPA) and polar lipids (e.g., glycolipids and phospholipids), and which do not contain any docosahexaenoic acid (DHA) or esterified fatty acids.

Abstract: A method in a system that includes first and second devices that communicate with one another over a fabric that operates in accordance with a fabric address space, and in which the second device accesses a local memory via a local connection and not over the fabric, includes sending from the first device to a translation agent (TA) a translation request that specifies an untranslated address in an address space according to which the first device operates, for directly accessing the local memory of the second device. A translation response that specifies a respective translated address in the fabric address space, which the first device is to use instead of the untranslated address is received by the first device. The local memory of the second device is directly accessed by the first device over the fabric by converting the untranslated address to the translated address.

Abstract: A network interface device for a host computer includes a network interface, configured to transmit and receive data packets to and from a network. Packet processing logic transfers data to and from the data packets transmitted and received via the network interface by direct memory access (DMA) from and to a system memory of the host computer. A memory controller includes a first memory interface configured to be connected to the system memory and a second memory interface, configured to be connected to a host complex of the host computer. Switching logic alternately couples the first memory interface to the packet processing logic in a DMA configuration and to the second memory interface in a pass-through configuration.

Abstract: Described are systems, devices, and methods which related to various aspects of assays for detecting and/or determining a measure of the concentration of analyte molecules or particles in a sample fluid. In some cases, the systems employ an assay consumable comprising a plurality of assay sites. The systems, devices, and/or methods, in some cases, are automated. In some cases, the systems, devices, and/or methods relate to inserting a plurality of beads into assay sites, sealing assay sites, imaging assay sites, or the like.

Abstract: A network interface controller includes a host interface, which is configured to be coupled to a host processor having a host memory. A network interface is configured to receive data packets from a network, each data packet including a header, which includes header fields, and a payload including data. Packet processing circuitry is configured to process one or more of the header fields and at least a part of the data and to select, responsively at least to the one or more of the header fields, a location in the host memory. The circuitry writes the data to the selected location and upon determining that the processed data satisfies a predefined criterion, asserts an interrupt on the host processor so as to cause the host processor to read the data from the selected location in the host memory.

Abstract: Remote transactions using transactional memory are carried out over a data network between an initiator host and a remote target. The transaction comprises a plurality of input-output (IO) operations between an initiator network interface controller and a target network interface controller. The IO operations are controlled by the initiator network interface controller and the target network interface controller to cause the first process to perform accesses to the memory location atomically.

Abstract: A network interface controller includes a host interface, which is configured to be coupled to a host processor having a host memory. A network interface is configured to receive data packets from a network, each data packet including a header, which includes header fields, and a payload including data. Packet processing circuitry is configured to process one or more of the header fields and at least a part of the data and to select, responsively at least to the one or more of the header fields, a location in the host memory. The circuitry writes the data to the selected location and upon determining that the processed data satisfies a predefined criterion, asserts an interrupt on the host processor so as to cause the host processor to read the data from the selected location in the host memory.

Abstract: A method for data transfer includes transmitting a sequence of data packets, including at least a first packet and a second packet transmitted subsequently to the first packet, from a first computer over a network to a second computer in a single remote direct memory access (RDMA) data transfer transaction. Upon receipt of the second packet at the second computer without previously having received the first packet, a negative acknowledgment (NAK) packet is sent from the second computer over the network to the first computer, indicating that the first packet was not received. In response to the NAK packet, the first packet is retransmitted from the first computer to the second computer without retransmitting the second packet.

Abstract: Provided herein are compositions comprising eicosapentaenoic acid (EPA) and polar lipids (e.g., glycolipids and phospholipids), and which do not contain any docosahexaenoic acid (DHA) or esterified fatty acids.

Abstract: A memory device includes a target memory, having a memory address space, and a volatile buffer memory, which is coupled to receive data written over a bus to the memory device for storage in specified addresses within the memory address space. A memory controller is configured to receive, via the bus, a flush instruction and, in response to the flush instruction, to immediately flush the data held in the buffer memory with specified addresses within the memory address space to the target memory.