Abstract: Systems, methods, and circuitries for synchronizing a first phase locked loop (PLL) with a second PLL are provided. In one example a PLL system includes a first PLL configured to generate a first signal; a second PLL configured to generate a second signal; and phase calculation circuitry. The phase calculation circuitry is configured to calculate a phase of the first signal at a given time; and provide the calculated phase to the second PLL for use by the second PLL in synchronizing a phase of the second with the phase of the first signal.

Abstract: A communication device is provided that includes a modulation circuit configured to modulate a signal comprising a first signal portion of a first data type and a second signal portion of a second data type. The modulation circuit is configured to modulate the first signal portion in accordance with a first modulation scheme and the second signal portion in accordance with a second modulation scheme. At least one of the first data type is different from the second data type or the second modulation scheme is different from the first modulation scheme. The communication device further includes a modification circuit configured to modify the modulated first signal portion based on a first modification scheme and the second signal portion based on a second modification scheme. The communication device further includes a transmitter configured to transmit the modified first signal portion and the modified second signal portion.

Abstract: An apparatus to apply frequency selective digital predistortion (DPD) to a power amplifier (PA) circuit is disclosed. The apparatus comprises a first transformation circuit configured to receive a PA input comprising a quantity indicative of an input signal of the PA circuit and process the PA input by applying a first predetermined weighted function, to form a processed PA input, and a second transformation circuit configured to receive a PA output comprising a quantity indicative of an output signal of the PA circuit and process the PA output by applying a second predetermined weighted function, to form a processed PA output. The apparatus further comprises a coefficient computation circuit configured to receive the processed PA input and the processed PA output; and estimate distortion coefficients, to be utilized for predistorting the input signal of the PA circuit, based on the processed PA input and the processed PA output.

Abstract: An adaptive controller for a nonlinear system includes a Volterra filter having a transfer function defined by P coefficients. The controller includes an alignment/compensation circuit, which aligns the input samples to the output samples of the nonlinear system. The controller generates a P×P matrix using at least one of input samples to, or output samples from the nonlinear system and normalizes each element of the P×P matrix using a respective normalization factor. The controller generates and solves a system of P linear equations from the P×P matrix and a P×1 matrix derived from input and output samples of the nonlinear system using Cholesky decomposition that may include Fast Inverse Square Root operations and forward backward elimination to generate P values. The controller multiplies each of the P values by an inverse of a respective one of the normalization factors to generate the P coefficients for the Volterra filter.

Abstract: A spur cancelation system includes error circuitry, inverse spur circuitry, and injection circuitry. The error circuitry is configured to generate an error signal based at least on a first transceiver signal in a transceiver signal processing chain. The inverse spur circuitry is configured to, based at least on the error signal, determine a gain and a phase of a spur signal in the transceiver signal and generate an inverse spur signal based at least on the gain and the phase of the spur signal. The injection circuitry is configured to inject the inverse spur signal to cancel a spur in a second transceiver signal in the transceiver signal processing chain.

Abstract: Devices and methods of compensating for a bandpass filter are generally described. A DTx includes a BPF from which an output signal is produced and a DFE having a zero crossing (ZC) pre-distorter (ZCPD). The ZCPD compensates for ZC distortion from a desired analog signal caused by the BPF. The ZCPD adjusts a DTC code word to generate a DTx output signal to be applied to the BPF. The compensation is dependent on a magnitude of the square wave immediately prior to and after the ZC. The compensated DTC and a DPA code word are used to generate the DTx output signal. The compensation produced by the ZCPD is free from compensation for non-linear responses to the DTC and DPA code words.

Abstract: An envelope tracking arrangement is disclosed and includes a level select component, a chunk supply component and a power amplifier. The level select component is configured to segment an input signal into chunks based on time and to select a chunk level for each chunk based on information or envelope information. The chunk supply component is configured to selectively provide a discrete supply voltage according to the selected chunk level. The power amplifier is configured to generate a radio frequency (RF) output signal based on the input signal and utilizing the discrete supply voltage.

Abstract: An envelope tracking arrangement is disclosed and includes a level select component, a chunk supply component and a power amplifier. The level select component is configured to segment an input signal into chunks based on time and to select a chunk level for each chunk based on information or envelope information. The chunk supply component is configured to selectively provide a discrete supply voltage according to the selected chunk level. The power amplifier is configured to generate a radio frequency (RF) output signal based on the input signal and utilizing the discrete supply voltage.

Abstract: Techniques for compensating for signal impairments introduced by a mixer are discussed. One example system employing such techniques can include mixer predistortion circuitry configured to receive signal in-phase (I) and signal quadrature (Q) components of a signal and to generate a mixer predistortion signal based at least in part on the signal I and Q components, wherein the mixer predistortion signal compensates for nonlinearities caused by a mixer that upconverts the signal. Optionally, imbalance correction circuitry to compensate for gain and phase imbalance and/or skew correction circuitry to compensate for gain and phase skew can also be included.

Abstract: A wireless device and method of power consumption reduction are generally described herein. The wireless device may map a plurality of data symbols to sub-carriers for an orthogonal frequency division multiplexing (OFDM) transmission. The wireless device may divide the plurality of data symbols into first and second groups of data symbols. The wireless device may generate a first OFDM signal from the first group of data symbols for amplification by a first power amplifier (PA). The wireless device may generate a second OFDM signal from the second group of data symbols for amplification by a second PA. The data symbols of the first and second groups may be selected to provide a PAPR of the first OFDM signal that is lower than a PAPR of a composite OFDM signal based on the plurality of data symbols.

Abstract: Devices and methods of compensating for a bandpass filter are generally described. A DTx includes a BPF from which an output signal is produced and a DFE having a zero crossing (ZC) pre-distorter (ZCPD). The ZCPD compensates for ZC distortion from a desired analog signal caused by the BPF. The ZCPD adjusts a DTC code word to generate a DTx output signal to be applied to the BPF. The compensation is dependent on a magnitude of the square wave immediately prior to and after the ZC. The compensated DTC and a DPA code word are used to generate the DTx output signal. The compensation produced by the ZCPD is free from compensation for non-linear responses to the DTC and DPA code words.

Abstract: A digital polar transmitter arrangement having a digital front end (DFE) and a transmit chain is disclosed. The DFE is configured to resample a baseband signal relative to a carrier frequency at a carrier frequency related sample rate, calculate zero crossing positions of the resampled signal, generate delay to time converter (DTC) commands based on the zero crossing positions, calculate amplitude values for the zero crossing positions and generate dynamic phase alignment (DPA) commands based on the amplitude values. The transmit chain is configured to generate an output signal having amplitude and phase modulation based on the DTC and DPA commands.

Abstract: Described herein are technologies related to an implementation for dynamic adjustment of an out-of-band emission in a wireless modem, including spurious emissions, such as a Wi-FI modem, to minimize interference on a collocated or co-running downlink reception of another wireless modem residing on the same device by dynamically adjustment of a power consumption.

Abstract: A method for predistorting an input signal of an amplifier device comprises evaluating a selection criterion for a computational model of the amplifier device. The computational model provides an output signal of the amplifier device for the input signal of the amplifier device. Further, the method comprises selecting between a first computational model of the amplifier device and a second computational model of the amplifier device based on the evaluated selection criterion. Additionally, the method comprises predistorting the input signal of the amplifier device using the selected computational model.

Abstract: Embodiments related to systems, methods, and computer-readable media to enable a digital phase locked loop are described. In one embodiment, a digital synthesizer comprises a digital phase locked loop with detection circuitry to calculate an estimate of a magnitude and a phase of a spurious response from an error signal within the digital phase locked loop. The digital phase locked loop further comprises generation circuitry to generate an inverse spur based on the estimate of the magnitude and the phase, and further comprises injection circuitry to inject the inverse spur into the digital phase locked loop. In some embodiments, least mean squares (LMS), recursive least squares (RLS), or other such adaptation is used to estimate the magnitude and phase of the spurious response.

Abstract: Embodiments related to systems, methods, and computer-readable media to enable a digital phase locked loop are described. In one embodiment, a digital synthesizer comprises a digital phase locked loop with detection circuitry to calculate an estimate of a magnitude and a phase of a spurious response from an error signal within the digital phase locked loop. The digital phase locked loop further comprises generation circuitry to generate an inverse spur based on the estimate of the magnitude and the phase, and further comprises injection circuitry to inject the inverse spur into the digital phase locked loop. In some embodiments, least mean squares (LMS), recursive least squares (RLS), or other such adaptation is used to estimate the magnitude and phase of the spurious response.

Abstract: Described herein are technologies related to an implementation for dynamic adjustment of an out-of-band emission in a wireless modem, including spurious emissions, such as a Wi-FI modem, to minimize interference on a collocated or co-running downlink reception of another wireless modem residing on the same device by dynamically adjustment of a power consumption.

Abstract: Techniques for compensating for signal impairments introduced by a mixer are discussed. One example system employing such techniques can include mixer predistortion circuitry configured to receive signal in-phase (I) and signal quadrature (Q) components of a signal and to generate a mixer predistortion signal based at least in part on the signal I and Q components, wherein the mixer predistortion signal compensates for nonlinearities caused by a mixer that upconverts the signal. Optionally, imbalance correction circuitry to compensate for gain and phase imbalance and/or skew correction circuitry to compensate for gain and phase skew can also be included.

Abstract: Described herein are technologies related to an implementation of improving de-sensitivity in a receiver of a portable device.

Abstract: Techniques for compensating for signal impairments introduced by a mixer are discussed. One example system employing such techniques can include mixer predistortion circuitry configured to receive signal in-phase (I) and signal quadrature (Q) components of a signal and to generate a mixer predistortion signal based at least in part on the signal I and Q components, wherein the mixer predistortion signal compensates for nonlinearities caused by a mixer that upconverts the signal. Optionally, imbalance correction circuitry to compensate for gain and phase imbalance and/or skew correction circuitry to compensate for gain and phase skew can also be included.