Abstract: Multiplexer control logic is provided for a semiconductor memory device that combines the function of programmable disconnect-state with a dynamic or dynamic latching mode that operates during self-refresh. The programmable disconnect state disconnects the sense amplifier from a memory array segment when it is unselected. When a memory array segment is being accessed, (such as during self-refresh), the multiplexers are latched into a selected state thereby eliminating the multiplexer switching current while the memory array segment is being accessed.

Abstract: A method of accumulating a web includes pivoting subsets of rolls to a generally vertical alignment; moving one set of rolls past the other; passing the web between the sets of rolls; moving one set of rolls past the other to engage the web; pivoting the subsets to a generally horizontal alignment; moving the web alternatively between the subsets; and moving the sets apart to accumulate the web and together to discharge the web. A web accumulator includes at least two sets of rolls. Each set of rolls has subsets of rolls. The subsets have two consecutive staggered rolls. The accumulator has a web path defined by alternating between subsets of the first set and subsets of the second set.

Abstract: A method is provided for removing paint from plastic parts by treating the painted part with a solvent mixture. The solvent mixture used to remove the paint is a mixture of a high-boiling pyrrolidone or piperidone (lactam) solvent and an aqueous mineral acid, optionally with a surfactant added.

Abstract: A method for reducing defect leakage current in a semiconductor memory device comprising a plurality of memory banks, each memory bank comprising a plurality of memory arrays and sense amplifier columns comprising a plurality of sense amplifiers, wherein there is a sense amplifier column positioned between and shared by memory arrays on opposites thereof. At least one bank-specific isolation control signal is independently generated for each of the plurality of memory banks depending on existence and location of an anomalous bitline leakage in a memory bank. The at least one bank-specific isolation control signal is supplied to at least one sense amplifier column in the corresponding memory bank to isolate at least one side to at least one memory array that is in an unselected state in a corresponding memory bank.

Abstract: A bonded structure including one or more substrates bonded together with a tackified amorphous poly-alpha-olefin adhesive composition. One method of making such a bonded structure is carried out by applying a tackified amorphous poly-alpha-olefin adhesive composition to one or more substrates at a temperature of about 170 degrees Celsius or lower, and joining the substrates to themselves or to one another. The bonded structure has a dynamic peel strength between about 400 and about 1000 grams per 25 millimeters. The bonding efficiency of the bonded structure renders the bonded structure suitable for incorporation into a variety of articles, including personal care products, health/medical products, and household/industrial product, for example.

Abstract: A semiconductor integrated circuit memory device, and test method for a memory device are provided in which an external wordline voltage is applied to a wordline of the memory device. A current on the wordline is measured as a result of application of the externally supplied wordline voltage. The measured current is compared to a reference value to determine whether the wordline has a defect, in particular a short-circuit defect. A tester device is connected to the memory device and supplies the external wordline voltage. The current measurement and comparison may be made internally by circuitry on the memory device or externally by circuitry in a tester device.

Abstract: A memory includes a wafer having at least a first and second edge, at least one memory bank array, a data path, and a plurality of data pads. The data path is coupled to the memory bank array. The plurality of data pads are coupled to the data path and configured with the data path to bus data to and from the memory bank array. The data pads are further configured such that each of the data pads are located adjacent the first and second edges of the wafer. The memory component is configurable for alternative applications such that in a first application all of the data pads used to bus data are located only on the first edge of the wafer and such that in a second application at least one of the data pads used to bus data is located on the first edge of the wafer and at least one of the data pads used to bus data is located on the second edge of the wafer.

Abstract: A two wheel steering bicycle with two steering controls and rider positioned facing forward. A top tube member connects the rear head tube to the front head tube. The rear wheel attaches to the rear fork extending upwards. The rear fork steerer column passes through the rear head tube and can rotate within the rear head tube by means of a bicycle bearing headset. A rear steering handle is connected to the rear fork steerer column. The rear steering handle is designed to contact the rider's first hand. The front wheel attaches to the front fork extending upwards. The front fork steerer column passes through the front head tube and can rotate within the front head tube by means of a bicycle bearing headset. A front steering handle is connected to the front fork steerer column. The front steering handle is designed to contact the rider's second hand. A seat tube member attaches to the top tube member.

Abstract: Information concerning a condition of a fuse is stored in a latch circuit and may be corrected. A first signal is supplied to the latch circuit which sets the latch circuit in a first state when the fuse is in a first condition and keeps the latch circuit unchanged when the fuse is in a second condition. While the first signal is being supplied, a second signal is supplied to the latch circuit that keeps the latch circuit in the first state when the fuse is in the first condition and sets the latch circuit in a second state when the fuse is in the second condition.

Abstract: A two wheel steering bicycle with two steering controls and rider positioned facing forward. A top tube member connects the rear head tube to the front head tube. The rear wheel attaches to the rear fork extending upwards. The rear fork steerer column passes through the rear head tube and can rotate within the rear head tube by means of a bicycle bearing headset. A rear steering handle is connected to the rear fork steerer column. The rear steering handle is designed to contact the rider's first hand. The front wheel attaches to the front fork extending upwards. The front fork steerer column passes through the front head tube and can rotate within the front head tube by means of a bicycle bearing headset. A front steering handle is connected to the front fork steerer column. The front steering handle is designed to contact the rider's second hand. A seat tube member attaches to the top tube member.

Abstract: Information concerning a condition of a fuse is stored in a latch circuit and may be corrected. A first signal is supplied to the latch circuit which sets the latch circuit in a first state when the fuse is in a first condition and keeps the latch circuit unchanged when the fuse is in a second condition. While the first signal is being supplied, a second signal is supplied to the latch circuit that keeps the latch circuit in the first state when the fuse is in the first condition and sets the latch circuit in a second state when the fuse is in the second condition.

Abstract: A two wheel steering bicycle with latitudinal aligned wheels device. A center support member connects the left head tube to the right head tube and extends substantially underneath the operator. The left wheel attaches to the left fork extending upwards. The left fork steerer column passes through the left head tube and can rotate within the left head tube by means of a bicycle bearing headset. A left steering handle is connected to the left fork steerer column. The left steering handle is designed to contact the rider's hand. The right wheel attaches to the right fork extending upwards. The right fork steerer column passes through the right head tube and can rotate within the right head tube by means of a bicycle bearing headset. A right steering handle is connected to the right fork steerer column. The right steering handle is designed to contact the rider's hand. A rider support member attaches to the center support member extending upward.

Abstract: A two wheel steering scooter with latitudinal aligned wheels device. A center user support member connects the rear head tube to the front head tube. The rear wheel attaches to the rear fork extending upwards. The rear fork steerer column passes through the rear head tube and can rotate within the rear head tube by means of a bicycle bearing headset. A rear steering handle is connected to the rear fork steerer column. The rear steering handle is designed to contact the user's left hand with arm extended. The front wheel attaches to the front fork extending upwards. The front fork steerer column passes through the front head tube and can rotate within the front head tube by means of a bicycle bearing headset. A front steering handle is connected to the front fork steerer column. The front steering handle is designed to contact the user's right hand with arm extended. The rider's left arm is positioned at the user's left side and contacts the rear steering handle.

Abstract: A center support member connects the rear head tube to the front head tube. The rear wheel attaches to the rear fork extending upwards. The rear fork steerer column passes through the rear head tube and can rotate within the rear head tube by a bicycle bearing headset. A rear steering handle is connected to the rear fork steerer column. The rear steering handle is designed to contact the rider's lower arm and hand. The front wheel attaches to the front fork extending upwards. The front fork steerer column passes through the front head tube and can rotate within the front head tube by a bicycle bearing headset. A front steering handle is connected to the front fork steerer column. The front steering handle is designed to contact the rider's lower arm and hand. A rider support member attaches to the center support member extending downward.

Abstract: A two wheel steering bicycle with latitudinal aligned wheels device. A center support member connects the rear head tube to the front head tube. The rear wheel attaches to the rear fork extending upwards. The rear fork steerer column passes through the rear head tube and can rotate within the rear head tube by means of a bicycle bearing headset. A rear steering handle is connected to the rear fork steerer column. The rear steering handle is designed to contact the rider's lower arm and hand. The front wheel attaches to the front fork extending upwards. The front fork steerer column passes through the front head tube and can rotate within the front head tube by means of a bicycle bearing headset. A front steering handle is connected to the front fork steerer column. The front steering handle is designed to contact the rider's lower arm and hand. A rider support member attaches to the center support member extending downward.

Abstract: A pre-charge circuit for a memory device having a sense amplifier shared between right and left banks of memory cells and a method of pre-charging the shared sense amplifier. The circuit is operated according to the method of the invention such that the sense amplifier is always pre-charged from the side that was previously active. The circuit includes right and left bank isolation transistor pairs connected between the shared sense amplifiers and the right and left banks. The isolation transistor pairs are controlled by a flip flop having a left bank state and a right bank state and complementary left and right outputs that turn off the left isolation transistor pair and turn on the right pair during row operations to the right and vice-versa.

Abstract: A pre-charge circuit for a memory device having a sense amplifier shared between right and left banks of memory cells and a method of pre-charging the shared sense amplifier. The circuit is operated according to the method of the invention such that the sense amplifier is always pre-charged from the side that was previously active. The circuit includes right and left bank isolation transistor pairs connected between the shared sense amplifiers and the right and left banks. The isolation transistor pairs are controlled by a flip flop having a left bank state and a right bank state and complementary left and right outputs that turn off the left isolation transistor pair and turn on the right pair during row operations to the right and vice-versa.

Abstract: A lenticular device with integral shuttering method for displaying an image, a series of which form an animated display when an observer is moving in parallel relative to the device is presented. The shuttering method includes means of displaying an image whereby this image is only viewable by the observer when the observer is positioned on the vertical plane perpendicular to the center of the device. Once the observer moves off this plane by a small fixed angle, the device image is invisible. This method can be employed for placing many devices on the walls of a subway tunnel which will result in an animated image visible to passengers of a subway car moving through the subway tunnel. These images can be illuminated by light from the windows of the subway car or can have their own illumination. The method can be employed on the walls of pedestrian walkways or sidewalks whereby the walking observer will see an animated image.

Abstract: A lenticular device with integral shuttering method for displaying an image, a series of which form an animated display when an observer is moving in parallel relative to the device is presented. The shuttering method includes means of displaying an image whereby this image is only viewable by the observer when the observer is positioned on the vertical plane perpendicular to the center of the device. Once the observer moves off this plane by a small fixed angle, the device image is invisible. This method can be employed for placing many devices on the walls of a subway tunnel which will result in an animated image visible to passengers of a subway car moving through the subway tunnel. These images can be illuminated by light from the windows of the subway car or can have their own illumination. The method can be employed on the walls of pedestrian walkways or sidewalks whereby the walking observer will see an animated image.

Abstract: The present invention relates generally to protection of integrated circuits from electrostatic discharges and more specifically to the use of devices formed in isolated well regions for electrostatic discharge protection. One aspect of the present invention is an ESD protection circuit that includes a first FET and a second FET. The drain of the first FET is coupled to an ESD susceptible node and the source of the first FET is coupled to a first voltage terminal. The gate and a well of the first FET are coupled together and to the drain of the second FET. The source of the second FET is coupled to the first voltage terminal. The gate of the second FET is coupled to a second voltage terminal. The second voltage terminal is connected to a voltage source that is at the first voltage when the circuit is not powered, and at a voltage above the threshold voltage of the second FET when the circuit is powered. The well in which the first FET is formed is electrically isolated from other wells in the substrate.