Abstract: A method of creating a digital solution, such as a website, for a business where business specific information is collected separately before digital solution information is collected that pertains to the creation and delivery of the digital solution. The business specific information collected may be industry specific, stored separately in the system from digital solution information, and the digital solutions created for optimal presentation on customer computer devices with different configurations through means such as transcoding.

Abstract: A memory array has a plurality of rows. Each row of the plurality of rows includes a plurality of memory words. Each first bit of a plurality of first bits is associated with a memory word of the each row. A state of the each first bit indicates whether the memory word associated the each first bit has had an error. Each redundancy row of a plurality of redundancy rows includes a plurality of redundancy words. Each redundancy word is associated with a memory word. Each second bit of a plurality of second bits is associated with a redundancy word of the plurality of redundancy words of the each row of the plurality of redundancy rows. A state of the each second bit indicates whether the redundancy word associated with the each second bit has had an error.

Abstract: This invention is in the field of medical devices. Specifically, the present invention provides portable medical devices that allow real-time detection of analytes from a biological fluid. The methods and devices are particularly useful for providing point-of-care testing for a variety of medical applications. In particular, the medical device reduces interference with an optical signal which is indicative of the presence of an analyte in a bodily sample.

Abstract: Provided are peptide analogues of PA-IL and compositions containing them. The PA-IL peptide analogues have altered carbohydrate binding specificity relative to a PA-IL of SEQ ID NO:1, and thus the analogues contain amino acid substitutions in SEQ ID NO:1. The substitutions can be at positions 50, 52 and 53 of SEQ ID NO:1 and can include combinations of amino acid substitutions at those positions Also included are methods for detecting changes in the glycosylation of carbohydrates and for separating biomolecules which contain glycoproteins or glycoconjugates.

Abstract: A circuit comprises a set of pre-charge and equalization devices, a control signal line, and a word line. The set of pre-charge and equalization devices is configured to pre-charge and equalize a pair of data lines. The control signal line is configured to control the pre-charge and equalization devices. The word line is configured to electrically couple a memory cell to a data line of the pair of data lines. A first voltage value provided to the control signal line is from a first voltage source different from a second voltage source that generates a second voltage value for the word line.

Abstract: A sense amplifier includes a first transistor. The first transistor includes a gate connected to a bit line, and a first source/drain (S/D) electrically coupled with a global bit line. The sense amplifier further includes a second transistor. The second transistor includes a gate connected to a first signal line, and a first S/D coupled to the global bit line, wherein the second transistor is configured to pre-charge the bit line.

Abstract: A memory circuit includes at least one memory cell for storing a charge representative of a datum. The memory cell is coupled with a word line and a bit line. A sense amplifier is coupled with the bit line. The sense amplifier is capable of precharging the bit line to a first voltage that is substantially equal to and higher than a threshold voltage (Vt) of a first transistor of the sense amplifier.

Abstract: Some embodiments regard a circuit comprising a memory cell, a first data line, a second data line, a sensing circuit coupled to the first data line and the second data line, a node selectively coupled to at least three voltage sources via at least three respective switches, a fourth switch, and a fifth switch. A first voltage source is configured to supply a retention voltage to the node via a first switch. A second voltage source is configured to supply a ground reference voltage to the node via a second switch, and a third voltage source is configured to supply a reference voltage to the node via a third switch. The fourth switch and fifth switch are configured to receive a respective first control signal and second control signal and to pass a voltage at the node to the respective first data line and second data line.

Abstract: A charge pump circuit comprises a first node, a second node, and at least one capacitance stage coupled between the first node and the second node. Capacitance stages of the at least one capacitance stage are coupled in series. A capacitance stage of the at least one capacitance stage includes a capacitive device and a voltage limiter coupled in parallel with the capacitor. The voltage limiter is configured to limit a voltage dropped across the capacitor. The capacitive device and the voltage limiter are configured such that a first current flowing through a first branch having the voltage limiter is more than a second current flowing through a second branch having the capacitive device.

Abstract: A memory array has a plurality of rows. Each row of the plurality of rows includes a plurality of memory words. Each first bit of a plurality of first bits is associated with a memory word of the each row. A state of the each first bit indicates whether the memory word associated the each first bit has had an error. Each redundancy row of a plurality of redundancy rows includes a plurality of redundancy words. Each redundancy word is associated with a memory word. Each second bit of a plurality of second bits is associated with a redundancy word of the plurality of redundancy words of the each row of the plurality of redundancy rows. A state of the each second bit indicates whether the redundancy word associated with the each second bit has had an error.

Abstract: This invention is in the field of medical devices. Specifically, the present invention provides portable medical devices that allow real-time detection of analytes from a biological fluid. The methods and devices are particularly useful for providing point-of-care testing for a variety of medical applications. In particular, the medical device reduces interference with an optical signal which is indicative of the presence of an analyte in a bodily sample.

Abstract: The invention provides an enzyme ink useful in test strips that provides a test strip bias, at the low and high glucose ends, falling within a desired target range. The ink of the invention permits an improved method for the production of single calibration code strip lots with good yields.

Abstract: Provided herein are compounds, compositions and methods for balancing a T-helper cell profile and in particular Th1, Th2, Th17 and Treg cell profiles, and related methods and compositions for treating or preventing an inflammatory condition associated with an imbalance of a T-helper cell profile.

Abstract: A circuit comprises a plurality of memory cells, a word line, a plurality of pairs of bit lines, a pre-charge and equalization device, a column select device, and a sense amplifier. The word line is configured to control the plurality of memory cells. Each pair of bit lines of the plurality of pairs of bit lines corresponds to a memory cell of the plurality of memory cells and is coupled to a pair of switches. The sense amplifier is coupled to the plurality of pairs of bit lines, the pre-charge and equalization device, and the column select device.

Abstract: A nanostructure film, comprising at least one interconnected network of nanostructures, wherein the nanostructure film is optically transparent and electrically conductive. A method for improving the optoelectronic properties of a nanostructure film, comprising: forming a nanostructure film having a thickness that, if uniform, would result in a first optical transparency and a first sheet resistance that are lower than desired; and patterning holes in the nanostructure film, such that a desired higher second optical transparency and a second sheet resistance are achieved. A method for depositing a nanostructure film on a rigid substrate comprises: depositing the nanostructure film on a flexible substrate; and transferring the nanostructure film from the flexible substrate to a rigid substrate, wherein the flexible substrate comprises at least one of a release liner and a heat- or chemical-sensitive adhesive layer.

Abstract: A circuit comprises a set of pre-charge and equalization devices, a control signal line, and a word line. The set of pre-charge and equalization devices is configured to pre-charge and equalize a pair of data lines. The control signal line is configured to control the pre-charge and equalization devices. The word line is configured to electrically couple a memory cell to a data line of the pair of data lines. A first voltage value provided to the control signal line is from a first voltage source different from a second voltage source that generates a second voltage value for the word line.

Abstract: Some embodiments regard a circuit comprising a memory cell, a first data line, a second data line, a sensing circuit coupled to the first data line and the second data line, a node selectively coupled to at least three voltage sources via at least three respective switches, a fourth switch, and a fifth switch. A first voltage source is configured to supply a retention voltage to the node via a first switch. A second voltage source is configured to supply a ground reference voltage to the node via a second switch, and a third voltage source is configured to supply a reference voltage to the node via a third switch. The fourth switch and fifth switch are configured to receive a respective first control signal and second control signal and to pass a voltage at the node to the respective first data line and second data line.

Abstract: A charge pump circuit comprises a first node, a second node, and at least one capacitance stage coupled between the first node and the second node. Capacitance stages of the at least one capacitance stage are coupled in series. A capacitance stage of the at least one capacitance stage includes a capacitive device and a voltage limiter coupled in parallel with the capacitor. The voltage limiter is configured to limit a voltage dropped across the capacitor. The capacitive device and the voltage limiter are configured such that a first current flowing through a first branch having the voltage limiter is more than a second current flowing through a second branch having the capacitive device.

Abstract: Some embodiments regard a circuit comprising a memory cell, a first data line, a second data line, a sensing circuit coupled to the first data line and the second data line, a node selectively coupled to at least three voltage sources via at least three respective switches, a fourth switch, and a fifth switch. A first voltage source is configured to supply a retention voltage to the node via a first switch. A second voltage source is configured to supply a ground reference voltage to the node via a second switch, and a third voltage source is configured to supply a reference voltage to the node via a third switch. The fourth switch and fifth switch are configured to receive a respective first control signal and second control signal and to pass a voltage at the node to the respective first data line and second data line.

Abstract: The present invention relates to a a security bollard and, in particular, to a security bollard designed to be used as a protective measure to be placed in front of shop fronts and Automatic Teller Machines (ATMs) that may be subjected to ramming by vehicles. The bollard includes a first upright hollow member having an outer wall defining a chamber, and a plurality of vertical longitudinal jamming rods disposed inside the chamber. Each jamming rod has associated therewith a biasing means for biasing the members in a longitudinal direction so as to act like a disk brake on cutting implements attempting to cut through the jamming rods, and to also dose the gap created by the cut should the cutting implement be retrieved and cutting attempted again.