Patents by Inventor Michael Philips

Michael Philips has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11253976
    Abstract: A system includes thermally protective, narrow reverse-action tweezers with a self-aligning clamp for frictionless positioning with secure connection to a sample preparation system plunger for cryogenic transmission electron microscopy.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: February 22, 2022
    Assignee: NANOSOFT, LLC.
    Inventors: Michael Philip Godfrin, Michael Asher Franzblau
  • Patent number: 11256476
    Abstract: A tile of an FPGA includes a multiple mode arithmetic circuit. The multiple mode arithmetic circuit is configured by control signals to operate in an integer mode, a floating-point mode, or both. In some example embodiments, multiple integer modes (e.g., unsigned, two's complement, and sign-magnitude) are selectable, multiple floating-point modes (e.g., 16-bit mantissa and 8-bit sign, 8-bit mantissa and 6-bit sign, and 6-bit mantissa and 6-bit sign) are supported, or any suitable combination thereof. The tile may also fuse a memory circuit with the arithmetic circuits. Connections directly between multiple instances of the tile are also available, allowing multiple tiles to be treated as larger memories or arithmetic circuits. By using these connections, referred to as cascade inputs and outputs, the input and output bandwidth of the arithmetic circuit is further increased.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: February 22, 2022
    Assignee: Achronix Semiconductor Corporation
    Inventors: Daniel Pugh, Raymond Nijssen, Michael Philip Fitton, Marcel Van der Goot
  • Patent number: 11236422
    Abstract: A substrate processing system configured to perform a deposition process on a substrate includes a substrate support including a plurality of zones and a plurality of resistive heaters arranged throughout the plurality of zones. The plurality of resistive heaters includes separately-controllable resistive heaters arranged in respective ones of the plurality of zones. A controller is configured to, during the deposition process, control the plurality of resistive heaters to selectively adjust temperatures within the plurality of zones.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: February 1, 2022
    Assignee: Lam Research Corporation
    Inventors: Michael Philip Roberts, Ramesh Chandrasekharan, Pulkit Agarwal, Aaron Bingham, Ashish Saurabh, Ravi Kumar, Jennifer Leigh Petraglia
  • Publication number: 20220017716
    Abstract: This disclosure provides electron beam irradiated products and methods thereof. In particular, the invention is directed to a products and methods that comprise an electron beam irradiated component and a second component. The electron beam irradiated component may be plastic. The second component may be a building material or construction material. The invention is also directed to methods of manufacturing a modified polymer material with an electron-beam. Methods comprise irradiating the polymer particles of the material by dosing with electron beam radiation to produce a modified polymer material comprising irradiated polymer particles.
    Type: Application
    Filed: November 14, 2019
    Publication date: January 20, 2022
    Inventors: Kaveh Bakhtari, Oral Buyukozturk, Michael Philip Short
  • Publication number: 20210361227
    Abstract: The present disclosure provides systems and methods that generating health diagnostic information from an audio recording. A computing system can include a machine-learned health model comprising that includes a sound model trained to receive data descriptive of a patient audio recording and output sound description data. The computing system can include a diagnostic model trained to receive the sound description data and output a diagnostic score. The computing system can include at least one tangible, non-transitory computer-readable medium that stores instructions that, when executed, cause the processor to perform operations. The operations can include obtaining the patient audio recording; inputting data descriptive of the patient audio recording into the sound model; receiving, as an output of the sound model, the sound description data; inputting the sound description data into the diagnostic model; and receiving, as an output of the diagnostic model, the diagnostic score.
    Type: Application
    Filed: May 4, 2018
    Publication date: November 25, 2021
    Inventors: Katherine Chou, Michael Dwight Howell, Kasumi Widner, Ryan Rifkin, Henry George Wei, Daniel Ellis, Alvin Rajkomar, Aren Jansen, David Michael Parish, Michael Philip Brenner
  • Publication number: 20210198196
    Abstract: Heptamethine cyanine fluorophore conjugates and conjugate precursors are disclosed. Methods of using the conjugates and conjugate precursors are also disclosed. The disclosed conjugates are neutral zwitterionic molecules and exhibit little or no aggregation.
    Type: Application
    Filed: February 18, 2021
    Publication date: July 1, 2021
    Applicant: The USA, as represented by the Secretary, Department of Health and Human Services
    Inventors: Martin John Schnermann, Michael Philip Luciano, Roger Rauhauser Nani
  • Publication number: 20210186774
    Abstract: Asymmetrical absorbent articles having printed regions to facilitate individual placement of the absorbent article are described.
    Type: Application
    Filed: March 3, 2021
    Publication date: June 24, 2021
    Inventors: Christine Gail LUZADER, Michael Philip KRELL, Maria Fernanda PÁEZ
  • Publication number: 20210117356
    Abstract: A tile of an FPGA provides memory, arithmetic functions, or both. Connections directly between multiple instances of the tile are available, allowing multiple tiles to be treated as larger memories or arithmetic circuits. By using these connections, referred to as cascade inputs and outputs, the input and output bandwidth of the arithmetic and memory circuits are increased, operand sizes are increased, or both. By using the cascade connections, multiple tiles can be used together as a single, larger tile. Thus, implementations that need memories of different sizes, arithmetic functions operating on different sized operands, or both, can use the same FPGA without additional programming or waste. Using cascade communications, more tiles are used when a large memory is needed and fewer tiles are used when a small memory is needed and the waste is avoided.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 22, 2021
    Inventors: Daniel Pugh, Raymond Nijssen, Michael Philip Fitton, Marcel Van der Goot
  • Patent number: 10977220
    Abstract: In one embodiment, a software system automatically generates a fully functional user interface (UI) based upon any underlying schema within a relational database management system (RDBMS). The UI derives from an automated interrogation of the schema, and comprises all mode displays (e.g., browse, search, edit, add) for all tables, along with integrated mechanisms for representing, navigating and managing relationships across tables. It utilizes a hierarchical “context stack” for suspending the working state of a particular table while “drilling down” to work with related-table information and (potentially) return relevant changes to the base table. The UI presentation resolves cross-table relationships so as to supplant internal key fields from the primary table with corresponding descriptive fields derived from the related tables.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: April 13, 2021
    Inventor: Michael Philip Kaufman
  • Patent number: 10959888
    Abstract: Asymmetrical absorbent articles having printed regions to facilitate individual placement of the absorbent article are described.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: March 30, 2021
    Assignee: The Procter & Gamble Company
    Inventors: Christine Gail Luzader, Michael Philip Krell, Maria Fernanda Páez
  • Patent number: 10961193
    Abstract: Heptamethine cyanine fluorophore conjugates and conjugate precursors are disclosed. Methods of using the conjugates and conjugate precursors are also disclosed. The disclosed conjugates are neutral zwitterionic molecules and exhibit little or no aggregation.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: March 30, 2021
    Assignee: The USA, as represented by the Secretary, Department of Health and Human Services
    Inventors: Martin John Schnermann, Michael Philip Luciano, Roger Rauhauser Nani
  • Patent number: 10947158
    Abstract: Devices, systems, and methods of the present disclosure are generally directed to building material including particles of a polymer in an irradiated form, a cement including calcium oxide, and at least one additive including silicon dioxide. In cement paste formed from a mixture of these components, the polymer in the irradiated form may decrease porosity as compared to porosity of cement paste formed without the polymer, and a combination of the silicon dioxide and the calcium oxide may form high-density phases in the cement paste. With these characteristics, such cement paste may exhibit at least the same compressive strength as cement paste formed from the cement by itself. Thus, in certain instances, the particles of the polymer may displace a portion of the cement in a manner that maintains compressive strength while facilitating reduction of greenhouse gas emissions associated with cement paste formation.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: March 16, 2021
    Assignee: Massachusetts Institute of Technology
    Inventors: Oral Buyukozturk, Michael Philip Short, Carolyn E. Schaefer, Michael Ortega, Anne E. White, Kunal Kupwade-Patil
  • Publication number: 20210042087
    Abstract: A tile of an FPGA includes a multiple mode arithmetic circuit. The multiple mode arithmetic circuit is configured by control signals to operate in an integer mode, a floating-point mode, or both. In some example embodiments, multiple integer modes (e.g., unsigned, two's complement, and sign-magnitude) are selectable, multiple floating-point modes (e.g., 16-bit mantissa and 8-bit sign, 8-bit mantissa and 6-bit sign, and 6-bit mantissa and 6-bit sign) are supported, or any suitable combination thereof. The tile may also fuse a memory circuit with the arithmetic circuits. Connections directly between multiple instances of the tile are also available, allowing multiple tiles to be treated as larger memories or arithmetic circuits. By using these connections, referred to as cascade inputs and outputs, the input and output bandwidth of the arithmetic circuit is further increased.
    Type: Application
    Filed: August 8, 2019
    Publication date: February 11, 2021
    Inventors: Daniel Pugh, Raymond Nijssen, Michael Philip Fitton, Marcel Van der Goot
  • Publication number: 20210023417
    Abstract: A program is presented to a user including a stream of content including a first auditory content and a first visual content related to the workout. A context state of the user participating in the workout is determined based on information from a sensor. A responsive content is selectively added based on the context state of the user to the stream of content in a manner that avoids conflict with the stream of content.
    Type: Application
    Filed: August 17, 2020
    Publication date: January 28, 2021
    Inventors: Michael Philip Hand, Scott Matthew White
  • Publication number: 20210019041
    Abstract: Some embodiments include a system comprising an extended reality (XR) display device configured to display an XR interface to a user; at least one hardware processor communicatively coupled to the XR display device and configured to perform: receiving a model of a room; receiving a plurality of furniture models corresponding to a plurality of pieces of furniture; providing the XR interface using the model of the room and the plurality of furniture models at least in part by: displaying, via the XR display device, a furniture display comprising at least some of the plurality of furniture models and a search field to permit entry of text; detecting entry of a text string into the search field; identifying, using the text string, at least one furniture model from the plurality of furniture models; and displaying, via the XR display device, the at least one furniture model in the furniture display.
    Type: Application
    Filed: October 5, 2020
    Publication date: January 21, 2021
    Applicant: Wayfair LLC
    Inventors: Michael Philip Schenck, Shrenik Sadalgi, Michael Silvio Festa
  • Publication number: 20210017132
    Abstract: Heptamethine cyanine fluorophore conjugates and conjugate precursors are disclosed. Methods of using the conjugates and conjugate precursors are also disclosed. The disclosed conjugates are neutral zwitterionic molecules and exhibit little or no aggregation.
    Type: Application
    Filed: February 15, 2019
    Publication date: January 21, 2021
    Applicant: The USA, as represented by the Secretary, Department of Health and Human Services
    Inventors: Martin John Schnermann, Michael Philip Luciano, Roger Rauhauser Nani
  • Publication number: 20210013080
    Abstract: Apparatuses and systems for pedestals are provided. An example pedestal may have a body with an upper annular seal surface that is planar, perpendicular to a vertical center axis of the body, and has a radial thickness, a lower recess surface offset from the upper annular seal surface, and a plurality of micro-contact areas (MCAs) protruding from the lower recess surface, each MCA having a top surface offset from the lower recess surface by a second distance less, and one or more electrodes within the body. The upper annular seal surface may be configured to support an outer edge of a semiconductor substrate when the semiconductor substrate is being supported by the pedestal, and the upper annular seal surface and the tops of the MCAs may be configured to support the semiconductor substrate when the semiconductor substrate is being supported by the pedestal.
    Type: Application
    Filed: April 4, 2019
    Publication date: January 14, 2021
    Inventors: Patrick G. Breiling, Michael Philip Roberts, Chloe Baldasseroni, Ishtak Karim, Adrien LaVoie, Ramesh Chandrasekharan
  • Publication number: 20200373925
    Abstract: A tile of an FPGA fuses memory and arithmetic circuits. Connections directly between multiple instances of the tile are also available, allowing multiple tiles to be treated as larger memories or arithmetic circuits. By using these connections, referred to as cascade inputs and outputs, the input and output bandwidth of the arithmetic circuit is further increased. The arithmetic unit accesses inputs from a combination of: the switch fabric, the memory circuit, a second memory circuit of the tile, and a cascade input. In some example embodiments, the routing of the connections on the tile is based on post-fabrication configuration. In one configuration, all connections are used by the memory circuit, allowing for higher bandwidth in writing or reading the memory. In another configuration, all connections are used by the arithmetic circuit.
    Type: Application
    Filed: July 28, 2020
    Publication date: November 26, 2020
    Inventors: Daniel Pugh, Raymond Nijssen, Michael Philip Fitton
  • Publication number: 20200361939
    Abstract: The disclosure provides compounds useful for treating alpha-1 antitrypsin deficiency (AATD), according to formula (I): tautomers thereof, pharmaceutically acceptable salts of the compounds, pharmaceutically acceptable salts of the tautomers, deuterated derivatives of the compounds, deuterated derivatives of the tautomers, and deuterated derivatives of the salts, solid forms of those compounds and processes for making those compounds.
    Type: Application
    Filed: May 13, 2020
    Publication date: November 19, 2020
    Inventors: Upul Keerthi BANDARAGE, Cavan McKeon BLIGH, Diane BOUCHER, Michael John BOYD, Michael Aaron BRODNEY, Michael Philip CLARK, Veronique DAMAGNEZ, Lev Tyler Dewey FANNING, Robert Francis FIMOGNARI, Gabrielle Simone FLEMING, Kevin James GAGNON, Pedro Manuel GARCIA BARRANTES, Robert Daniel GIACOMETTI, Simon GIROUX, Ronald Lee GREY, Jr., Samantha GUIDO, Amy Beth HALL, Sarah Carol HOOD, Dennis James HURLEY, Mac Arthur JOHNSON, Jr., Peter Jones, Sarathy KESAVAN, Mei-Hsiu LAI, Siying LIU, Adam LOOKER, Brad MAXWELL, John Patrick MAXWELL, Ales MEDEK, Philippe Marcel NUHANT, Kirk Alan OVERHOFF, Setu RODAY, Stefanie ROEPER, Steven M. RONKIN, Rupa SAWANT, Yi SHI, Muna SHRESTHA, Marisa SPOSATO, Kathy STAVROPOULOS, Rebecca Jane SWETT, Timothy Lewis TAPLEY, Qing TANG, Stephen THOMSON, Jinwang XU, Mariam ZAKY
  • Patent number: 10838600
    Abstract: Some embodiments include a system comprising an extended reality (XR) display device configured to display an XR interface to a user; at least one hardware processor communicatively coupled to the XR display device and configured to perform: receiving a model of a room; receiving a plurality of furniture models corresponding to a plurality of pieces of furniture; providing the XR interface using the model of the room and the plurality of furniture models at least in part by: displaying, via the XR display device, a furniture display comprising at least some of the plurality of furniture models and a search field to permit entry of text; detecting entry of a text string into the search field; identifying, using the text string, at least one furniture model from the plurality of furniture models; and displaying, via the XR display device, the at least one furniture model in the furniture display.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: November 17, 2020
    Assignee: Wayfair LLC
    Inventors: Michael Philip Schenck, Shrenik Sadalgi, Michael Silvio Festa