Patents by Inventor Michael Pool
Michael Pool has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250094864Abstract: Machine learning is a process that learns a model from a given dataset, where the model can then be used to make a prediction about new data. In order to reduce the size, computation, and latency of a machine learning model, a compression technique can be employed which includes model sparsification and quantization. To limit the extent to which the quality of the model is impacted when uniformly applying sparsification and quantization to all values of the model, the present disclosure provides for a hybrid sparsification and quantization of the model.Type: ApplicationFiled: March 12, 2024Publication date: March 20, 2025Inventors: Po-An Tsai, Geonhwa Jeong, Jeffrey Michael Pool
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Publication number: 20240320912Abstract: A fractional training process can be performed training images to an instance of a machine-learned generative image model to obtain a partially trained instance of the model. A fractional optimization process can be performed with the partially trained instance to an instance of a machine-learned three-dimensional (3D) implicit representation model obtain a partially optimized instance of the model. Based on the plurality of training images, pseudo multi-view subject images can be generated with the partially optimized instance of the 3D implicit representation model and a fully trained instance of the generative image model; The partially trained instance of the model can be trained with a set of training data. The partially optimized instance of the machine-learned 3D implicit representation model can be trained with the machine-learned multi-view image model.Type: ApplicationFiled: March 20, 2024Publication date: September 26, 2024Inventors: Yuanzhen Li, Amit Raj, Varun Jampani, Benjamin Joseph Mildenhall, Benjamin Michael Poole, Jonathan Tilton Barron, Kfir Aberman, Michael Niemeyer, Michael Rubinstein, Nataniel Ruiz Gutierrez, Shiran Elyahu Zada, Srinivas Kaza
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Publication number: 20240248718Abstract: A method, computer readable medium, and processor are described herein for inline data inspection by using a decoder to decode a load instruction, including a signal to cause a circuit in a processor to indicate whether data loaded by a load instruction exceeds a threshold value. Moreover, an indication of whether data loaded by a load instruction exceeds a threshold value may be stored.Type: ApplicationFiled: April 3, 2024Publication date: July 25, 2024Inventors: Jeffrey Michael Pool, Andrew Kerr, John Tran, Ming Y. Siu, Stuart Oberman
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Publication number: 20240241687Abstract: Methods, systems, devices, and tangible non-transitory computer readable media for adaptive adjustment of playback. The disclosed technology can include accessing content data that includes one or more portions of content for a user. One or more content complexities of the one or more portions of content can be determined. One or more content relevancies of the one or more portions of content can be determined. One or more playback rates can be determined. The one or more playback rates can be based at least in part on the one or more content complexities or the one or more content relevancies. Furthermore, output associated with playback of the one or more portions of content can be generated at the one or more playback rates.Type: ApplicationFiled: August 31, 2021Publication date: July 18, 2024Inventors: Dara Gruber, Christopher Michael Poole
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Publication number: 20240152407Abstract: Apparatuses, systems, and techniques to determine a configuration based at least in part on data stored by at least one data structure of a workload at runtime, and transform the workload into a sparse workload based at least in part on the configuration. In at least one embodiment, one or more sparse workloads (e.g., one or more sparse neural networks) are generated based at least in part on, for example, one or more workloads (e.g., one or more neural networks).Type: ApplicationFiled: July 17, 2023Publication date: May 9, 2024Inventors: Geonhwa Jeong, Po-An Tsai, Jeffrey Michael Pool
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Patent number: 11977888Abstract: A method, computer readable medium, and processor are described herein for inline data inspection by using a decoder to decode a load instruction, including a signal to cause a circuit in a processor to indicate whether data loaded by a load instruction exceeds a threshold value. Moreover, an indication of whether data loaded by a load instruction exceeds a threshold value may be stored.Type: GrantFiled: February 22, 2023Date of Patent: May 7, 2024Assignee: NVIDIA CorporationInventors: Jeffrey Michael Pool, Andrew Kerr, John Tran, Ming Y. Siu, Stuart Oberman
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Publication number: 20230221957Abstract: A method, computer readable medium, and processor are described herein for inline data inspection by using a decoder to decode a load instruction, including a signal to cause a circuit in a processor to indicate whether data loaded by a load instruction exceeds a threshold value. Moreover, an indication of whether data loaded by a load instruction exceeds a threshold value may be stored.Type: ApplicationFiled: February 22, 2023Publication date: July 13, 2023Inventors: Jeffrey Michael Pool, Andrew Kerr, John Tran, Ming Y. Siu, Stuart Oberman
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Patent number: 11609761Abstract: A method, computer readable medium, and processor are described herein for inline data inspection by using a decoder to decode a load instruction, including a signal to cause a circuit in a processor to indicate whether data loaded by a load instruction exceeds a threshold value. Moreover, an indication of whether data loaded by a load instruction exceeds a threshold value may be stored.Type: GrantFiled: December 9, 2019Date of Patent: March 21, 2023Assignee: NVIDIA CORPORATIONInventors: Jeffrey Michael Pool, Andrew Kerr, John Tran, Ming Y. Siu, Stuart Oberman
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Publication number: 20230059708Abstract: The present disclosure provides a computer-implemented method for determining an optimized list of sets of hyperparameter values for application to an additional machine learning task. The method includes obtaining data describing a plurality of different machine learning tasks. The method includes obtaining a plurality of candidate sets of hyperparameter values. The method includes determining an ordered list of sets of hyperparameters selected from the plurality of candidate sets of hyperparameter values, wherein the ordered list of sets of hyperparameters minimizes an aggregate loss over the plurality of different machine learning tasks. The method includes storing the ordered list of sets of hyperparameters for use in training an additional machine learning model to perform an additional machine learning task.Type: ApplicationFiled: February 8, 2021Publication date: February 23, 2023Inventors: Luke Shekerjian Metz, Ruoxi Sun, Christian Daniel Freeman, Benjamin Michael Poole, Niru Maheswaranathan, Jascha Narain Sohl-Dickstein
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Patent number: 11522565Abstract: A packed error correction code (ECC) technique opportunistically embeds ECC check-bits with compressed data. When compressed, the data is encoded in fewer bits and is therefore fragmented when stored or transmitted compared with the uncompressed data. The ECC check-bits may be packed with compressed data at “source” points. The check-bits are transmitted along with the compressed data and, at any “intermediate” point between the source and a “destination” the check-bits may be used to detect and correct errors in the compressed data. In contrast with conventional systems, packed ECC enables end-to-end coverage for sufficiently-compressed data within the processor and also externally. While storage circuitry typically is protected by structure-specific ECC, protection is also beneficial for data as it is transmitted between processing and/or storage units.Type: GrantFiled: April 7, 2021Date of Patent: December 6, 2022Assignee: NVIDIA CorporationInventors: Michael Brendan Sullivan, Jeffrey Michael Pool, Yangxiang Huang, Timothy Kohchih Tsai, Siva Kumar Sastry Hari, Steven William Keckler
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Publication number: 20220329265Abstract: A packed error correction code (ECC) technique opportunistically embeds ECC check-bits with compressed data. When compressed, the data is encoded in fewer bits and is therefore fragmented when stored or transmitted compared with the uncompressed data. The ECC check-bits may be packed with compressed data at “source” points. The check-bits are transmitted along with the compressed data and, at any “intermediate” point between the source and a “destination” the check-bits may be used to detect and correct errors in the compressed data. In contrast with conventional systems, packed ECC enables end-to-end coverage for sufficiently-compressed data within the processor and also externally. While storage circuitry typically is protected by structure-specific ECC, protection is also beneficial for data as it is transmitted between processing and/or storage units.Type: ApplicationFiled: April 7, 2021Publication date: October 13, 2022Inventors: Michael Brendan Sullivan, Jeffrey Michael Pool, Yangxiang Huang, Timothy Kohchih Tsai, Siva Kumar Sastry Hari, Steven William Keckler
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Publication number: 20220327101Abstract: Apparatuses, systems, and techniques to transform data sets, such as matrices representing layers of neural networks, to increase sparsity and/or other characteristics of said data sets to improve performance in computations, such as neural network computations. In at least one embodiment, one or more subsets of data in one or more sets of data are rearranged as part of a process to increase sparsity in said one or more sets of data to satisfy one or more one or more structural sparsity constraints.Type: ApplicationFiled: May 18, 2021Publication date: October 13, 2022Inventors: Jeffrey Michael Pool, Chong Yu, Paulius Micikevicius
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Patent number: 11144033Abstract: A system includes a collaborative design system that includes a processor configured to display an industrial plant layout on a display. The processor is also configured to overlay the industrial plant layout onto a geographic image. Further, the processor is configured to receive one or more inputs from a plurality of remote users. In addition, the processor is configured to manipulate the layout with respect to the geographic image based on the one or more inputs. Moreover, the processor is configured to create an industrial plant design based on the industrial plant layout and the geographic image.Type: GrantFiled: July 6, 2018Date of Patent: October 12, 2021Assignee: General Electric CompanyInventors: Yanyan Wu, Michael Poole, Cherine Foutch, Daniel Kessler, William Masters
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Publication number: 20200125363Abstract: A method, computer readable medium, and processor are described herein for inline data inspection by using a decoder to decode a load instruction, including a signal to cause a circuit in a processor to indicate whether data loaded by a load instruction exceeds a threshold value. Moreover, an indication of whether data loaded by a load instruction exceeds a threshold value may be stored.Type: ApplicationFiled: December 9, 2019Publication date: April 23, 2020Inventors: Jeffrey Michael Pool, Andrew Kerr, John Tran, Ming Y. Siu, Stuart Oberman
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Patent number: 10503507Abstract: A method, computer readable medium, and system are disclosed for inline data inspection. The method includes the steps of receiving, by a load/store unit, a load instruction and obtaining, by an inspection circuit that is coupled to the load/store unit, data specified by the load instruction. Additional steps include determining that the data equals zero and transmitting the data and a predicate signal to the load/store unit, wherein the predicate signal indicates that the data equals zero. Alternative additional steps include computing a predicate value based on a comparison between the data and a threshold value and transmitting the data and the predicate value to the load/store unit, wherein the predicate value is asserted when the data is less than the threshold value and is negated when the data is not less than the threshold value.Type: GrantFiled: August 31, 2017Date of Patent: December 10, 2019Assignee: NVIDIA CorporationInventors: Jeffrey Michael Pool, Andrew Kerr, John Tran, Ming Y. Siu, Stuart Oberman
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Publication number: 20190065195Abstract: A method, computer readable medium, and system are disclosed for inline data inspection. The method includes the steps of receiving, by a load/store unit, a load instruction and obtaining, by an inspection circuit that is coupled to the load/store unit, data specified by the load instruction. Additional steps include determining that the data equals zero and transmitting the data and a predicate signal to the load/store unit, wherein the predicate signal indicates that the data equals zero. Alternative additional steps include computing a predicate value based on a comparison between the data and a threshold value and transmitting the data and the predicate value to the load/store unit, wherein the predicate value is asserted when the data is less than the threshold value and is negated when the data is not less than the threshold value.Type: ApplicationFiled: August 31, 2017Publication date: February 28, 2019Inventors: Jeffrey Michael Pool, Andrew Kerr, John Tran, Ming Y. Siu, Stuart Oberman
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Publication number: 20190011901Abstract: A system includes a collaborative design system that includes a processor configured to display an industrial plant layout on a display. The processor is also configured to overlay the industrial plant layout onto a geographic image. Further, the processor is configured to receive one or more inputs from a plurality of remote users. In addition, the processor is configured to manipulate the layout with respect to the geographic image based on the one or more inputs. Moreover, the processor is configured to create an industrial plant design based on the industrial plant layout and the geographic image.Type: ApplicationFiled: July 6, 2018Publication date: January 10, 2019Inventors: Yanyan Wu, Michael Poole, Siva Chockalingam, Cherine Foutch, Daniel Kessler, William Masters
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Patent number: 10096134Abstract: A method, computer program product, and system for sparse convolutional neural networks that improves efficiency is described. Multi-bit data for input to a processing element is received at a compaction engine. The multi-bit data is determined to equal zero and a single bit signal is transmitted from the memory interface to the processing element in lieu of the multi-bit data, where the single bit signal indicates that the multi-bit data equals zero. A compacted data sequence for input to a processing element is received by a memory interface. The compacted data sequence is transmitted from the memory interface to an expansion engine. Non-zero values are extracted from the compacted data sequence and zeros are inserted between the non-zero values by the expansion engine to generate an expanded data sequence that is output to the processing element.Type: GrantFiled: February 1, 2017Date of Patent: October 9, 2018Assignee: NVIDIA CorporationInventors: Zhou Yan, Franciscus Wilhelmus Sijstermans, Yuanzhi Hua, Xiaojun Wang, Jeffrey Michael Pool, William J. Dally, Liang Chen
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Publication number: 20180218518Abstract: A method, computer program product, and system for sparse convolutional neural networks that improves efficiency is described. Multi-bit data for input to a processing element is received at a compaction engine. The multi-bit data is determined to equal zero and a single bit signal is transmitted from the memory interface to the processing element in lieu of the multi-bit data, where the single bit signal indicates that the multi-bit data equals zero. A compacted data sequence for input to a processing element is received by a memory interface. The compacted data sequence is transmitted from the memory interface to an expansion engine. Non-zero values are extracted from the compacted data sequence and zeros are inserted between the non-zero values by the expansion engine to generate an expanded data sequence that is output to the processing element.Type: ApplicationFiled: February 1, 2017Publication date: August 2, 2018Inventors: Zhou Yan, Franciscus Wilhelmus Sijstermans, Yuanzhi Hua, Xiaojun Wang, Jeffrey Michael Pool, William J. Dally, Liang Chen
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Patent number: 9988866Abstract: A choke valve assembly, system, and method can be used with a drill string in a wellbore to aid in controlling the bottom hole pressure during drilling of the wellbore. The choke valve assembly can have a primary choke and one or more supplemental chokes, where these choke valves each have a controllable range relative to the flow and pressure of drilling fluid passing through the assembly. A control unit can automatically actuate the primary choke and one or more supplemental chokes in order to both maintain the choke valves within their controllable ranges and concurrently maintain a consistent boom hole pressure in the connected wellbore.Type: GrantFiled: December 12, 2014Date of Patent: June 5, 2018Assignee: HALLIBURTON ENERGY SERVICES, INC.Inventors: Nancy Suzan Cotten, Eric Miller, Charles Michael Pool