Patents by Inventor Michael R. Durham
Michael R. Durham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11922220Abstract: Embodiments of systems, apparatuses and methods provide enhanced function as a service (FaaS) to users, e.g., computer developers and cloud service providers (CSPs). A computing system configured to provide such enhanced FaaS service include one or more controls architectural subsystems, software and orchestration subsystems, network and storage subsystems, and security subsystems. The computing system executes functions in response to events triggered by the users in an execution environment provided by the architectural subsystems, which represent an abstraction of execution management and shield the users from the burden of managing the execution. The software and orchestration subsystems allocate computing resources for the function execution by intelligently spinning up and down containers for function code with decreased instantiation latency and increased execution scalability while maintaining secured execution.Type: GrantFiled: April 16, 2019Date of Patent: March 5, 2024Assignee: Intel CorporationInventors: Mohammad R. Haghighat, Kshitij Doshi, Andrew J. Herdrich, Anup Mohan, Ravishankar R. Iyer, Mingqiu Sun, Krishna Bhuyan, Teck Joo Goh, Mohan J. Kumar, Michael Prinke, Michael Lemay, Leeor Peled, Jr-Shian Tsai, David M. Durham, Jeffrey D. Chamberlain, Vadim A. Sukhomlinov, Eric J. Dahlen, Sara Baghsorkhi, Harshad Sane, Areg Melik-Adamyan, Ravi Sahita, Dmitry Yurievich Babokin, Ian M. Steiner, Alexander Bachmutsky, Anil Rao, Mingwei Zhang, Nilesh K. Jain, Amin Firoozshahian, Baiju V. Patel, Wenyong Huang, Yeluri Raghuram
-
Patent number: 11762575Abstract: An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.Type: GrantFiled: July 31, 2019Date of Patent: September 19, 2023Assignee: Hewlett-Packard Development Company, L.P.Inventors: Mark A. Piwonka, Stanley Hyojun Park, Michael R. Durham, Ted T. Nguy
-
Patent number: 11507177Abstract: An example of an apparatus is provided. The apparatus includes a power supply to connect to a power source. The power supply is to receive and to distribute a total power from the power source. The apparatus further includes a first device to receive a first portion of the total power from the power supply. The apparatus further includes a second device to receive a second portion of the total power from the power supply. A sum of the first portion and the second portion is the total power. In addition, the apparatus includes a controller to control the second device, wherein the controller is to determine the total power demanded by the first device and the second device. The controller is to reduce the second portion of the total power and to restore the second portion of the total power.Type: GrantFiled: May 17, 2019Date of Patent: November 22, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert C. Brooks, Michael R. Durham, Mark A. Piwonka, Jeffrey C. Stevens, Nam H. Nguyen
-
Publication number: 20220155990Abstract: An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.Type: ApplicationFiled: July 31, 2019Publication date: May 19, 2022Applicant: Hewlett-Packard Development Company, L.P.Inventors: Mark A. Piwonka, Stanley Hyojun Park, Michael R. Durham, Ted T. Nguy
-
Publication number: 20220075441Abstract: An example of an apparatus is provided. The apparatus includes a power supply to connect to a power source. The power supply is to receive and to distribute a total power from the power source. The apparatus further includes a first device to receive a first portion of the total power from the power supply. The apparatus further includes a second device to receive a second portion of the total power from the power supply. A sum of the first portion and the second portion is the total power. In addition, the apparatus includes a controller to control the second device, wherein the controller is to determine the total power demanded by the first device and the second device. The controller is to reduce the second portion of the total power and to restore the second portion of the total power.Type: ApplicationFiled: May 17, 2019Publication date: March 10, 2022Applicant: Hewlett-Packard Development Company, L.P.Inventors: Robert C. Brooks, Michael R. Durham, Mark A. Piwonka, Jeffrey C. Stevens, Nam H. Nguyen
-
Patent number: 11262825Abstract: A circuit for identifying a power supply may include a voltage divider to divide an identification voltage from the power supply. The output of the voltage divider is electrically coupled to an adapter identification pin of a controller to identify the power supply.Type: GrantFiled: November 2, 2018Date of Patent: March 1, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Michael R. Durham, Mark A. Piwonka
-
Patent number: 11204634Abstract: Example systems relate to power monitoring and reduction processes. An example system may include a modular computing device including a plurality of universal serial bus (USB) ports and a power supply unit coupled to the modular computing device. The example system may further include an embedded controller coupled to the power supply unit and to the plurality of USB port. The embedded controller may monitor a level of power consumed by the system and determine whether a surge event has occurred in the system. In response to the determination that the surge event has occurred, the embedded controller may determine whether an agency event has occurred in the system and initiate a power reduction process in response to the determination.Type: GrantFiled: July 19, 2016Date of Patent: December 21, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert C Brooks, Michael R Durham, Mark A. Piwonka
-
Publication number: 20210157384Abstract: Example implementations relate to assigning power sources. An example system includes a network device and a computing device with a BIOS. The BIOS provides the network device a heartbeat in response to the computing device entering a hibernation state, assigns a power source to a network interface card (NIC) of the network device via a power delivery controller, and assigns the NIC to receive Wake-On-Lan (WOL) support. The system can place the computing device to a threshold power state responsive to the NIC receiving WOL support.Type: ApplicationFiled: July 20, 2018Publication date: May 27, 2021Applicant: Hewlett-Packard Development Company, L.P.Inventors: Mark A. Piwonka, Michael R. Durham, Scott W. Sanders, Javier Enrique Guerrero, Binh T. Truong
-
Patent number: 10996729Abstract: Example implementations relate to balancing a power load among USB ports. For example, an apparatus according to the present disclosure, may include a plurality of USB ports, and an embedded controller coupled to the plurality of USB ports. The embedded controller may determine that a first device is coupled to a USB port of the plurality of USB ports, and determine a power draw of the first device relative to a type of the USB port. The embedded controller may balance a power load among a remainder of the plurality of USB ports based on the power draw of the first device relative to the type of the USB port.Type: GrantFiled: July 12, 2016Date of Patent: May 4, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: Mark A Piwonka, Michael R Durham, Nam H Nguyen, Robert C Brooks, Chi So
-
Patent number: 10976792Abstract: In one example in accordance with the present disclosure, a power management device is described. The power monitoring device includes an input line to receive input power information from a power supply device. The input power information is indicative of a level of input power from the power supply device. A controller of the power monitoring device determines a scaling amount of the input power information based on a power rating of the power supply device. A programmable scaling device scales the input power information based on the scaling amount to generate output information and an output line passes the output information to a set of recipient devices.Type: GrantFiled: April 14, 2017Date of Patent: April 13, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert C. Brooks, Michael R. Durham, Christopher Woodbury
-
Patent number: 10879901Abstract: Example implementations relate to dual rail circuitry using FET pairs. For example, a circuit according to the present disclosure may include a first field-effect transistor (FET) pair coupled to a dual rail circuitry, a second FET pair coupled to the dual rail circuitry, and a controller coupled to the first FET pair and the second FET pair. The controller may switch a power supply to the dual rail circuitry using the first FET pair and the second FET pair. The dual rail circuitry may provide a power supply to a computing device from a first power supply coupled to the first FET pair or a second power supply coupled to the second FET pair.Type: GrantFiled: July 17, 2016Date of Patent: December 29, 2020Assignee: Hewlett-Packard Development Company, L.P.Inventors: Michael R Durham, Robert C Brooks
-
Publication number: 20200301494Abstract: In one example in accordance with the present disclosure, a power management device is described. The power monitoring device includes an input line to receive input power information from a power supply device. The input power information is indicative of a level of input power from the power supply device. A controller of the power monitoring device determines a scaling amount of the input power information based on a power rating of the power supply device. A programmable scaling device scales the input power information based on the scaling amount to generate output information and an output line passes the output information to a set of recipient devices.Type: ApplicationFiled: April 14, 2017Publication date: September 24, 2020Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Robert C. BROOKS, Michael R. DURHAM, Christopher WOODBURY
-
Patent number: 10768687Abstract: Examples herein disclose determining whether a computing device should implement a zero watt state according to an engagement of a button. The examples disconnect a power source to the computing device based upon the determination the computing device should implement the zero watt state.Type: GrantFiled: June 1, 2018Date of Patent: September 8, 2020Assignee: Hewlett-Packard Development Company, L.P.Inventors: Louis B. Hobson, Michael R. Durham, Robert S. Wright
-
Patent number: 10747287Abstract: According to examples, an apparatus may include a power circuit to transmit standby power to a device, a memory associated with the device to maintain first configuration data and second configuration data and a battery to provide backup power to the device. The device may, following a loss and a recovery of the standby power to the device, determine whether the backup power was lost during the loss of the standby power. The device may also, based on a determination that the backup power was lost during the loss of the standby power, read the first configuration data or may, based on a determination that the backup power was not lost during the loss of the standby power, read the second configuration data. The device may further apply the read one of the first configuration data or the second configuration data to configure the device.Type: GrantFiled: October 10, 2018Date of Patent: August 18, 2020Assignee: Hewlett-Packard Development Company, L.P.Inventors: Mark A. Piwonka, Michael R. Durham
-
Publication number: 20200142462Abstract: A circuit for identifying a power supply may include a voltage divider to divide an identification voltage from the power supply. The output of the voltage divider is electrically coupled to an adapter identification pin of a controller to identify the power supply.Type: ApplicationFiled: November 2, 2018Publication date: May 7, 2020Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Michael R. Durham, Mark A. Piwonka
-
Publication number: 20200117261Abstract: According to examples, an apparatus may include a power circuit to transmit standby power to a device, a memory associated with the device to maintain first configuration data and second configuration data and a battery to provide backup power to the device. The device may, following a loss and a recovery of the standby power to the device, determine whether the backup power was lost during the loss of the standby power. The device may also, based on a determination that the backup power was lost during the loss of the standby power, read the first configuration data or may, based on a determination that the backup power was not lost during the loss of the standby power, read the second configuration data. The device may further apply the read one of the first configuration data or the second configuration data to configure the device.Type: ApplicationFiled: October 10, 2018Publication date: April 16, 2020Inventors: Mark A. PIWONKA, Michael R. DURHAM
-
Patent number: 10585674Abstract: An example system includes a processor. The system also includes a peripheral interface that includes a controller communicatively coupled to the processor. The controller is to request information from a plurality of devices connected to the peripheral interface prior to the processor requesting the information. The controller is to provide the information to the processor.Type: GrantFiled: August 22, 2016Date of Patent: March 10, 2020Assignee: Hewlett-Packard Development Company, L.P.Inventors: Mark A. Piwonka, Michael R. Durham, Nam H. Nguyen
-
Publication number: 20190171267Abstract: Example implementations relate to balancing a power load among USB ports. For example, an apparatus according to the present disclosure, may include a plurality of USB ports, and an embedded controller coupled to the plurality of USB ports. The embedded controller may determine that a first device is coupled to a USB port of the plurality of USB ports, and determine a power draw of the first device relative to a type of the USB port. The embedded controller may balance a power load among a remainder of the plurality of USB ports based on the power draw of the first device relative to the type of the USB port.Type: ApplicationFiled: July 12, 2016Publication date: June 6, 2019Applicant: Hewlett-Packard Development Company, L.P.Inventors: Mark A. PIWONKA, Michael R. DURHAM, Nam H. NGUYEN, Robert C. BROOKS, Chi SO
-
Publication number: 20190140646Abstract: Example implementations relate to dual rail circuitry using FET pairs. For example, a circuit according to the present disclosure may include a first field-effect transistor (FET) pair coupled to a dual rail circuitry, a second FET pair coupled to the dual rail circuitry, and a controller coupled to the first FET pair and the second FET pair. The controller may switch a power supply to the dual rail circuitry using the first FET pair and the second FET pair. The dual rail circuitry may provide a power supply to a computing device from a first power supply coupled to the first FET pair or a second power supply coupled to the second FET pair.Type: ApplicationFiled: July 17, 2016Publication date: May 9, 2019Inventors: Michael R Durham, Robert C Brooks
-
Publication number: 20190138074Abstract: Example systems relate to power monitoring and reduction processes. An example system may include a modular computing device including a plurality of universal serial bus (USB) ports and a power supply unit coupled to the modular computing device. The example system may further include an embedded controller coupled to the power supply unit and to the plurality of USB port. The embedded controller may monitor a level of power consumed by the system and determine whether a surge event has occurred in the system. In response to the determination that the surge event has occurred, the embedded controller may determine whether an agency event has occurred in the system and initiate a power reduction process in response to the determination.Type: ApplicationFiled: July 19, 2016Publication date: May 9, 2019Inventors: Robert C Brooks, Michael R Durham, Mark A. Piwonka