Abstract: An example system includes a processor. The system also includes a peripheral interface that includes a controller communicatively coupled to the processor. The controller is to request information from a plurality of devices connected to the peripheral interface prior to the processor requesting the information. The controller is to provide the information to the processor.

Abstract: Examples disclose a method, system, and computer readable media to configure a device within a computing system. The examples process configuration data when standby power is applied to the device. Additionally, the examples configure the device based on the configuration data, wherein the device is configured prior to initialization of the computing system.

Abstract: Examples herein disclose determining whether a computing device should implement a zero watt state according to an engagement of a button. The examples disconnect a power source to the computing device based upon the determination the computing device should implement the zero watt state.

Abstract: Examples of an apparatus, method, and instructions included on a machine-readable non-transitory storage medium are disclosed herein. In an example of the method, a first state is provided to enable a camera to record an image, a second state is provided to disable the camera, and a third state is provided to permit the camera to be enabled and disabled. Also in this example of the method, a button is actuated in the third state to an on position to enable the camera to record an image or an off position to disable the camera. Additionally in this example of the method, a signal is generated via an input device in the on position of the button to enable the camera to record an image or disable the camera.

Abstract: Examples herein disclose determining whether a computing device should implement a zero watt state according to an engagement of a button. The examples disconnect a power source to the computing device based upon the determination the computing device should implement the zero watt state.

Abstract: A system is disclosed that includes memory resources and one or more processing components coupled to the one or more memory resources. At least one of the memory resources stores a basic input/output system (BIOS). The one or more processing components are coupled to the memory resources to run a program for operating a point-of-sale (POS) terminal. The program enables a user to provide an input to open a cash drawer. A controller circuit receives a signal from the BIOS when the user provides the input and generates a pulse signal having a predetermined duration to cause a voltage signal to be transmitted to a solenoid of the cash drawer. The voltage signal causes the solenoid to change states in order to open the cash drawer.

Abstract: Examples of an apparatus, method, and instructions included on a machine-readable non-transitory storage medium are disclosed herein. in an example of the method, a first state is provided to enable a camera to record an image, a second state is provided to disable the camera, and a third state is provided to permit the camera to be enabled and disabled. Also in this example of the method, a button is actuated in the third state to an on position to enable the camera to record an image or an off position to disable the camera. Additionally in this example of the method, a signal is generated via an input device in the on position of the button to enable the camera to record an image or disable the camera.

Abstract: In one example in accordance with the present disclosure, a computing device is provided. The computing device includes an interface module and a power management module. The interface module is to provide a user interface that facilitates enabling and disabling of an always on feature, and further facilitates configuration of a permissible advanced configuration and power interface (ACPI) S3 state period. The power management module to receive a request to enter an ACPI S3 state, determine whether the always on feature is enabled, and in response to determining that the always on feature is enabled, determine whether the computing device is within a user-defined permissible ACPI S3 state period. In response to determining that the computing device is within the user-defined permissible ACPI S3 state period, the power management module is to set a wake event and cause the computing device to enter the ACPI S3 state.

Abstract: Example embodiments disclosed herein relate to determining whether power is supplied at a power level to a network powered device. A network connector can be used to provide power and communications to the network powered device. The network powered device can represent itself to power sourcing equipment as a device using power at the power level. An indicator indicates whether power is supplied at the power level.

Abstract: Example implementations relate to controlling a field-effect transistor (FET) switch in a load switch circuit. A digital pulse width modulated (PWM) voltage signal may be applied to a gate of a FET switch. The pulse width of the PWM voltage signal may be set to a first value. The pulse width of the digital PWM voltage signal may be digitally incremented to a second value. The digital PWM voltage signal having the pulse width of the second value may be applied to the gate of the FET switch.

Abstract: Examples herein disclose determining whether a computing device should implement a zero watt state according to an engagement of a button. The examples disconnect a power source to the computing device based upon the determination the computing device should implement the zero watt state.

Abstract: Example embodiments disclosed herein relate to locking a system management interrupt (SMI) enable register of a chipset. Example embodiments include at least one contact configuration register to configure a contact of a chipset, and a contact SMI enable register of a chipset to store an enable value or a disable value. In example embodiments, the disable value stored in the contact SMI enable register is to prevent the chipset from providing an SMI request to a processor in response to an SMI signal received at the contact. Example embodiments further include locking the contact SMI enable register.

Abstract: Embodiments herein relate to disablement of a connection between a battery and a connection module. In an embodiment, a connection between the battery and a connection module may be disabled if the connection module is drawing current from the battery or if a monitored signal transitions from a high logic level to the low logic level. The connection module is to draw the current or pull the signal down to a low logic level in response to one or more components related to the device becoming exposed or an enclosure related to the device being breached or opened.

Abstract: Examples disclose a method, system, and computer readable media to configure a device within a computing system. The examples process configuration data when standby power is applied to the device. Additionally, the examples configure the device based on the configuration data, wherein the device is configured prior to initialization of the computing system.

Abstract: In one example in accordance with the present disclosure, a computing device is provided. The computing device includes an interface module and a power management module. The interface module is to provide a user interface that facilitates enabling and disabling of an always on feature, and further facilitates configuration of a permissible advanced configuration and power interface (ACPI) S3 state period. The power management module to receive a request to enter an ACPI S3 state, determine whether the always on feature is enabled, and in response to determining that the always on feature is enabled, determine whether the computing device is within a user-defined permissible ACPI S3 state period. In response to determining that the computing device is within the user-defined permissible ACPI S3 state period, the power management module is to set a wake event and cause the computing device to enter the ACPI S3 state.

Abstract: A first controller can provide system state information and a second controller can receive the system state information. The second controller can be programmed to control the state of a component. The state of the component can be based on information programmed in the second controller and the system state information. The component can include an off state and an operating state indicated by a signal from the second controller.

Abstract: A computing system can include a monitor (150) to estimate a temperature of a storage device (120). The monitor estimates the temperature from an activity indicating signal of the storage device. A cooling device controller (155) can be connected to the monitor. The cooling device controller can control the output of a cooling device (115).

Abstract: A first controller can provide system state information and a second controller can receive the system state information. The second controller can be programmed to control the state of a component. The state of the component can be based on information programmed in the second controller and the system state information. The component can include an off state and an operating state indicated by a signal from the second controller.

Abstract: Example embodiments disclosed herein relate to locking a system management interrupt (SMI) enable register of a chipset. Example embodiments include at least one contact configuration register to configure a contact of a chipset, and a contact SMI enable register of a chipset to store an enable value or a disable value. In example embodiments, the disable value stored in the contact SMI enable register is to prevent the chipset from providing an SMI request to a processor in response to an SMI signal received at the contact. Example embodiments further include locking the contact SMI enable register.

Abstract: A first controller can provide system state information and a second controller can receive the system state information. The second controller can be programmed to control the state of a component. The state of the component can be based on information programmed in the second controller and the system state information. The component can include an off state and an operating state indicated by a signal from the second controller.