Abstract: A receiver node receives, over a communication fabric, a transaction packet that includes an identifier of a sender node and an identifier of a process at the sender node, the transaction packet sent by the process for a transaction. The receiver node performs authentication for the transaction based on the identifier of the process and the identifier of the sender node.

Abstract: A requester sends, to a responding component, a request to cause the responding component to perform a computation. The requester sends, to the responding component, a delayed read indication, where the delayed read indication indicates that a result of the computation is not to be returned to the requester from the responding component until a data value at a target address of the delayed read indication has changed. The requester receives, from the responding component, an acknowledgment of the delayed read indication, and after receiving the acknowledgment, receives a response to the request without the requester sending another request to the responding component.

Abstract: A control device performs an admissions control process with a first device to determine whether the first device is authorized to communicate over the communication fabric that supports memory semantic operations.

Abstract: A method includes transmitting, from a first component of an electronic device, a first transaction associated with a first sequence number to a second component of the electronic device based on a multicast protocol. The first transaction is independent of an Internet protocol. The method also includes receiving an acknowledgement message that corresponds to a positive acknowledgment message or a negative acknowledgement message. The method further includes in response to receiving the negative acknowledgement message, retransmitting the first transaction to the second component using the first sequence number based on the multicast protocol.

Abstract: The present disclosure provides an electronic device that includes a lower device configured to process local input/output communications between the electronic device and a host, wherein the lower device is stateless. The electronic device also includes a memory comprising a data flow identifier used to associate a data flow resource of the host with a data flow resource corresponding to the lower device. A data packet sent from the lower device to the host includes the data flow identifier.

Abstract: Methods and systems for communication in a heterogeneous distributed system are described. The described systems implement the described methods, where the method includes receiving data from at least one data source, by a data store computing device. The method further includes identifying a data source from amongst the at least one data source to have generated the data, based on host parameters associated with the data source and the data. Further, the method includes determining the data to be represented in a first data presentation based on the identified data source and the host parameters and transforming the data from the first data presentation to a second data presentation, where the data store computing device operates using the second data presentation.

Abstract: A first receiver device receives, from a sender device in a unicast communication, a data flow including a multicast identifier, the multicast identifier indicating that the data flow is to reach multiple receiver devices. The first receiver device determines that the data flow is to reach multiple receiver devices in response to detecting the multicast identifier. The first receiver device sends, to a second receiver device in a unicast communication, the data flow including the multicast identifier.

Abstract: A first component associated with an access controlled memory region receives a transaction request including a protocol header from a second component. The first component sends, to the second component, a negative acknowledgment in response to determining that the second component is not authorized to access the access controlled memory region, based on information in the protocol header.

Abstract: A system includes multiple memories. Access of at least one of the multiple memories uses an interface subsystem that includes a memory controller and a distinct media controller, the memory controller to issue a transaction-level access request. The media controller is associated with at least one memory and produces, in response to the transaction-level access request, at least one command according to a specification of the at least one memory. Data is migrated from a first of the multiple memories to a second of the multiple memories, without the data traversing through a cache memory in the processor during the migrating.

Abstract: A memory management unit receives a transaction request to perform an operation with respect to data in memory, the transaction request including control information. The memory management unit identifies, based on the control information, one of a plurality of versions of a given memory data, where the plurality of versions of the given memory data include a first version of the given memory data and a second version of the given memory data that is modified from the first version. The memory management unit accesses the identified version of the given memory data in response to the transaction request.

Abstract: In some examples, a chassis contains a fabric module and a plurality node modules that are arranged in a plurality of rows. The fabric module is positioned in a space between a first row and a second row of the plurality of rows, and the fabric module is connected to at least two node modules of the plurality of node modules to provide communications connectivity between the at least two node modules, the chassis to accept longitudinal insertion in a longitudinal direction of the plurality of node modules and the fabric module, the fabric module being removable in the longitudinal direction from the chassis by moving the fabric module in the space between the first row and the second row without first removing the node modules in the plurality of rows.

Abstract: According to an example, memory traffic including memory access commands is routed between compute nodes and memory nodes in a memory network. Other traffic is also routed in the memory network. The other traffic may include input/output traffic between the compute nodes and peripherals connected to the memory network.

Abstract: According to an example, a memory network includes memory nodes. The memory nodes may each include memory and control logic. The control logic may operate the memory node as a destination for a memory access invoked by a processor connected to the memory network and may operate the memory node as a router to route data or memory access commands to a destination in the memory network.

Abstract: A chassis is configured to hold at least one horizontal row of node modules and a fabric module. The fabric module can be positioned above or below the row so that it can communicatively couple two or more node modules. Each of the node modules and the fabric modules can be inserted into and removed from the chassis longitudinally.

Abstract: A method for processing inbound and/or outbound data wherein a processing policy is determined for a quantum of data. A quantum of inbound data is received and a data notification for the received data is prepared. The notification for the quantum of received inbound data is delivered to a processor according to the processing policy. When selecting a quantum of outbound data, an outbound data work request for the outbound data is prepared and delivered to an output unit according to the processing policy.

Abstract: An endpoint device (14) is registered in association with a host memory address in response to receipt of a request for a notification of a change in content state of the host memory address from the endpoint device (14). In response to a change in content state of the host memory address, a notification that the host memory address has changed content state is sent to the endpoint device (14). In response to receipt of the notification by the endpoint device (14), semantics associated with a change of content state of the host memory address by a data schema (42) is determined and an action is performed by the endpoint device (14) in accordance with the determined semantics.

Abstract: The present disclosure provides an electronic device that includes a lower device configured to process local input/output communications between the electronic device and a host, wherein the lower device is stateless. The electronic device also includes a memory comprising a data flow identifier used to associate a data flow resource of the host with a data flow resource corresponding to the lower device. A data packet sent from the lower device to the host includes the data flow identifier.

Abstract: The present disclosure provides a system for processing local input/output. The system includes a processor coupled to a host memory through a memory controller. The system also includes an upper device communicatively coupled to the memory controller. The upper device includes one or more transmit/receive work queues. The system also includes a lower device communicatively coupled to the upper device, wherein the lower device is stateless. Data packets passed between the upper device and the lower include a data flow identifier used to identify data flow resources of the upper device and the lower device corresponding to the data packet.

Abstract: The present disclosure provides a computer system that includes a processor coupled to a host memory through a memory controller. The computer system also includes an upper device communicatively coupled to the memory controller, the upper device configured to process local input/output received from or sent to a lower device. The computer system also includes a memory comprising a data flow identifier used to associate a data flow resource of the upper device with an external data flow resource corresponding to the lower device. A data packet received by the upper device from the lower device includes the data flow identifier.

Abstract: A chassis is configured to hold at least one horizontal row of node modules and a fabric module. The fabric module can be positioned above or below the row so that it can communicatively couple two or more node modules. Each of the node modules and the fabric modules can be inserted into and removed from the chassis longitudinally.