Patents by Inventor Michael Rogalli

Michael Rogalli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210375792
    Abstract: A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 2, 2021
    Applicant: Infineon Technologies AG
    Inventors: Harry Walter SAX, Johann GATTERBAUER, Wolfgang LEHNERT, Evelyn NAPETSCHNIG, Michael ROGALLI
  • Publication number: 20200043876
    Abstract: A package includes an electronic chip having a pad. The pad is at least partially covered with adhesion enhancing structures. The pad and the adhesion enhancing structures have at least aluminium in common.
    Type: Application
    Filed: July 24, 2019
    Publication date: February 6, 2020
    Inventors: Evelyn Napetschnig, Wei Cheat Lee, Wei Lee Lim, Frank Renner, Michael Rogalli
  • Patent number: 10446469
    Abstract: A semiconductor device includes a base element and a copper element over the base element. The copper element includes a layer stack having at least two copper layers and at least one intermediate conductive layer of a material different from copper. The at least two copper layers and the at least one intermediate conductive layer are alternately stacked over each other.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: October 15, 2019
    Assignee: Infineon Technologies AG
    Inventors: Thomas Detzel, Johann Gross, Robert Illing, Maximilian Krug, Sven Gustav Lanzerstorfer, Michael Nelhiebel, Werner Robl, Michael Rogalli, Stefan Woehlert
  • Publication number: 20180366427
    Abstract: A method of forming an aluminum oxide layer is provided. The method includes providing a metal surface including at least one metal of a group of metals, the group of metals consisting of copper, aluminum, palladium, nickel, silver, and alloys thereof. The method further includes depositing an aluminum oxide layer on the metal surface by atomic layer deposition, wherein a maximum processing temperature during the depositing is 280° C., such that the aluminum oxide layer is formed with a surface having a liquid solder contact angle of less than 40°.
    Type: Application
    Filed: June 19, 2018
    Publication date: December 20, 2018
    Inventors: Michael Rogalli, Johann Gatterbauer, Wolfgang Lehnert, Kurt Matoy, Evelyn Napetschnig, Manfred Schneegans, Bernhard Weidgans
  • Patent number: 10103123
    Abstract: Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: October 16, 2018
    Assignee: Infineon Technologies AG
    Inventors: Michael Rogalli, Wolfgang Lehnert
  • Publication number: 20170236801
    Abstract: Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.
    Type: Application
    Filed: March 10, 2017
    Publication date: August 17, 2017
    Inventors: Michael Rogalli, Wolfgang Lehnert
  • Publication number: 20160329263
    Abstract: A semiconductor device includes a base element and a copper element over the base element. The copper element includes a layer stack having at least two copper layers and at least one intermediate conductive layer of a material different from copper. The at least two copper layers and the at least one intermediate conductive layer are alternately stacked over each other.
    Type: Application
    Filed: July 22, 2016
    Publication date: November 10, 2016
    Inventors: Thomas Detzel, Johann Gross, Robert Illing, Maximilian Krug, Sven Gustav Lanzerstorfer, Michael Nelhiebel, Werner Robl, Michael Rogalli, Stefan Woehlert
  • Patent number: 9418937
    Abstract: An integrated circuit includes a base element and a copper element over the base element, the copper element having a thickness of at least 5 ?m and a ratio of average grain size to thickness of less than 0.7.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: August 16, 2016
    Assignee: Infineon Technologies AG
    Inventors: Thomas Detzel, Johann Gross, Robert Illing, Maximilian Krug, Sven Gustav Lanzerstorfer, Michael Nelhiebel, Werner Robl, Michael Rogalli, Stefan Woehlert
  • Patent number: 9385031
    Abstract: According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: July 5, 2016
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Michael Rogalli, Wolfgang Lehnert
  • Publication number: 20150357234
    Abstract: According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.
    Type: Application
    Filed: August 20, 2015
    Publication date: December 10, 2015
    Inventors: Michael Rogalli, Wolfgang Lehnert
  • Patent number: 9165821
    Abstract: According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: October 20, 2015
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Michael Rogalli, Wolfgang Lehnert
  • Publication number: 20150179507
    Abstract: According to one embodiment, a method for processing a semiconductor device is provided including forming a final metal layer forming a passivation layer over the final metal layer and structuring the passivation layer and the final metal layer to form a patterned metal layer and a patterned passivation layer, wherein the patterned metal layer includes a pad region covered by the patterned passivation layer.
    Type: Application
    Filed: December 23, 2013
    Publication date: June 25, 2015
    Applicant: Infineon Technologies AG
    Inventors: Michael Rogalli, Wolfgang Lehnert
  • Publication number: 20140110838
    Abstract: Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.
    Type: Application
    Filed: October 22, 2012
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Michael Rogalli, Wolfgang Lehnert
  • Publication number: 20130147047
    Abstract: An integrated circuit includes a base element and a copper element over the base element, the copper element having a thickness of at least 5 ?m and a ratio of average grain size to thickness of less than 0.7.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 13, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Detzel, Johann Gross, Robert Illing, Maximilian Krug, Sven Gustav Lanzerstorfer, Michael Nelhiebel, Werner Robl, Michael Rogalli, Stefan Woehlert
  • Publication number: 20080006098
    Abstract: A sensor device with a semiconductor substrate with at least one deformable region with a sensing element thereon that generates an output signal related to a force applied to the deformable region is shown. A wiring formed over the deformable region and deformable therewith has a deformation characteristic selected to reduce an output error characteristic of the sensor output signal. A method for manufacturing the sensor device is disclosed.
    Type: Application
    Filed: July 7, 2006
    Publication date: January 10, 2008
    Applicant: INFINEON TECHNOLOGIES
    Inventor: Michael Rogalli
  • Patent number: 7169716
    Abstract: A photosensitive resist (100) for coating on a semiconductor substrate or a mask comprises a photo acid generator (D), a solvent (E) and at least two different base polymers, of which a first base polymer comprises cycloaliphatic parent structures (A) which substantially absorb incident light at 248 nm and are substantially transparent to incident light at 193 nm, and a second base polymer comprises aromatic parent structures (B) which substantially absorb incident light at 193 nm and are substantially transparent to incident light at 248 nm. If such a resist (100) is applied in a coat thickness of from 50 to 400 nm to a substrate and the proportion of the second base polymer having the aromatic parent structure is between 1 and 25 mol %, a relatively high structure contrast, better stability to etching and a reduction of defects are advantageously achieved in an exposure at a wavelength of 193 nm. Exposure over the entire depth range of the resist (100) is ensured thereby.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: January 30, 2007
    Assignee: Infineon Technologies AG
    Inventors: Michael Rogalli, Lars Völkel
  • Patent number: 6958256
    Abstract: The present invention relates to a process for the back-surface grinding of wafers using films which have a support layer, which is known per se, and an adhesion layer which can be polymerized in steps, and to films which include such an adhesion layer which can be polymerized in steps, and to the use thereof.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: October 25, 2005
    Assignee: Infineon Technologies AG
    Inventors: Michael Rogalli, Manfred Schneegans
  • Publication number: 20050130444
    Abstract: A photosensitive resist (100) for coating on a semiconductor substrate or a mask comprises a photo acid generator (D), a solvent (E) and at least two different base polymers, of which a first base polymer comprises cycloaliphatic parent structures (A) which substantially absorb incident light at 248 nm and are substantially transparent to incident light at 193 nm, and a second base polymer comprises aromatic parent structures (B) which substantially absorb incident light at 193 nm and are substantially transparent to incident light at 248 nm. If such a resist (100) is applied in a coat thickness of from 50 to 400 nm to a substrate and the proportion of the second base polymer having the aromatic parent structure is between 1 and 25 mol %, a relatively high structure contrast, better stability to etching and a reduction of defects are advantageously achieved in an exposure at a wavelength of 193 nm. Exposure over the entire depth range of the resist (100) is ensured thereby.
    Type: Application
    Filed: November 29, 2004
    Publication date: June 16, 2005
    Inventors: Michael Rogalli, Lars Volkel
  • Publication number: 20050090114
    Abstract: The invention relates to a process for the production of a semiconductor apparatus, in which an etch step is carried out after an exposure step using light having a wavelength of 193 nm and a development step, the etch gas used containing an added reactive monomer. As a result, polymerization of the surface and hence sidewall passivation of the photoresist used are achieved.
    Type: Application
    Filed: October 29, 2002
    Publication date: April 28, 2005
    Inventors: Michael Rogalli, Alexander Reb, Lars Volkel, Maik Stegemann
  • Patent number: 6790737
    Abstract: A method for producing metal layers on surfaces of semiconductor substrates includes the step of providing a semiconductor substrate having a surface. In this case, a precursor compound of a metal to be deposited is condensed out on the semiconductor surface and subsequently decomposed thermally. The method makes it possible to fill trenches with a high aspect ratio, it being possible to effectively suppress the formation of voids.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: September 14, 2004
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Wolfgang Jaeger, Michael Rogalli