Patents by Inventor Michael Stadtmueller

Michael Stadtmueller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230343871
    Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; a trench formed in a first main surface of the semiconductor substrate; a field plate electrode in the trench and reaching a same level as the first main surface of the semiconductor substrate; an insulating material that separates the field plate electrode from the semiconductor substrate; and a material embedded in the field plate electrode. The field plate electrode is made of a different material than the material embedded in the field plate electrode. The trench adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. Additional device embodiments and methods of producing the semiconductor device are also described.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 26, 2023
    Inventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
  • Patent number: 11728427
    Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; an electrode structure on or in the semiconductor substrate, the electrode structure including an electrode and an insulating material that separates the electrode from the semiconductor substrate; and a strain-inducing material embedded in the electrode. The electrode structure adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. The electrode is under either tensile or compressive stress in the first direction. The strain-inducing material either enhances or at least partly counteracts the stress of the electrode in the first direction. Methods of producing the semiconductor device are also described.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: August 15, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
  • Publication number: 20220406937
    Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; an electrode structure on or in the semiconductor substrate, the electrode structure including an electrode and an insulating material that separates the electrode from the semiconductor substrate; and a strain-inducing material embedded in the electrode. The electrode structure adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. The electrode is under either tensile or compressive stress in the first direction. The strain-inducing material either enhances or at least partly counteracts the stress of the electrode in the first direction. Methods of producing the semiconductor device are also described.
    Type: Application
    Filed: June 21, 2021
    Publication date: December 22, 2022
    Inventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
  • Publication number: 20220157607
    Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.
    Type: Application
    Filed: February 8, 2022
    Publication date: May 19, 2022
    Inventors: Thomas Aichinger, Gerald Rescher, Michael Stadtmueller
  • Patent number: 11295951
    Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: April 5, 2022
    Assignee: Infineon Technologies AG
    Inventors: Thomas Aichinger, Gerald Rescher, Michael Stadtmueller
  • Patent number: 11127839
    Abstract: A method of manufacturing a trench oxide in a trench for a gate structure in a semiconductor substrate is described. The method includes: generating the trench in the semiconductor substrate; generating an oxide layer over opposing sidewalls of the trench; damaging at least a portion of the oxide layer by ion implantation; coating the oxide layer with an etching mask; generating at least one opening in the etching mask adjacent to one of the opposing sidewalls; and partly removing the oxide layer by etching the oxide layer beneath the etching mask down to an etching depth at the one of the opposing sidewalls by introducing an etching agent into the opening.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: September 21, 2021
    Assignee: Infineon Technologies AG
    Inventors: Moriz Jelinek, Kang Nan Khor, Armin Schieber, Michael Stadtmueller, Wei-Lin Sun
  • Publication number: 20200212203
    Abstract: A method of manufacturing a trench oxide in a trench for a gate structure in a semiconductor substrate is described. The method includes: generating the trench in the semiconductor substrate; generating an oxide layer over opposing sidewalls of the trench; damaging at least a portion of the oxide layer by ion implantation; coating the oxide layer with an etching mask; generating at least one opening in the etching mask adjacent to one of the opposing sidewalls; and partly removing the oxide layer by etching the oxide layer beneath the etching mask down to an etching depth at the one of the opposing sidewalls by introducing an etching agent into the opening.
    Type: Application
    Filed: December 20, 2019
    Publication date: July 2, 2020
    Inventors: Moriz Jelinek, Kang Nan Khor, Armin Schieber, Michael Stadtmueller, Wei-Lin Sun
  • Publication number: 20190311903
    Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.
    Type: Application
    Filed: April 3, 2019
    Publication date: October 10, 2019
    Inventors: Thomas Aichinger, Gerald Rescher, Michael Stadtmueller
  • Patent number: 10192955
    Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: January 29, 2019
    Assignee: Infineon Technologies AG
    Inventors: Johannes Georg Laven, Moriz Jelinek, Hans-Joachim Schulze, Werner Schustereder, Michael Stadtmueller
  • Patent number: 9881991
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: January 30, 2018
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
  • Publication number: 20180019306
    Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.
    Type: Application
    Filed: September 28, 2017
    Publication date: January 18, 2018
    Inventors: Johannes Georg Laven, Moriz Jelinek, Hans-Joachim Schulze, Werner Schustereder, Michael Stadtmueller
  • Patent number: 9825131
    Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: November 21, 2017
    Assignee: Infineon Technologies AG
    Inventors: Johannes Georg Laven, Moriz Jelinek, Hans-Joachim Schulze, Werner Schustereder, Michael Stadtmueller
  • Patent number: 9515162
    Abstract: A substrate having a buffer layer and a barrier layer is formed. The buffer and barrier layers have different bandgaps such that an electrically conductive channel comprising a two-dimensional charge carrier gas arises at an interface between the buffer and barrier layers due to piezoelectric effects. The substrate is placed in a fluorine containing gas mixture that includes free radical state fluorine particles and is substantially devoid of ionic state fluorine particles. A first lateral surface section of the substrate is exposed to the gas mixture such that the free radical state fluorine particles contact the first lateral surface section without penetrating the substrate. A semiconductor device that incorporates first lateral surface section in the structure of the device is formed in the substrate.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: December 6, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Maria Reiner, Clemens Ostermaier, Peter Lagger, Gerhard Prechtl, Oliver Haeberlen, Josef Schellander, Guenter Denifl, Michael Stadtmueller
  • Publication number: 20160329401
    Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.
    Type: Application
    Filed: May 4, 2016
    Publication date: November 10, 2016
    Inventors: Johannes Georg Laven, Moriz Jelinek, Hans-Joachim Schulze, Werner Schustereder, Michael Stadtmueller
  • Publication number: 20160260817
    Abstract: A substrate having a buffer layer and a barrier layer is formed. The buffer and barrier layers have different bandgaps such that an electrically conductive channel comprising a two-dimensional charge carrier gas arises at an interface between the buffer and barrier layers due to piezoelectric effects. The substrate is placed in a fluorine containing gas mixture that includes free radical state fluorine particles and is substantially devoid of ionic state fluorine particles. A first lateral surface section of the substrate is exposed to the gas mixture such that the free radical state fluorine particles contact the first lateral surface section without penetrating the substrate. A semiconductor device that incorporates first lateral surface section in the structure of the device is formed in the substrate.
    Type: Application
    Filed: March 4, 2015
    Publication date: September 8, 2016
    Inventors: Maria Reiner, Clemens Ostermaier, Peter Lagger, Gerhard Prechtl, Oliver Haeberlen, Josef Schellander, Guenter Denifl, Michael Stadtmueller
  • Publication number: 20160043164
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
    Type: Application
    Filed: October 20, 2015
    Publication date: February 11, 2016
    Inventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
  • Patent number: 9196675
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: November 24, 2015
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
  • Publication number: 20140145305
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
    Type: Application
    Filed: January 31, 2014
    Publication date: May 29, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
  • Patent number: 8685828
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: April 1, 2014
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
  • Publication number: 20120181656
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 19, 2012
    Inventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer