Patents by Inventor Michael Stadtmueller
Michael Stadtmueller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230343871Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; a trench formed in a first main surface of the semiconductor substrate; a field plate electrode in the trench and reaching a same level as the first main surface of the semiconductor substrate; an insulating material that separates the field plate electrode from the semiconductor substrate; and a material embedded in the field plate electrode. The field plate electrode is made of a different material than the material embedded in the field plate electrode. The trench adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. Additional device embodiments and methods of producing the semiconductor device are also described.Type: ApplicationFiled: June 30, 2023Publication date: October 26, 2023Inventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
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Patent number: 11728427Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; an electrode structure on or in the semiconductor substrate, the electrode structure including an electrode and an insulating material that separates the electrode from the semiconductor substrate; and a strain-inducing material embedded in the electrode. The electrode structure adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. The electrode is under either tensile or compressive stress in the first direction. The strain-inducing material either enhances or at least partly counteracts the stress of the electrode in the first direction. Methods of producing the semiconductor device are also described.Type: GrantFiled: June 21, 2021Date of Patent: August 15, 2023Assignee: Infineon Technologies Austria AGInventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
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Publication number: 20220406937Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; an electrode structure on or in the semiconductor substrate, the electrode structure including an electrode and an insulating material that separates the electrode from the semiconductor substrate; and a strain-inducing material embedded in the electrode. The electrode structure adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. The electrode is under either tensile or compressive stress in the first direction. The strain-inducing material either enhances or at least partly counteracts the stress of the electrode in the first direction. Methods of producing the semiconductor device are also described.Type: ApplicationFiled: June 21, 2021Publication date: December 22, 2022Inventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
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Publication number: 20220157607Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.Type: ApplicationFiled: February 8, 2022Publication date: May 19, 2022Inventors: Thomas Aichinger, Gerald Rescher, Michael Stadtmueller
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Patent number: 11295951Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.Type: GrantFiled: April 3, 2019Date of Patent: April 5, 2022Assignee: Infineon Technologies AGInventors: Thomas Aichinger, Gerald Rescher, Michael Stadtmueller
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Method of manufacturing a trench oxide in a trench for a gate structure in a semiconductor substrate
Patent number: 11127839Abstract: A method of manufacturing a trench oxide in a trench for a gate structure in a semiconductor substrate is described. The method includes: generating the trench in the semiconductor substrate; generating an oxide layer over opposing sidewalls of the trench; damaging at least a portion of the oxide layer by ion implantation; coating the oxide layer with an etching mask; generating at least one opening in the etching mask adjacent to one of the opposing sidewalls; and partly removing the oxide layer by etching the oxide layer beneath the etching mask down to an etching depth at the one of the opposing sidewalls by introducing an etching agent into the opening.Type: GrantFiled: December 20, 2019Date of Patent: September 21, 2021Assignee: Infineon Technologies AGInventors: Moriz Jelinek, Kang Nan Khor, Armin Schieber, Michael Stadtmueller, Wei-Lin Sun -
Method of Manufacturing a Trench Oxide in a Trench for a Gate Structure in a Semiconductor Substrate
Publication number: 20200212203Abstract: A method of manufacturing a trench oxide in a trench for a gate structure in a semiconductor substrate is described. The method includes: generating the trench in the semiconductor substrate; generating an oxide layer over opposing sidewalls of the trench; damaging at least a portion of the oxide layer by ion implantation; coating the oxide layer with an etching mask; generating at least one opening in the etching mask adjacent to one of the opposing sidewalls; and partly removing the oxide layer by etching the oxide layer beneath the etching mask down to an etching depth at the one of the opposing sidewalls by introducing an etching agent into the opening.Type: ApplicationFiled: December 20, 2019Publication date: July 2, 2020Inventors: Moriz Jelinek, Kang Nan Khor, Armin Schieber, Michael Stadtmueller, Wei-Lin Sun -
Publication number: 20190311903Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.Type: ApplicationFiled: April 3, 2019Publication date: October 10, 2019Inventors: Thomas Aichinger, Gerald Rescher, Michael Stadtmueller
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Patent number: 10192955Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.Type: GrantFiled: September 28, 2017Date of Patent: January 29, 2019Assignee: Infineon Technologies AGInventors: Johannes Georg Laven, Moriz Jelinek, Hans-Joachim Schulze, Werner Schustereder, Michael Stadtmueller
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Patent number: 9881991Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.Type: GrantFiled: October 20, 2015Date of Patent: January 30, 2018Assignee: Infineon Technologies AGInventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
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Publication number: 20180019306Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.Type: ApplicationFiled: September 28, 2017Publication date: January 18, 2018Inventors: Johannes Georg Laven, Moriz Jelinek, Hans-Joachim Schulze, Werner Schustereder, Michael Stadtmueller
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Patent number: 9825131Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.Type: GrantFiled: May 4, 2016Date of Patent: November 21, 2017Assignee: Infineon Technologies AGInventors: Johannes Georg Laven, Moriz Jelinek, Hans-Joachim Schulze, Werner Schustereder, Michael Stadtmueller
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Patent number: 9515162Abstract: A substrate having a buffer layer and a barrier layer is formed. The buffer and barrier layers have different bandgaps such that an electrically conductive channel comprising a two-dimensional charge carrier gas arises at an interface between the buffer and barrier layers due to piezoelectric effects. The substrate is placed in a fluorine containing gas mixture that includes free radical state fluorine particles and is substantially devoid of ionic state fluorine particles. A first lateral surface section of the substrate is exposed to the gas mixture such that the free radical state fluorine particles contact the first lateral surface section without penetrating the substrate. A semiconductor device that incorporates first lateral surface section in the structure of the device is formed in the substrate.Type: GrantFiled: March 4, 2015Date of Patent: December 6, 2016Assignee: Infineon Technologies Austria AGInventors: Maria Reiner, Clemens Ostermaier, Peter Lagger, Gerhard Prechtl, Oliver Haeberlen, Josef Schellander, Guenter Denifl, Michael Stadtmueller
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Publication number: 20160329401Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.Type: ApplicationFiled: May 4, 2016Publication date: November 10, 2016Inventors: Johannes Georg Laven, Moriz Jelinek, Hans-Joachim Schulze, Werner Schustereder, Michael Stadtmueller
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Publication number: 20160260817Abstract: A substrate having a buffer layer and a barrier layer is formed. The buffer and barrier layers have different bandgaps such that an electrically conductive channel comprising a two-dimensional charge carrier gas arises at an interface between the buffer and barrier layers due to piezoelectric effects. The substrate is placed in a fluorine containing gas mixture that includes free radical state fluorine particles and is substantially devoid of ionic state fluorine particles. A first lateral surface section of the substrate is exposed to the gas mixture such that the free radical state fluorine particles contact the first lateral surface section without penetrating the substrate. A semiconductor device that incorporates first lateral surface section in the structure of the device is formed in the substrate.Type: ApplicationFiled: March 4, 2015Publication date: September 8, 2016Inventors: Maria Reiner, Clemens Ostermaier, Peter Lagger, Gerhard Prechtl, Oliver Haeberlen, Josef Schellander, Guenter Denifl, Michael Stadtmueller
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Publication number: 20160043164Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.Type: ApplicationFiled: October 20, 2015Publication date: February 11, 2016Inventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
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Patent number: 9196675Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.Type: GrantFiled: January 31, 2014Date of Patent: November 24, 2015Assignee: Infineon Technologies AGInventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
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Publication number: 20140145305Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.Type: ApplicationFiled: January 31, 2014Publication date: May 29, 2014Applicant: INFINEON TECHNOLOGIES AGInventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
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Patent number: 8685828Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.Type: GrantFiled: January 14, 2011Date of Patent: April 1, 2014Assignee: Infineon Technologies AGInventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer
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Publication number: 20120181656Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.Type: ApplicationFiled: January 14, 2011Publication date: July 19, 2012Inventors: Wolfgang Lehnert, Michael Stadtmueller, Stefan Pompl, Markus Meyer