Abstract: Techniques are used to store information in a medium such as the memory cells of an integrated circuit, and also retrieval of information from the medium. The integrated circuit includes nonvolatile memory cells (416) capable of multilevel or analog voltage level storage. The integrated circuit may store or record information in analog or digital form, or both. Information is stored in and retrieved from the integrated circuit using a user-selected sampling frequency. The user's selection of the sampling frequency is stored within the integrated circuit.

Abstract: An integrated circuit detects the voltage level of the supply voltage to the integrated circuit. Circuity on the integrated circuit including the charge pump circuity adjusts to operate more effectively or efficiently at the voltage level of the supply voltage.

Abstract: A non-volatile Flash memory simultaneously performs an erase operation and a write or read operation in the same array of memory cells. The memory has a row based sector architecture, i.e., sectors that contain one or more complete rows of memory cells. During an erase operation, an erase voltage applied to the source lines for one or more rows corresponding to a sector does not affect write or read operations being performed in other sectors, i.e., other rows. Similarly, voltages applied to row lines for access to a memory cell have no effect on the erase operation being performed in another sector. A column line voltage applied for access to a memory cell has little affect on the erase operation. The memory can implement a look-ahead erase for a continuous reading or writing operation.

Abstract: An integrated circuit stores analog or digital information, or both, in memory cells (416). The memory cells provide analog or multilevel storage. Analog information is provided through an analog signal input (405), and digital information is provided through a digital signal input (407). A scheme for storing digital information is consistent with the scheme used to store analog information. Data is retrieved from the memory cells, and output to the analog or digital signal output (454, 463) depending on the type of data. A digital reference generator reference generator (425) generates various analog equivalent voltages for the digital signal input.

Abstract: A retainer for a ball grid array (BGA) fan is disclosed. The retainer has a pair of oppositely mated frame members each having a first flange, a second flange parallel to the first flange and extending from an inner face thereof and a space defined between the first and the second flanges for receiving the substrate therein; and means for engaging the fan with the mated frame members after the substrate is received between the opposite spaces.

Abstract: An integrated circuit memory is capable of storing analog information without the need for A/D conversion. Samples of a analog signal input are stored in nonvolatile memory cells. The integrated circuit is also capable of storing digital information in digital form. The sampling rate at which the analog signal input is sampled is user selectable. An internal signal path of the integrated circuit memory is differential, which enhances the precision with which the analog signal is stored in the memory cells.

Abstract: Level shifter circuits are used to configure analog or multilevel memory cells. A level shifter circuit generates an output voltage that is above the input voltage by an offset voltage value. The magnitude of this offset voltage or the relationship between the input and output voltages of the level shifter is adjustable or programmably selectable. Adjustments can be made after the integrated circuits is fabricated and packaged. Adjustments are made by configuring bits of data in the integrated circuit to indicate the offset voltage or other parameters. These configuration bits are implemented using latches, flip-flops, registers, memory cells, or other storage circuits.

Abstract: A programmable interconnect circuit includes multiple input/output cells, each corresponding to an input/output pin, and a global routing resource for routing signals received at the input pins to be output as output signals at output and bi-directional pins. The signals routed in the global routing resource can include multiplexer control signals, clock signals and output enable signals for controlling dynamic signal switching. The global routing resource allows high static routability.

Abstract: An apparatus for measuring ice amount of ice tank for ice-storage type air-conditioning system generally includes an operation control circuit and a software control flow for the operation control circuit, characterized in that the amount of ice in the ice tank is precisely calculated from the conductivity of the water in the ice tank through the operation control circuit as input data for energy management control system to improve the efficiency for the air-conditioning system.

Abstract: A locking device for locking a heat-dissipating member securely in position on the housing of a CPU is provided. The locking device includes a flexible securing piece which is an integral piece including an elongated flexible middle portion having one end formed into a first fastening portion and the other end formed into a coupling portion. The first fastening portion is formed with a first fastening hole, and the coupling portion is formed with an angled portion and a slot extending from the angled portion to near the hook-shaped portion. Further, the locking device includes a pressable fastening piece which includes a second fastening portion having a second fastening hole; a pair of hook-shaped pieces linked to the second fastening portion; a stopper linked to the hook-shaped pieces; and a press portion linked to the second fastening portion; wherein the hook-shaped pieces and the stopper are coupled to the slot in the coupling portion of the flexible securing piece.

Abstract: A heat sink assembly for a central processing unit (C.P.U.) of a computer consists of a baseplate to which a fan is attached, a plurality of spacers, a corresponding plurality of plates, the spacers and plates each defining a central opening and being alternately stacked on the baseplate and surrounding the fan, thereby defining vents leading to a central passage defined by the central openings, and a cover plate defining a further central opening communicating with the central passage. The base plate, spacers, plates and cover plate are secured to each other by bolts and screws extending through holes defined therein. Clips can be received around the C.P.U., the baseplate and a lowermost plate to removably secure them together. Cool ambient air is drawn into the assembly unit by the fan via the vents, which then passes up the central passage, being warmed by heat originally generated by the C.P.U. to exit via the central opening of the cover plate thereby discharging excess heat from the heat sink assembly.

Abstract: A heat sink assembly for computer chips includes a base plate, a fan and a combinative heat dissipation unit including a plurality of heat dissipation sheets having a plurality of slots therein and X-shaped washers which are alternatively stacked between the base plate and the fan. The combinative heat dissipation unit has a plurality of through openings from a top surface to a bottom surface thereof and transverse gaps in four side surfaces. The openings and gaps are in air communication thereby the heat generated by computer chips and conducted through the base plate to the combinative heat dissipation unit is rapidly carried away by air flow produced by the fan through the openings and gaps.