Abstract: A method, a system and a computer readable medium for three dimensional packaging with wafer-level bonding and chip-level repair. A first wafer is provided having a first plurality of chips. A second wafer is provided having a second plurality of chips. At least one chip is removed from the second wafer while retaining the relative alignment of the remaining chips in the second wafer. The first and second wafers are aligned and joined with wafer-to-wafer techniques. Where a bad chip having a relative physical position within the second wafer corresponding to a relative physical position within the first wafer of a good chip is removed, a good chip may be aligned and bonded to the first wafer using die-to-wafer techniques.

Abstract: A method, a system and a computer readable medium having a set of instructions stored thereon for die-to-robot alignment for die-to-substrate bonding are described. First, a robot is aligned with a substrate to provide a pre-aligned robot. Next, a die is aligned with the pre-aligned robot to provide a robot-aligned die. Finally, the robot-aligned die is bonded to a region of the substrate. The substrate is held stationary immediately following the aligning of the robot with the substrate and at least until the robot-aligned die is bonded to the region of the substrate.

Abstract: Embodiments of the invention teach a method for depositing a copper seed layer to a substrate surface, generally to a barrier layer. The method includes placing the substrate surface into a copper solution, wherein the copper solution includes complexed copper ions. A current or bias is applied across the substrate surface and the complexed copper ions are reduced to deposit the copper seed layer onto the barrier layer.

Abstract: In one embodiment, a method for depositing materials on a substrate is provided which includes forming a titanium nitride barrier layer on the substrate by sequentially exposing the substrate to a titanium precursor containing a titanium organic compound and a nitrogen plasma formed from a mixture of nitrogen gas and hydrogen gas. In another embodiment, the method includes exposing the substrate to the deposition gas containing the titanium organic compound to form a titanium-containing layer on the substrate, and exposing the titanium-containing layer disposed on the substrate to a nitrogen plasma formed from a mixture of nitrogen gas and hydrogen gas. The method further provides depositing a conductive material containing tungsten or copper over the substrate during a vapor deposition process. In some examples, the titanium organic compound may contain methylamido or ethylamido, such as tetrakis(dimethylamido)titanium, tetrakis(diethylamido)titanium, or derivatives thereof.

Abstract: Embodiments of the invention generally provide methods of filling contact level features formed in a semiconductor device by depositing a barrier layer over the contact feature and then filing the layer using an PVD, CVD, ALD, electrochemical plating process (ECP) and/or electroless deposition processes. In one embodiment, the barrier layer has a catalytically active surface that will allow the electroless deposition of a metal on the barrier layer. In one aspect, the electrolessly deposited metal is copper or a copper alloy. In one aspect, the contact level feature is filled with a copper alloy by use of an electroless deposition process. In another aspect, a copper alloy is used to from a thin conductive copper layer that is used to subsequently fill features with a copper containing material by use of an ECP, PVD, CVD, and/or ALD deposition process.

Abstract: Embodiments of the invention generally provide a fluid delivery system for an electrochemical plating platform. The fluid delivery system is configured to supply multiple chemistries to multiple plating cells with minimal bubble formation in the fluid delivery system. The system includes a solution mixing system, a fluid distribution manifold in communication with the solution mixing system, a plurality of fluid conduits in fluid communication with the fluid distribution manifold, and a plurality of fluid tanks, each of the plurality of fluid tanks being in fluid communication with at least one of the plurality of fluid conduits.

Abstract: In one embodiment, a method for forming a metal-containing material on a substrate is provided which includes forming a metal containing barrier layer on a substrate by a plasma-enhanced cyclical vapor deposition process, exposing the substrate to a soak process, and depositing a conductive material on the substrate by a second vapor deposition process. The substrate may be exposed to a silicon-containing compound (e.g., silane) during the soak process. In some examples, a metallic nitride layer may be deposited subsequent to the soak process and prior to the second vapor deposition process. In other examples, the metal containing barrier layer contains metallic titanium, the metallic nitride layer contains titanium nitride, and the conductive material contains tungsten or copper. The plasma-enhanced cyclical vapor deposition process may further include exposing the substrate to a nitrogen precursor, such as nitrogen, hydrogen, a nitrogen/hydrogen mixture, ammonia, hydrazine, or derivatives thereof.

Abstract: In one embodiment of the invention, a method for forming a tungsten-containing layer on a substrate is provided which includes positioning a substrate containing a barrier layer disposed thereon in a process chamber, exposing the substrate to a first soak process for a first time period and depositing a nucleation layer on the barrier layer by flowing a tungsten-containing precursor and a reductant into the process chamber. The method further includes exposing the nucleation layer to a second soak process for a second time period and depositing a bulk layer on the nucleation layer.

Abstract: Embodiments of the invention provide methods for depositing tungsten materials. In one embodiment, a method for forming a composite tungsten film is provided which includes positioning a substrate within a process chamber, forming a tungsten nucleation layer on the substrate by subsequently exposing the substrate to a tungsten precursor and a reducing gas containing hydrogen during a cyclic deposition process, and forming a tungsten bulk layer during a plasma-enhanced chemical vapor deposition (PE-CVD) process. The PE-CVD process includes exposing the substrate to a deposition gas containing the tungsten precursor while depositing the tungsten bulk layer over the tungsten nucleation layer. In some example, the tungsten nucleation layer has a thickness of less than about 100 ?, such as about 15 ?. In other examples, a carrier gas containing hydrogen is constantly flowed into the process chamber during the cyclic deposition process.

Abstract: In one embodiment of the invention, a method for forming a tungsten-containing layer on a substrate is provided which includes positioning a substrate containing a barrier layer disposed thereon in a process chamber, exposing the substrate to a first soak process for a first time period and depositing a nucleation layer on the barrier layer by flowing a tungsten-containing precursor and a reductant into the process chamber. The method further includes exposing the nucleation layer to a second soak process for a second time period and depositing a bulk layer on the nucleation layer.

Abstract: Methods for the deposition of tungsten films are provided. The methods include depositing a nucleation layer by alternatively adsorbing a tungsten precursor and a reducing gas on a substrate, and depositing a bulk layer of tungsten over the nucleation layer.

Abstract: Embodiments of the invention may generally provide a small volume electrochemical plating cell. The plating cell generally includes a fluid basin configured to contain a plating solution therein, the fluid basin having a substantially horizontal weir. The cell further includes an anode positioned in a lower portion of the fluid basin, the anode having a plurality of parallel channels formed therethrough, and a base member configured to receive the anode, the base member having a plurality of groves formed into an anode receiving surface, each of the plurality of grooves terminating into an annular drain channel. A membrane support assembly configured to position a membrane immediately above the anode in a substantially planar orientation with respect to the anode surface is provided, the membrane support assembly having a plurality of channels and bores formed therein.

Abstract: Embodiments of the invention generally provide an electrochemical plating system. The plating system includes a substrate loading station positioned in communication with a mainframe processing platform, at least one substrate plating cell positioned on the mainframe, at least one substrate bevel cleaning cell positioned on the mainframe, and a stacked substrate annealing station positioned in communication with at least one of the mainframe and the loading station, each chamber in the stacked substrate annealing station having a heating plate, a cooling plate, and a substrate transfer robot therein.

Abstract: A valve control system for a semiconductor processing chamber includes a system control computer and a plurality of electrically controlled valves associated with the processing chamber. The system further includes a programmable logic controller in communication with the system control computer and operatively coupled to the electrically controlled valves. The refresh time for control of the valves may be less than 10 milliseconds. Consequently, valve control operations do not significantly extend the period of time required for highly repetitive cycling in atomic layer deposition processes. A hardware interlock may be implemented through the output power supply of the programmable logic controller.

Abstract: Embodiments of the invention provide a method for plating copper into features formed on a semiconductor substrate. The method includes positioning the substrate in a plating cell, wherein the plating cell includes a catholyte volume containing a catholyte solution, an anolyte volume containing an anolyte solution, an ionic membrane positioned to separate the anolyte volume from the catholyte volume, and an anode positioned in the anolyte volume. The method further includes applying a plating bias between the anode and the substrate, plating copper ions onto the substrate from the catholyte solution, and replenishing the copper ions plated onto the substrate from the catholyte solution with copper ions transported from the anolyte solution via the ionic membrane, wherein the catholyte solution has a copper concentration of greater than about 51 g/L.

Abstract: A method of forming a tantalum nitride layer for integrated circuit fabrication is disclosed. In one embodiment, the method includes forming a tantalum nitride layer by chemisorbing a tantalum precursor and a nitrogen precursor on a substrate disposed in a process chamber. A nitrogen concentration of the tantalum nitride layer is reduced by exposing the substrate to a plasma annealing process. A metal-containing layer is then deposited on the tantalum nitride layer by a deposition process.

Abstract: Embodiments of the invention generally relate to an apparatus and method of integration of titanium and titanium nitride layers. One embodiment includes providing one or more cycles of a first set of compounds such as a titanium precursor and a reductant, providing one or more cycles of a second set of compounds such as the titanium precursor and a silicon precursor and providing one or more cycles of a third set of compounds such as the titanium precursor and a nitrogen precursor. Another embodiment includes depositing a titanium layer on a substrate, depositing a passivation layer containing titanium silicide, titanium silicon nitride or combinations thereof over the titanium layer and subsequently depositing a titanium nitride layer over the passivation layer. Still another embodiment comprises depositing a titanium layer on a substrate, soaking the titanium layer with a silicon precursor and subsequently depositing a titanium nitride layer thereon.

Abstract: Embodiments of the present invention provide a process sequence and related hardware for filling a patterned feature on a substrate with a metal, such as copper. The sequence comprises first forming a reliable barrier layer in the patterned feature to prevent diffusion of the metal into the dielectric layer through which the patterned feature is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the barrier layer at the bottom of the patterned feature, depositing a second barrier layer, and then filling the patterned feature with a metal, such as copper.

Abstract: Embodiments of the present invention relate to an apparatus and method of plasma assisted deposition by generation of a plasma adjacent a processing region. One embodiment of the apparatus comprises a substrate processing chamber including a top shower plate, a power source coupled to the top shower plate, a bottom shower plate, and an insulator disposed between the top shower plate and the bottom shower plate. In one aspect, the power source is adapted to selectively provide power to the top shower plate to generate a plasma from the gases between the top shower plate and the bottom shower plate. In another embodiment, a power source is coupled to the top shower plate and the bottom shower plate to generate a plasma between the bottom shower plate and the substrate support.

Abstract: A method of forming a tantalum-nitride layer (204) for integrated circuit fabrication is disclosed. Alternating or co-reacting pulses of a tantalum containing precursor and a nitrogen containing precursor are provided to a chamber (100) to form layers (305, 307) of tantalum and nitrogen. The nitrogen precursor may be a plasma gas source. The resultant tantalum-nitride layer (204) may be used, for example, as a barrier layer. As barrier layers may be used with metal interconnect structures (206), at least one plasma anneal on the tantalum-nitride layer may be performed to reduce its resistivity and to improve film property.