Patents by Inventor Michel Marty

Michel Marty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8735208
    Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) forming, from the front surface of the substrate, areas of same conductivity type as the substrate but of higher doping level, extending deep under the front surface, these areas being bordered with insulating regions orthogonal to the front surface; b) thinning the substrate from the rear surface to the vicinity of these areas and all the way to the insulating regions; c) partially hollowing out the insulating regions on the rear to surface side; and d) performing a laser surface anneal of the rear surface of the substrate.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: May 27, 2014
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: François Roy, Michel Marty
  • Patent number: 8704282
    Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) thinning the substrate from its rear surface; b) depositing, on the rear surface of the thinned substrate, an amorphous silicon layer of same conductivity type as the substrate but of higher doping level; and c) annealing at a temperature enabling to recrystallized the amorphous silicon to stabilize it.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: April 22, 2014
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Michel Marty, François Roy, Jens Prima
  • Patent number: 8703528
    Abstract: A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: April 22, 2014
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Michel Marty, François Roy, Jens Prima
  • Publication number: 20130335666
    Abstract: A nanoprojector panel formed of an array of cells, each cell including a liquid crystal layer between upper and lower transparent electrodes, a MOS control transistor being arranged above the upper electrode, each transistor being covered with at least three metallization levels. The transistor of each cell extends in a corner of the cell so that the transistors of an assembly of four adjacent cells are arranged in a central region of the assembly. The upper metallization level extends above the transistors of each the assembly of four adjacent cells. The panel includes, for each assembly of four adjacent cells, a first conductive ring surrounding the transistors, the first ring extending from the lower metallization level to the upper electrode of each cell, with an interposed insulating material.
    Type: Application
    Filed: June 18, 2013
    Publication date: December 19, 2013
    Inventors: Michel Marty, Flavien Hirigoyen, Josep Segura Puchades, Hélène Wehbe-Alause, Umberto Rossini
  • Patent number: 8524522
    Abstract: A process for producing a microelectronic device includes producing a first semiconductor substrate which includes a first layer and a second layer present between a first side and a second side of the substrate. First electronic components and an interconnecting part are produced on and above the second side. The substrate is then thinned by a first selective etch applied from the first side and stopping on the first layer followed by a second selective etch stopping on the second layer. A second substrate is attached over the interconnecting part. The electronic components may comprise optoelectronic devices which are illuminated through the second layer.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: September 3, 2013
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Michel Marty, Didier Dutartre, Francois Roy, Pascal Besson, Jens Prima
  • Patent number: 8436440
    Abstract: A method for manufacturing a back-side illuminated image sensor, including the steps of: forming, inside and on top of an SOI-type silicon layer, components for trapping and transferring photogenerated carriers and isolation regions; forming a stack of interconnection levels on the silicon layer and attaching, on the interconnect stack, a semiconductor handle; removing the semiconductor support; forming, in the insulating layer and the silicon layer, trenches reaching the isolation regions; depositing a doped amorphous silicon layer, more heavily doped than the silicon layer, at least on the walls and the bottom of the trenches and having the amorphous silicon layer crystallize; and filling the trenches with a reflective material.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: May 7, 2013
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: Michel Marty, François Leverd
  • Publication number: 20120261732
    Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) thinning the substrate from its rear surface; b) depositing, on the rear surface of the thinned substrate, an amorphous silicon layer of same conductivity type as the substrate but of higher doping level; and c) annealing at a temperature enabling to recrystallized the amorphous silicon to stabilize it.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 18, 2012
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: Michel Marty, François Roy, Jens Prima
  • Publication number: 20120261783
    Abstract: A back-side illuminated image sensor formed from a thinned semiconductor substrate, wherein: a transparent conductive electrode, insulated from the substrate by an insulating layer, extends over the entire rear surface of the substrate; and conductive regions, insulated from the substrate by an insulating coating, extend perpendicularly from the front surface of the substrate to the electrode.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 18, 2012
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: Jens PRIMA, François ROY, Michel MARTY
  • Publication number: 20120261670
    Abstract: A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 18, 2012
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: Michel Marty, François Roy, Jens Prima
  • Publication number: 20120261784
    Abstract: A method for forming a back-side illuminated image sensor from a semiconductor substrate, including the steps of: a) forming, from the front surface of the substrate, areas of same conductivity type as the substrate but of higher doping level, extending deep under the front surface, these areas being bordered with insulating regions orthogonal to the front surface; b) thinning the substrate from the rear surface to the vicinity of these areas and all the way to the insulating regions; c) partially hollowing out the insulating regions on the rear to surface side; and d) performing a laser surface anneal of the rear surface of the substrate.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 18, 2012
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.
    Inventors: François Roy, Michel Marty
  • Publication number: 20110221035
    Abstract: An integrated circuit is fabricated by producing metallization levels in insulating regions, the insulating region being formed of a first material having a first dielectric constant. At least one metal-insulator-metal capacitor is formed by providing metal electrodes in the metallization level, and locally replacing the first material, which is located between the metal electrodes, with a second material having a second dielectric constant greater than the first dielectric constant.
    Type: Application
    Filed: February 24, 2011
    Publication date: September 15, 2011
    Applicant: STMICROELECTRONICS S.A.
    Inventors: Simon Jeannot, Michel Marty, Jean-Christophe Giraudin
  • Publication number: 20110140220
    Abstract: A process for producing a microelectronic device includes producing a first semiconductor substrate which includes a first layer and a second layer present between a first side and a second side of the substrate. First electronic components and an interconnecting part are produced on and above the second side. The substrate is then thinned by a first selective etch applied from the first side and stopping on the first layer followed by a second selective etch stopping on the second layer. A second substrate is attached over the interconnecting part. The electronic components may comprise optoelectronic devices which are illuminated through the second layer.
    Type: Application
    Filed: December 9, 2010
    Publication date: June 16, 2011
    Applicants: STMicroelectronics S.A., STMicroelectronics (Crolles2) SAS
    Inventors: Michel Marty, Didier Dutartre, Francois Roy, Pascal Besson, Jens Prima
  • Publication number: 20110108939
    Abstract: A method for manufacturing a back-side illuminated image sensor, including the steps of: forming, inside and on top of an SOI-type silicon layer, components for trapping and transferring photogenerated carriers and isolation regions; forming a stack of interconnection levels on the silicon layer and attaching, on the interconnect stack, a semiconductor handle; removing the semiconductor support; forming, in the insulating layer and the silicon layer, trenches reaching the isolation regions; depositing a doped amorphous silicon layer, more heavily doped than the silicon layer, at least on the walls and the bottom of the trenches and having the amorphous silicon layer crystallize; and filling the trenches with a reflective material.
    Type: Application
    Filed: November 9, 2010
    Publication date: May 12, 2011
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Michel Marty, François Leverd
  • Patent number: 7902621
    Abstract: A semiconductor structure including a first active area under which is buried a first reflective layer and a least one second active area under which is buried a second reflective layer, wherein the upper surface of the second reflective layer is closer to the upper surface of the structure than the upper surface of the first reflective layer.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: March 8, 2011
    Assignee: STMicroelectronics S.A.
    Inventors: Perceval Coudrain, Philippe Coronel, Michel Marty, Matthieu Bopp
  • Patent number: 7824978
    Abstract: A bipolar transistor with very high dynamic performance, usable in an integrated circuit. The bipolar transistor has a single-crystal silicon emitter region with a thickness smaller than 50 nm. The base of the bipolar transistor is made of an SiGe alloy.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: November 2, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Alain Chantre, Bertrand Martinet, Michel Marty, Pascal Chevalier
  • Publication number: 20100160571
    Abstract: A curable composition has an olefin polymer including hydrolysable silane groups on its main chain; and to a latent compound suitable for releasing a curing catalyst under the action of a rise in temperature and/or actinic radiation.
    Type: Application
    Filed: December 9, 2009
    Publication date: June 24, 2010
    Inventors: Jérôme Alric, Olivier Pinto, Jean-Michel Marty, Mikael Abeguile
  • Patent number: 7691727
    Abstract: A method for manufacturing an integrated circuit containing fully and partially depleted MOS transistors, including the steps of forming similar MOS transistors on a thin silicon layer formed on a silicon-germanium layer resting on a silicon substrate; attaching the upper surface of the structure to a support wafer; eliminating the substrate; depositing a mask and opening this mask at the locations of the fully-depleted transistors; oxidizing the silicon-germanium at the locations of the fully-depleted transistors in conditions such that a condensation phenomenon occurs; and eliminating the oxidized portion and the silicon-germanium portion, whereby there remain transistors with a thinned silicon layer.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: April 6, 2010
    Assignees: STMicroelectronics S.A., STMicroelectronics Crolles 2 SAS
    Inventors: Philippe Coronel, Michel Marty
  • Patent number: 7687833
    Abstract: A monolithic assembly of electronic components including a semiconductor substrate, at a first level above the substrate, at least one bulk acoustic wave resonator, at a second level above the resonator, a single-crystal semiconductor layer in which are formed semiconductor components, and recesses under the semiconductor layer portions arranged above the resonators.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: March 30, 2010
    Assignees: STMicroelectronics S.A., STMicroelectronics Crolles 2 SAS
    Inventors: Michel Marty, Jean-Christophe Giraudin, Philippe Coronel
  • Publication number: 20090256224
    Abstract: A semiconductor structure including a first active area under which is buried a first reflective layer and a least one second active area under which is buried a second reflective layer, wherein the upper surface of the second reflective layer is closer to the upper surface of the structure than the upper surface of the first reflective layer.
    Type: Application
    Filed: March 5, 2009
    Publication date: October 15, 2009
    Applicant: STMicroelectronics S.A.
    Inventors: Perceval Coudrain, Philippe Coronel, Michel Marty, Matthieu Bopp
  • Patent number: 7476574
    Abstract: An integrated circuit semiconductor substrate includes an active silicon layer separated from a silicon substrate layer by a buried insulating material layer. The active silicon layer, however, locally includes at least one over-thickness on the side of the buried layer, while maintaining a flat surface state of the semiconductor layer across the integrated circuit. The over-thickness is created by forming a cavity under the active silicon layer in the local area, and then providing the over-thickness by partially filling the cavity at the bottom of the active silicon layer through epitaxial growth. An insulating layer then fills the remaining portions of the cavity.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: January 13, 2009
    Assignee: STMicroelectronics S.A.
    Inventors: Michel Marty, Grégory Avenier