Patents by Inventor Michiaki Hiyoshi
Michiaki Hiyoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10685901Abstract: A boiling cooling device e includes a power semiconductor that is vertically disposed, heat radiating plates provided on both side faces of the power semiconductor, heat receiving jackets provided at both sides of the power semiconductor and covering the heat radiating plates, refrigerant filled in the heat receiving jackets and being in contact with the heat radiating plates, a condenser connected to the heat receiving jackets, and fine longitudinal grooves formed on a heat radiating face of the heat radiating plate and extending in a vertical direction, where creation of air bubbles is promoted by heat generated in the power semiconductor and by the fine longitudinal grooves, the created air bubbles rising and passing through a forward pipe and then reaching the condenser to be liquefied, such that liquid is returned to the heat receiving jacket via a return pipe.Type: GrantFiled: November 20, 2018Date of Patent: June 16, 2020Assignees: Hyundai Motor Company, Kia Motors CorporationInventor: Michiaki Hiyoshi
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Patent number: 10541188Abstract: A power module includes: a substrate; a power conversion chip disposed on one surface of the substrate; and a radiation member bonded to another surface of the substrate. The radiation member has a contact surface configured to come into contact with the other surface of the substrate, and includes a fused area within the contact surface so as to be fused to the other surface of the substrate.Type: GrantFiled: September 11, 2017Date of Patent: January 21, 2020Assignees: Hyundai Motor Company, Kia Motors CorporationInventor: Michiaki Hiyoshi
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Publication number: 20190363035Abstract: A boiling cooling device e includes a power semiconductor that is vertically disposed, heat radiating plates provided on both side faces of the power semiconductor, heat receiving jackets provided at both sides of the power semiconductor and covering the heat radiating plates, refrigerant filled in the heat receiving jackets and being in contact with the heat radiating plates, a condenser connected to the heat receiving jackets, and fine longitudinal grooves formed on a heat radiating face of the heat radiating plate and extending in a vertical direction, where creation of air bubbles is promoted by heat generated in the power semiconductor and by the fine longitudinal grooves, the created air bubbles rising and passing through a forward pipe and then reaching the condenser to be liquefied, such that liquid is returned to the heat receiving jacket via a return pipe.Type: ApplicationFiled: November 20, 2018Publication date: November 28, 2019Inventor: Michiaki Hiyoshi
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Publication number: 20180082920Abstract: A power module includes: a substrate; a power conversion chip disposed on one surface of the substrate; and a radiation member bonded to another surface of the substrate. The radiation member has a contact surface configured to come into contact with the other surface of the substrate, and includes a fused area within the contact surface so as to be fused to the other surface of the substrate.Type: ApplicationFiled: September 11, 2017Publication date: March 22, 2018Inventor: Michiaki Hiyoshi
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Patent number: 9076774Abstract: In a semiconductor device where a metal circuit layer is disposed over a main planar surface of an insulating substrate, a semiconductor chip is connected by way of a solder over the metal circuit layer, and a metal wiring is connected over the metal circuit layer, in which a solder flow prevention area comprising a linear oxide material is formed between the semiconductor chip and the ultrasonic metal bonding region over the metal circuit layer.Type: GrantFiled: May 15, 2013Date of Patent: July 7, 2015Assignee: Hitachi Power Semiconductor Device, Ltd.Inventors: Yukihiro Kumagai, Michiaki Hiyoshi
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Patent number: 9000601Abstract: The respective main electrodes of the semiconductor switching elements such as IGBTs, which are respectively mounted on the plurality of insulating boards, are electrically connected to each other via the conductor member. This configuration makes it possible to suppress the occurrence of the resonant voltage due to the junction capacity and the parasitic inductance of each semiconductor switching element.Type: GrantFiled: June 26, 2012Date of Patent: April 7, 2015Assignee: Hitachi Power Semiconductor Device, Ltd.Inventors: Katsunori Azuma, Kentaro Yasuda, Takahiro Fujita, Katsuaki Saito, Yoshihiko Koike, Michiaki Hiyoshi
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Patent number: 8723320Abstract: A power module includes a substrate having a surface on which a plurality of wiring patterns are formed, a semiconductor device mounted on the substrate and electrically connected to a part of the plurality of wiring patterns, and a terminal portion with a lead electrically connected to the other part of the plurality of wiring patterns, and is configured that the lead of the terminal portion is formed by laminating a plurality of metal members which contain a material substantially the same as or softer than the material for forming the other part of wiring patterns, and the material of the plurality of metal members, which is the same as or softer than the material for forming the other part of wiring patterns is electrically connected to the other part of wiring patterns through ultrasonic bonding.Type: GrantFiled: June 29, 2012Date of Patent: May 13, 2014Assignee: Hitachi, Ltd.Inventors: Isamu Yoshida, Michiaki Hiyoshi, Takehide Yokozuka, Akihiro Muramoto
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Publication number: 20130313711Abstract: In a semiconductor device where a metal circuit layer is disposed over a main planar surface of an insulating substrate, a semiconductor chip is connected by way of a solder over the metal circuit layer, and a metal wiring is connected over the metal circuit layer, in which a solder flow prevention area comprising a linear oxide material is formed between the semiconductor chip and the ultrasonic metal bonding region over the metal circuit layer.Type: ApplicationFiled: May 15, 2013Publication date: November 28, 2013Applicant: Hitachi, Ltd.Inventors: Yukihiro KUMAGAI, Michiaki HIYOSHI
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Patent number: 8564953Abstract: In order to achieve reduction in loss, a semiconductor power module comprises DC terminals to be connected to a condenser module and the semiconductor power module is used in combination with a cooling jacket for cooling, and the DC terminals protrude toward the condenser module beyond the cooling jacket.Type: GrantFiled: January 26, 2011Date of Patent: October 22, 2013Assignee: Hitachi, Ltd.Inventors: Keisuke Horiuchi, Michiaki Hiyoshi, Koji Sasaki
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Patent number: 8519561Abstract: A power module includes an upper arm circuit unit and a lower arm circuit unit each having a power semiconductor element; an insulating substrate with the units mounted on one surface thereof; a metal base bonded onto the other surface of the substrate opposite to the one surface where the units are mounted; a first connection conductor for supplying a high potential to the upper unit from outside; a second connection conductor for supplying a low potential to the lower unit from outside; an insulating sheet interposed between the conductors; and a resin case disposed on the metal base to support the conductors, the conductors are flat conductors and laminated with the sheet sandwiched therebetween; the sheet extends from one end of the laminated structure to secure the creepage distance between the conductors; and the case is furnished with a recess for containing the laminated structure.Type: GrantFiled: June 29, 2010Date of Patent: August 27, 2013Assignee: Hitachi, Ltd.Inventors: Katsunori Azuma, Mutsuhiro Mori, Michiaki Hiyoshi, Seiichi Hayakawa, Koji Sasaki, Isamu Yoshida
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Patent number: 8472188Abstract: A semiconductor power module includes an insulated substrate with a plurality of power semiconductor devices mounted thereon and a heat sink for radiating heat generated from the plurality of power semiconductor devices, wherein the heat sink is integrally molded with a plurality of radiation fins on one surface of a planate base by forging work such that a metallic material filled into a female die of a predetermined shape is pressed by a male die of a predetermined shape, and the insulated substrate is bonded by metallic bonding to another surface of the base of the heat sink opposite the one surface of the base of the heat sink on which the radiation fins are formed.Type: GrantFiled: February 17, 2010Date of Patent: June 25, 2013Assignee: Hitachi, Ltd.Inventors: Keisuke Horiuchi, Atsuo Nishihara, Hiroshi Hozoji, Michiaki Hiyoshi, Takehide Yokozuka
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Publication number: 20130049201Abstract: A power module includes a substrate having a surface on which a plurality of wiring patterns are formed, a semiconductor device mounted on the substrate and electrically connected to a part of the plurality of wiring patterns, and a terminal portion with a lead electrically connected to the other part of the plurality of wiring patterns, and is configured that the lead of the terminal portion is formed by laminating a plurality of metal members which contain a material substantially the same as or softer than the material for forming the other part of wiring patterns, and the material of the plurality of metal members, which is the same as or softer than the material for forming the other part of wiring patterns is electrically connected to the other part of wiring patterns through ultrasonic bonding.Type: ApplicationFiled: June 29, 2012Publication date: February 28, 2013Applicant: Hitachi, Ltd.Inventors: Isamu YOSHIDA, Michiaki Hiyoshi, Takehide Yokozuka, Akihiro Muramoto
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Publication number: 20130001805Abstract: The respective main electrodes of the semiconductor switching elements such as IGBTs, which are respectively mounted on the plurality of insulating boards, are electrically connected to each other via the conductor member. This configuration makes it possible to suppress the occurrence of the resonant voltage due to the junction capacity and the parasitic inductance of each semiconductor switching element.Type: ApplicationFiled: June 26, 2012Publication date: January 3, 2013Inventors: Katsunori AZUMA, Kentaro Yasuda, Takahiro Fujita, Katsuaki Saito, Yoshihiko Koike, Michiaki Hiyoshi
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Publication number: 20110188204Abstract: In order to achieve reduction in loss, a semiconductor power module comprises DC terminals to be connected to a condenser module and the semiconductor power module is used in combination with a cooling jacket for cooling, and the DC terminals protrude toward the condenser module beyond the cooling jacket.Type: ApplicationFiled: January 26, 2011Publication date: August 4, 2011Applicant: Hitachi, Ltd.Inventors: Keisuke HORIUCHI, Michiaki Hiyoshi, Koji Sasaki
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Publication number: 20100327654Abstract: A power module includes an upper arm circuit unit and a lower arm circuit unit each having a power semiconductor element; an insulating substrate with the units mounted on one surface thereof; a metal base bonded onto the other surface of the substrate opposite to the one surface where the units are mounted; a first connection conductor for supplying a high potential to the upper unit from outside; a second connection conductor for supplying a low potential to the lower unit from outside; an insulating sheet interposed between the conductors; and a resin case disposed on the metal base to support the conductors, the conductors are flat conductors and laminated with the sheet sandwiched therebetween; the sheet extends from one end of the laminated structure to secure the creepage distance between the conductors; and the case is furnished with a recess for containing the laminated structure.Type: ApplicationFiled: June 29, 2010Publication date: December 30, 2010Applicant: Hitachi, Ltd.Inventors: Katsunori AZUMA, Mutsuhiro Mori, Michiaki Hiyoshi, Seiichi Hayakawa, Koji Sasaki, Isamu Yoshida
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Publication number: 20100208427Abstract: A semiconductor power module includes an insulated substrate mounting with a plurality of power semiconductor devices and a heat sink for radiating a heat generated from the plurality of power semiconductor devices, wherein the heat sink is integrally molded with a plurality of radiation fins on one surface of a planate base by forging work such that a metallic material filled into a female die of a predetermined shape is pressed by a male die of a predetermined shape, and the heat sink and the insulated substrate are bonded in metallic bonding with another surface opposite of one surface on which the radiation fins are formed with the base of the heat sink.Type: ApplicationFiled: February 17, 2010Publication date: August 19, 2010Inventors: Keisuke Horiuchi, Atsuo Nishihara, Hiroshi Hozoji, Michiaki Hiyoshi, Takehide Yokozuka
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Patent number: 6967402Abstract: This is a semiconductor power module provided with: a ceramic substrate; a metallic plate bonded to a surface of this substrate; a cylindrical metallic flange which is hermetically bonded to a surface of substrate or the metallic plate; a ceramic housing for hermetically sealing an opening of the metallic flange; and at least one or more semiconductor chips soldered to the metallic plate. The metallic flange is made of metal with a low thermal expansion coefficient. A hermetically sealed container is created by welding the metallic flange, the ceramic substrate and the housing with silver brazing. Moreover, external collector, emitter and gate electrodes are bonded on the housing by using the silver brazing. The collector, emitter and gate conductive pillars are respectively connected to the external collector, emitter and gate electrodes with calking. Thus, this hermetically sealed container is strong in mechanical strength and high in explosion-proof durability and excellent in moisture resistance.Type: GrantFiled: February 19, 2004Date of Patent: November 22, 2005Assignee: Kabushiki Kaisha ToshibaInventor: Michiaki Hiyoshi
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Patent number: 6967357Abstract: A voltage-driven power semiconductor device includes a voltage-driven IEGT chip, a collector electrode plate, an emitter electrode plate, and an inductance material. The collector electrode plate is connected to the collector of the IEGT chip, and press-contacts the IEGT chip from its collector side. The emitter electrode plate press-contacts the IEGT chip from its emitter side. The inductance material has an inductance component and connects the emitter of the IEGT chip and the emitter electrode plate. In the voltage-driven power semiconductor device having this arrangement, an induced electromotive force is generated in the inductance material arranged between the emitter of the IEGT chip and the emitter electrode plate. This induced electromotive force can suppress a steep current change (di/dt) upon an OFF operation, and can further suppress a steep voltage change (dv/dt) caused by the current change (di/dt).Type: GrantFiled: October 10, 2000Date of Patent: November 22, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Hironobu Kon, Yoshinori Iwano, Mitsuhiko Kitagawa, Shigeru Hasegawa, Michiaki Hiyoshi
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Publication number: 20040159940Abstract: This is a semiconductor power module provided with: a ceramic substrate; a metallic plate bonded to a surface of this substrate; a cylindrical metallic flange which is hermetically bonded to a surface of substrate or the metallic plate; a ceramic housing for hermetically sealing an opening of the metallic flange; and at least one or more semiconductor chips soldered to the metallic plate. The metallic flange is made of metal with a low thermal expansion coefficient. A hermetically sealed container is created by welding the metallic flange, the ceramic substrate and the housing with silver brazing. Moreover, external collector, emitter and gate electrodes are bonded on the housing by using the silver brazing. The collector, emitter and gate conductive pillars are respectively connected to the external collector, emitter and gate electrodes with calking. Thus, this hermetically sealed container is strong in mechanical strength and high in explosion-proof durability and excellent in moisture resistance.Type: ApplicationFiled: February 19, 2004Publication date: August 19, 2004Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Michiaki Hiyoshi
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Patent number: D598846Type: GrantFiled: February 26, 2009Date of Patent: August 25, 2009Assignee: Hitachi, Ltd.Inventors: Toshiya Satoh, Ryuichi Saito, Toshiki Kurosu, Michiaki Hiyoshi, Kinya Nakatsu, Katsunori Azuma