Abstract: According to one embodiment, in a semiconductor storage device, a peripheral circuit supplies a first voltage to a second region when supplying a select potential to a region corresponding to the second region, in a second conductive layer. The peripheral circuit supplies a second voltage higher than the first voltage to a first region when supplying a select potential to a region corresponding to the first region, in the second conductive layer.

Abstract: According to one embodiment, in a semiconductor storage device, a peripheral circuit supplies a first voltage to a second region when supplying a select potential to a region corresponding to the second region, in a second conductive layer. The peripheral circuit supplies a second voltage higher than the first voltage to a first region when supplying a select potential to a region corresponding to the first region, in the second conductive layer.

Abstract: An embodiment comprises: a plurality of stacked bodies, each of the stacked bodies including a plurality of control gate electrodes stacked in a first direction, the stacked bodies extending in a second direction intersecting the first direction; an insulating isolation layer disposed between a pair of the stacked bodies adjacent in a third direction intersecting the first direction and the second direction, the insulating isolation layer extending in the second direction; a plurality of semiconductor layers, each of the semiconductor layers extending in the first direction and having its side surface covered by the plurality of control gate electrodes, the semiconductor layers being disposed in a plurality of columns in one of the plurality of stacked bodies; a memory cell disposed between the control gate electrode and the semiconductor layer, the memory cell including a charge accumulation layer; a plurality of bit lines each connected to one end of the semiconductor layer, the bit lines extending in the t

Abstract: Transmission output detectors extract transmission outputs of a plurality of transmission branches, and an inter-branch error detector detects a combined signal level of the transmission outputs of the transmission branches to obtain an error detection signal. A correction controller calculates an amplitude error between the transmission branches based on an error detection signal, and calculates a phase error between the transmission branches based on an error detection signal which is obtained by changing the phases of the transmission branches. A phase controller and an amplitude controller correct the amplitude error and the phase error.

Abstract: Transmission output detectors extract transmission outputs of a plurality of transmission branches, and an inter-branch error detector detects a combined signal level of the transmission outputs of the transmission branches to obtain an error detection signal. A correction controller calculates an amplitude error between the transmission branches based on an error detection signal, and calculates a phase error between the transmission branches based on an error detection signal which is obtained by changing the phases of the transmission branches. A phase controller and an amplitude controller correct the amplitude error and the phase error.

Abstract: Transmission outputs of a plurality of transmission branches (101, 102) are extracted by coupler sections (161, 162). Branch detectors (121, 122) respectively detect the levels of the extracted signals of the respective transmission branches and a combination detector (130) detects an output obtained by combining two extracted outputs from the transmission branches by a signal combining section (110). An amplitude error is detected and corrected by comparing output levels of the branch detectors (121, 122), and a phase error is detected and corrected by an output level of the combination detector (130).

Abstract: Transmission outputs of a plurality of transmission branches (101, 102) are extracted by coupler sections (161, 162). Branch detectors (121, 122) respectively detect the levels of the extracted signals of the respective transmission branches and a combination detector (130) detects an output obtained by combining two extracted outputs from the transmission branches by a signal combining section (110). An amplitude error is detected and corrected by comparing output levels of the branch detectors (121, 122), and a phase error is detected and corrected by an output level of the combination detector (130).

Abstract: A received pulse signal based on an on-off keying modulation scheme is alternately sampled by AD conversion sections operated by a clock signal whose frequency is one-half of a transmission rate. In the synchronization, amounts of delay in sampling timing adjustment sections are made different from each other, whereby phases of two different points in a symbol pulse are sampled. An amount of delay in a variable delay section is adjusted in accordance with a result of comparison of the sampled values, thereby achieving synchronization. At the time of demodulation, the amount of delay in the variable delay section is held, and the amounts of delay in the sampling timing adjustment sections are switched to the same value, and the symbol pulse is alternately sampled. The sampled values are subjected to threshold value determination, and the determination result is subjected to parallel-to-serial conversion, whereby a demodulation output is acquired.

Abstract: A high speed high dynamic range and low power consumption analog correlator for use in a radar sensor. The analog correlator combines various pulse replication schemes with various parallel integrator architectures to improve the detection speed, dynamic range, and power consumption of conventional radar sensors. The analog correlator includes a replica generator, a multiplier, and an integrator module. The replica generator generates a template signal having a plurality of replicated pulse compression radar (PCR) pulses. The multiplier multiplies a received PCR signal with the plurality of replicated PCR pulses. The integrator module is coupled to the multiplier and configured to generate a plurality of analog correlation signals, each of which is based on the multiplying between the received PCR signal and one of the replicated PCR pulses.

Abstract: Systems, methods and apparatus related to a high speed, high dynamic range and low power consumption radar system are provided herein. The radar system may include an analog correlator which combines various pulse replication schemes with various parallel integrator architectures to improve the detection speed, dynamic range, and power consumption of conventional radar sensors. The radar system may further include a matched filter for determining a match of a portion of a received PCR signal and producing an output signal in response to further improve the speed of detection of the radar system.

Abstract: Systems, methods and apparatus related to a high speed, high dynamic range and low power consumption radar system are provided herein. The radar system may include an analog correlator which combines various pulse replication schemes with various parallel integrator architectures to improve the detection speed, dynamic range, and power consumption of conventional radar sensors. The radar system may further include a matched filter for determining a match of a portion of a received PCR signal and producing an output signal in response to further improve the speed of detection of the radar system.

Abstract: There is provided a low loss slow wave transmission line that can be miniaturized. A slow wave transmission line of the present invention has a configuration which includes a repeated arrangement of a low impedance line and a high impedance line and in which the high impedance line is longer than the low impedance line in terms of a line length.

Abstract: A code error detecting device that can more precisely detect a code error due to a delayed wave is disclosed. The code error detecting device includes a receiving antenna (121) for receiving a on-off keying modulated pulse and its code-reversed pulse, a pulse detector (124) for outputting detected data in accordance with the pulses, a code comparing unit (128) for comparing each code of first received data (R1) with one of second received data (R2), wherein the first and second received data are derived from the output detected data, and an error detecting unit (129) for detecting an error of each code from a comparison result (D2) indicative of a result compared in the code comparing unit (128).

Abstract: There are provided a plurality of systems of reconfigurable radio processing unit (102) whose function and performance can be modified. A control unit (104) collects quality information on the communication link in communication methods received at respective radio processing systems (102a, 102b). According to this, the control unit (104) selects an optimal communication method and transmission mode from a plurality of communication methods and transmission modes (for example, diversity transmission between a plurality of systems, diversity transmission by a single communication method, and MIMO channel multiplex transmission). By modifying configurations of the reconfigurable radio processing unit (102) according to the selected communication method and transmission mode, it is possible to communicate at a desired transmission mode. Thus, it is possible to perform an optimal transmission to the communication link according to the quality condition and other request condition.

Abstract: A high speed high dynamic range and low power consumption analog correlator for use in a radar sensor. The analog correlator combines various pulse replication schemes with various parallel integrator architectures to improve the detection speed, dynamic range, and power consumption of conventional radar sensors. The analog correlator includes a replica generator, a multiplier, and an integrator module. The replica generator generates a template signal having a plurality of replicated pulse compression radar (PCR) pulses. The multiplier multiplies a received PCR signal with the plurality of replicated PCR pulses. The integrator module is coupled to the multiplier and configured to generate a plurality of analog correlation signals, each of which is based on the multiplying between the received PCR signal and one of the replicated PCR pulses.

Abstract: A signal modulator that can control transmission power if level adjustment of a continuous signal from an oscillator is executed is provided. A pulse generator of one example of a signal modulator includes an oscillator, a control signal generator, a multiplier, a filter, and a control section. The oscillator and the multiplier are active circuits formed of active elements. A continuous signal is output from the oscillator and is input to the multiplier and the multiplier intermittently operates by a control signal output from the control signal generator, whereby a pulse signal is generated and the power level is easily adjusted by a signal from the control section.

Abstract: When a power supply switch is turned on and an RF signal and an LO signal are input to a bipolar transistor, a mixed signal of both signals is output as an IF signal. When the power supply switch is turned off, the bipolar transistor operates as two diodes connected between a base terminal and an emitter terminal and between the base terminal and a collector terminal. When the IF signal and the LO signal are input, the input signals are mixed with each other by the diodes and the RF signal is output. Accordingly, one frequency conversion is performed by the use of one frequency converter, an external circuit such as a signal path switching switch is not necessary.

Abstract: A pulse signal reception device of a comparatively simple configuration detects a signal sampled at an optimal clock timing for a pulse modulation signal having a signal width shorter than a symbol frequency. In this device, a time division unit (103) samples a data signal at a clock signal rise edge and outputs the sampled data signals to counters (104-1 to 104-3), respectively. The counters (104-1 to 104-3) count the number of High levels when the data signal becomes High level within a predetermined period, and a maximum value detection unit (105) outputs maximum data string information on a data string counted by a counter in which the maximum number of High levels has been detected among the counters (104-1 to 104-3) to a selection data judgment unit (106). The selection data judgment unit (106) judges which data string sampled at a particular timing is to be selected as a demodulation data string.

Abstract: A pulse transmitter having a relatively simple structure and generating a pulse modulating signal even at a high transmission rate. In the pulse transmitter, a symbol pulse generating part (103) generates a symbol pulse of amplitude level ? when data S1 is “0,” and that of amplitude level &ggr; when data S1 is “1” in the first pulse slot section, the data pulse generating part (104) generates a data pulse of amplitude level 0 when data S2 to Sn is “0,” and that of amplitude level ? when data S2 to Sn is “1” in a later pulse slot section. The relationship of the amplitude levels keep the relation ?<?<&ggr. An adder (105) adds the symbol pulse and the data pulse and outputs the sum as a pulse modulating signal.

Abstract: An object of the invention is to provide a multiplying oscillator capable of generating a high frequency signal by small circuit scale and power consumption in an oscillator for generating a signal with a frequency of a microwave band or more, and a local oscillator using this multiplying oscillator. A multiplying oscillator of the invention obtains a frequency signal four times or more a fundamental wave by adding a frequency adjusting unit 40 having a function of suppressing second harmonic of the fundamental wave to a resonance unit 20 in a multiplying oscillator which constructs an oscillator for connecting two negative resistance units 10 to 11 to the resonance unit 20 and generating a signal A and a signal B of mutually opposite phases in the fundamental wave and synthesizes the signal A and the signal B in phase in a synthetic unit 30 and obtains an oscillation signal output.