Patents by Inventor Michiaki Matsuo

Michiaki Matsuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8026779
    Abstract: An object is to provide a resonator and a vibrator with a high Q value in which dissipation of vibration energy in vibration of the vibrator is small, and a thickness of a support part of the vibrator of a beam structure is made thicker than a thickness of the vibrator and the support part is formed in axisymmetry with respect to a length direction of a beam. By this configuration, brittleness of the support part is improved and loss of vibration energy from the support part is reduced and also loss of vibration energy resulting from surface roughness of a surface of the vibrator can be reduced, so that a resonator having a high Q value can be provided.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: September 27, 2011
    Assignee: Panasonic Corporation
    Inventors: Kunihiko Nakamura, Michiaki Matsuo, Yoshito Nakanishi, Akinori Hashimura
  • Publication number: 20110121913
    Abstract: There is provided a low loss slow wave transmission line that can be miniaturized. A slow wave transmission line of the present invention has a configuration which includes a repeated arrangement of a low impedance line and a high impedance line and in which the high impedance line is longer than the low impedance line in terms of a line length.
    Type: Application
    Filed: July 15, 2009
    Publication date: May 26, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Junji Satou, Shigeru Kobayashi, Michiaki Matsuo
  • Patent number: 7898312
    Abstract: It is an object of the invention to provide a variable delay apparatus in which, even immediately after the delay amount of the variable delay apparatus is changed, a signal of a timing that is different from a set delay amount is not output. The variable delay apparatus of the invention includes: a variable delay block 108 having N (N is a natural number) delay elements 101a to 101n, and N selectors 102a to 102n; a variable delay block 109 having N delay elements 103a to 103n, and N selectors 104a to 104n; and a selector 107. After selection signals 105a to 105n and 106a to 106n are changed, and after an output timing of a delay amount set by the variable delay blocks 108, 109 is attained, the signal to be output is switched by the selector 107, thereby avoiding a situation where, immediately after the delay amount is changed, a signal of a timing that is different from the set delay amount is output as an output signal.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: March 1, 2011
    Assignee: Panasonic Corporation
    Inventors: Hideki Aoyagi, Hitoshi Asano, Kazuya Toki, Michiaki Matsuo, Suguru Fujita
  • Patent number: 7898354
    Abstract: It is an object of the invention to provide a pulse generation circuit and a modulator for realizing a high On/Off ratio in a small circuit scale and with lower power consumption. A short pulse generation circuit according to the invention includes an oscillator 101, a control signal generation circuit 102, an intermittent frequency multiplier 103, a filter 104, and an output terminal 105. The oscillator 101 and the intermittent frequency multiplier 103 are active circuits implemented as active elements. A continuous signal is output from the oscillator 101 and is input to the intermittent frequency multiplier 103 and the intermittent frequency multiplier 103 intermittently operates according to a control signal output from the control signal generation circuit 102, thereby generating a short pulse signal, and a spurious component is removed through the filter.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: March 1, 2011
    Assignee: Panasonic Corporation
    Inventors: Shigeru Kobayashi, Michiaki Matsuo, Suguru Fujita
  • Publication number: 20100279631
    Abstract: When a power supply switch is turned on and an RF signal and an LO signal are input to a bipolar transistor, a mixed signal of both signals is output as an IF signal. When the power supply switch is turned off, the bipolar transistor operates as two diodes connected between a base terminal and an emitter terminal and between the base terminal and a collector terminal. When the IF signal and the LO signal are input, the input signals are mixed with each other by the diodes and the RF signal is output. Accordingly, one frequency conversion is performed by the use of one frequency converter, an external circuit such as a signal path switching switch is not necessary.
    Type: Application
    Filed: July 14, 2010
    Publication date: November 4, 2010
    Applicant: Panasonic Corporation
    Inventors: Yoshifumi Hosokawa, Michiaki Matsuo, Noriaki Saito
  • Publication number: 20100271148
    Abstract: A signal modulator that can control transmission power if level adjustment of a continuous signal from an oscillator is executed is provided. A pulse generator of one example of a signal modulator includes an oscillator, a control signal generator, a multiplier, a filter, and a control section. The oscillator and the multiplier are active circuits formed of active elements. A continuous signal is output from the oscillator and is input to the multiplier and the multiplier intermittently operates by a control signal output from the control signal generator, whereby a pulse signal is generated and the power level is easily adjusted by a signal from the control section.
    Type: Application
    Filed: December 25, 2008
    Publication date: October 28, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Shigeru Kobayashi, Michiaki Matsuo, Junji Sato
  • Patent number: 7816953
    Abstract: A frequency dividing section is made up of a frequency divider for dividing output of a local oscillator, a frequency divider for dividing output of an in-phase local oscillation signal of the frequency divider, and a dummy circuit connected to the output terminal of a quadrature local oscillation signal of the frequency divider. At the first frequency band operation time, output of the frequency divider is used for modulation and demodulation and at the second frequency band operation time, output of the frequency divider is used for modulation and demodulation. Although the frequency divider is shared between the first and second frequency bands, the dummy circuit is made the same circuit as an input amplifier of the frequency divider at the first frequency band operation time, so that the phase difference between the in-phase local oscillation signal and the quadrature local oscillation signal output by the frequency divider can be kept.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: October 19, 2010
    Assignee: Panasonic Corporation
    Inventors: Yoshifumi Hosokawa, Noriaki Saito, Michiaki Matsuo, Yoshito Shimizu
  • Publication number: 20100246660
    Abstract: A received pulse signal based on an on-off keying modulation scheme is alternately sampled by AD conversion sections operated by a clock signal whose frequency is one-half of a transmission rate. In the synchronization, amounts of delay in sampling timing adjustment sections are made different from each other, whereby phases of two different points in a symbol pulse are sampled. An amount of delay in a variable delay section is adjusted in accordance with a result of comparison of the sampled values, thereby achieving synchronization. At the time of demodulation, the amount of delay in the variable delay section is held, and the amounts of delay in the sampling timing adjustment sections are switched to the same value, and the symbol pulse is alternately sampled. The sampled values are subjected to threshold value determination, and the determination result is subjected to parallel-to-serial conversion, whereby a demodulation output is acquired.
    Type: Application
    Filed: July 27, 2007
    Publication date: September 30, 2010
    Inventors: Michiaki Matsuo, Hideki Aoyagi, Hitoshi Asano, Kazuya Toki
  • Patent number: 7783266
    Abstract: When a power supply switch is turned on and an RF signal and an LO signal are input to a bipolar transistor, a mixed signal of both signals is output as an IF signal. When the power supply switch is turned off, the bipolar transistor operates as two diodes connected between a base terminal and an emitter terminal and between the base terminal and a collector terminal. When the IF signal and the LO signal are input, the input signals are mixed with each other by the diodes and the RF signal is output. Accordingly, one frequency conversion has a plus conversion gain and when bidirectional frequency conversion is performed by the use of one frequency converter, an external circuit such as a signal path switching switch is not necessary.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: August 24, 2010
    Assignee: Panasonic Corporation
    Inventors: Yoshifumi Hosokawa, Michiaki Matsuo, Noriaki Saito
  • Patent number: 7715841
    Abstract: A radio communication system includes a base station of a radio communication system A, a base station of a radio communication system B operation in non-synchronized way with the base station, and a mobile station capable of communicating with both of the radio communication system A and the radio communication system B. The base station includes a radio unit for transmitting/receiving a radio wave to/from the mobile station and a system information estimation unit for estimating the system information on the radio communication system B and outputting the system estimation information. The radio unit of the base station reports the system estimation information on the base station to the mobile station. The mobile station receives the system estimation information on the base station in advance so as to perform effective switching without using a cabled connection from the radio communication system A to the radio communication system B via a relay device or the like.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: May 11, 2010
    Assignee: Panasonic Corporation
    Inventors: Yoshifumi Hosokawa, Noriaki Saito, Katsuaki Abe, Michiaki Matsuo, Yoshito Shimizu, Junji Sato
  • Publication number: 20100090770
    Abstract: An object of the invention is to provide a multiplying oscillator capable of generating a high frequency signal by small circuit scale and power consumption in an oscillator for generating a signal with a frequency of a microwave band or more, and a local oscillator using this multiplying oscillator. A multiplying oscillator of the invention obtains a frequency signal four times or more a fundamental wave by adding a frequency adjusting unit 40 having a function of suppressing second harmonic of the fundamental wave to a resonance unit 20 in a multiplying oscillator which constructs an oscillator for connecting two negative resistance units 10 to 11 to the resonance unit 20 and generating a signal A and a signal B of mutually opposite phases in the fundamental wave and synthesizes the signal A and the signal B in phase in a synthetic unit 30 and obtains an oscillation signal output.
    Type: Application
    Filed: December 19, 2007
    Publication date: April 15, 2010
    Applicant: PANASONIC CORPORATION
    Inventor: Michiaki Matsuo
  • Patent number: 7684770
    Abstract: There are disclosed a transmission device and a reception device having a high secrecy making it difficult to wire tap by a third device. The transmission device includes a modulation section which can be modulated by a plurality of modulation methods and a transmission section which can transmit a radio signal by using a plurality of carrier frequencies. Moreover, the reception device includes a demodulation device which can demodulate by using a plurality of demodulation methods and a reception section which can receive a radio signal by using a plurality of carrier frequencies. The transmission communication method or the reception communication method is changed as the time elapses by changing the combination of the modulation method or demodulation method and the carrier frequency, thereby transmitting or receiving data.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: March 23, 2010
    Assignee: Panasonic Corporation
    Inventor: Michiaki Matsuo
  • Publication number: 20100020864
    Abstract: A pulse transmitting device is provided to avoid interference between pulses due to multipath influence even in a high speed pulse transmission that is typical of a UWB by making use of a relatively simple method and to improve receiving quality. In the device, a pulse adjusting unit (110) generates pulses in response to transmitting data, a non-use interval setting unit (120) sets up a non-use interval where the pulses generated by the pulse adjusting unit (110) are not transmitted on the basis of a delay time that a delayed pulse caused by the multipath delays from a main pulse and takes until arriving at a communication partner. A pulse position adjusting unit (130) adjusts a pulse position not to transmit the pulses during the non-use pulse interval. An RF transmitting unit (140) converts the pulse, the position of which is adjusted by the pulse position adjusting unit, to a wireless frequency band and transmits a pulse wireless signal after the conversion to the communication partner.
    Type: Application
    Filed: July 12, 2007
    Publication date: January 28, 2010
    Applicant: Panasonic Corporation
    Inventors: Michiaki Matsuo, Hitoshi Asano, Hideki Aoyagi, Kazuaki Takahashi, Yew Soo Eng
  • Publication number: 20090315605
    Abstract: It is an object of the invention to provide a variable delay apparatus in which, even immediately after the delay amount of the variable delay apparatus is changed, a signal of a timing that is different from a set delay amount is not output. The variable delay apparatus of the invention includes: a variable delay block 108 having N (N is a natural number) delay elements 101a to 101n, and N selectors 102a to 102n; a variable delay block 109 having N delay elements 103a to 103n, and N selectors 104a to 104n; and a selector 107. After selection signals 105a to 105n and 106a to 106n are changed, and after an output timing of a delay amount set by the variable delay blocks 108, 109 is attained, the signal to be output is switched by the selector 107, thereby avoiding a situation where, immediately after the delay amount is changed, a signal of a timing that is different from the set delay amount is output as an output signal.
    Type: Application
    Filed: August 7, 2007
    Publication date: December 24, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Hideki Aoyagi, Hitoshi Asano, Kazuya Toki, Michiaki Matsuo, Suguru Fujita
  • Patent number: 7633355
    Abstract: A variable matching circuit includes a variable capacitance circuit formed of a capacitor coupled to varactor diode and provided between terminals, and a resonator-type circuit includes a plurality of inductors and a variable capacitance circuit formed of a capacitor and a varactor diode. The inductors and the variable capacitance circuit are coupled in parallel together. The resonator-type circuit is connected in shunt with the terminal. The foregoing structure forms an L-type matching circuit. The bias of the varactor diodes can be thus varied, and plural values of the inductance of the resonator-type circuit can be switched over with a FET. The variable matching circuit can electrically control an impedance conversion available for wider ranges of frequency bandwidths.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: December 15, 2009
    Assignee: Panasonic Corporation
    Inventor: Michiaki Matsuo
  • Publication number: 20090252258
    Abstract: A pulse signal reception device of a comparatively simple configuration detects a signal sampled at an optimal clock timing for a pulse modulation signal having a signal width shorter than a symbol frequency. In this device, a time division unit (103) samples a data signal at a clock signal rise edge and outputs the sampled data signals to counters (104-1 to 104-3), respectively. The counters (104-1 to 104-3) count the number of High levels when the data signal becomes High level within a predetermined period, and a maximum value detection unit (105) outputs maximum data string information on a data string counted by a counter in which the maximum number of High levels has been detected among the counters (104-1 to 104-3) to a selection data judgment unit (106). The selection data judgment unit (106) judges which data string sampled at a particular timing is to be selected as a demodulation data string.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 8, 2009
    Inventors: Hideki Aoyagi, Hitoshi Asano, Michiaki Matsuo
  • Publication number: 20090195330
    Abstract: An object is to provide a resonator and a vibrator with a high Q value in which dissipation of vibration energy in vibration of the vibrator is small, and a thickness of a support part of the vibrator of a beam structure is made thicker than a thickness of the vibrator and the support part is formed in axisymmetry with respect to a length direction of a beam. By this configuration, brittleness of the support part is improved and loss of vibration energy from the support part is reduced and also loss of vibration energy resulting from surface roughness of a surface of the vibrator can be reduced, so that a resonator having a high Q value can be provided.
    Type: Application
    Filed: June 14, 2007
    Publication date: August 6, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Kunihiko Nakamura, Michiaki Matsuo, Yoshito Nakanishi, Akinori Hashimura
  • Publication number: 20090177954
    Abstract: A code error detecting device that can more precisely detect a code error due to a delayed wave is disclosed. The code error detecting device includes a receiving antenna (121) for receiving a on-off keying modulated pulse and its code-reversed pulse, a pulse detector (124) for outputting detected data in accordance with the pulses, a code comparing unit (128) for comparing each code of first received data (R1) with one of second received data (R2), wherein the first and second received data are derived from the output detected data, and an error detecting unit (129) for detecting an error of each code from a comparison result (D2) indicative of a result compared in the code comparing unit (128).
    Type: Application
    Filed: June 20, 2007
    Publication date: July 9, 2009
    Inventors: Kazuaki Takahashi, Suguru Fujita, Michiaki Matsuo, Yutaka Murakami, Satoshi Hasako
  • Publication number: 20090174494
    Abstract: It is an object of the invention to provide a pulse generation circuit and a modulator for realizing a high On/Off ratio in a small circuit scale and with lower power consumption. A short pulse generation circuit according to the invention includes an oscillator 101, a control signal generation circuit 102, an intermittent frequency multiplier 103, a filter 104, and an output terminal 105. The oscillator 101 and the intermittent frequency multiplier 103 are active circuits implemented as active elements. A continuous signal is output from the oscillator 101 and is input to the intermittent frequency multiplier 103 and the intermittent frequency multiplier 103 intermittently operates according to a control signal output from the control signal generation circuit 102, thereby generating a short pulse signal, and a spurious component is removed through the filter.
    Type: Application
    Filed: June 20, 2007
    Publication date: July 9, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Shigeru Kobayashi, Michiaki Matsuo, Suguru Fujita
  • Publication number: 20090080540
    Abstract: A pulse transmitter having a relatively simple structure and generating a pulse modulating signal even at a high transmission rate. In the pulse transmitter, a symbol pulse generating part (103) generates a symbol pulse of amplitude level ? when data S1 is “0,” and that of amplitude level &ggr; when data S1 is “1” in the first pulse slot section, the data pulse generating part (104) generates a data pulse of amplitude level 0 when data S2 to Sn is “0,” and that of amplitude level ? when data S2 to Sn is “1” in a later pulse slot section. The relationship of the amplitude levels keep the relation ?<?<&ggr. An adder (105) adds the symbol pulse and the data pulse and outputs the sum as a pulse modulating signal.
    Type: Application
    Filed: April 19, 2007
    Publication date: March 26, 2009
    Applicant: Panasonic Corporation
    Inventors: Hitoshi Asano, Hideki Aoyagi, Michiaki Matsuo