Patents by Inventor Michinobu Tanioka

Michinobu Tanioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020012233
    Abstract: The present invention provides a bare chip carrier comprising: a carrier body having a base portion on which a bare chip is mounted and also having at least one cap holder; and a carrier cap having a pressing member for pressing the bare chip toward the base portion of the body, and the carrier cap being separated from the carrier body, wherein the at least one cap holder has at least a holder engagement portion which is to be engaged with a cap engagement portion of the carrier cap, so that the carrier cap separated from the carrier body is held by the at least one cap holder, whereby the bare chip is mounted by only a single operation of dropping the carrier cap onto the carrier body for realizing the automation.
    Type: Application
    Filed: July 2, 2001
    Publication date: January 31, 2002
    Inventors: Michinobu Tanioka, Takahiro Kimura
  • Publication number: 20010040464
    Abstract: An electric contact device for testing a semiconductor device including pads or bumps including: a contacting sheet having bumps or pads at positions corresponding to the pads or the bumps of the semiconductor device overlying the testing substrate; and an elastic conductive sheet for generating contact between the semiconductor device and the contact sheet. Damage of external terminals of the semiconductor device can be minimized to delete a harmful influence on the next step.
    Type: Application
    Filed: December 15, 1999
    Publication date: November 15, 2001
  • Publication number: 20010033010
    Abstract: There is provided a semiconductor device tester including (a) a tester substrate having the same structure as a structure of a substrate as a product except that a semiconductor device is not mounted on the tester substrate, (b) an electrically conductive sheet covering therewith a first area in which the semiconductor device is to be mounted on the tester substrate, the electrically conductive sheet being electrically insulating in a certain direction, and (c) a holder supporting a semiconductor device to be tested therewith, and compressing the semiconductor device onto the electrically conductive sheet to thereby electrically connect an externally projecting terminal of the semiconductor device to a connection terminal mounted on the tester substrate in the first area.
    Type: Application
    Filed: March 30, 2001
    Publication date: October 25, 2001
    Inventors: Michinobu Tanioka, Takahiro Kimura, Hirobumi Inoue, Hiroo Ito, Yoshihito Fukasawa
  • Patent number: 6078229
    Abstract: It is an object on the invention to provide a SAW device sealed by resin, which is low priced and suited for decreasing its thickness and weight and requires no particular course for processing a substrate, and a method for fabricating the same. A functional surface of a piezoelectric substrate provided with interdigtal transducers and a mounting surface of a circuit substrate are opposed to each other to form vibration cavities for surface wave propagation areas therebetween. Electrical power is supplied to the piezoelectric substrate from the circuit substrate via electrode pads formed on respective inner surface of both the substrate and bumps inserted therebetween. A resin film adheres to the respective inner surfaces of both the substrates except the surface wave propagation areas to shield the vibration cavity from the environmental space. Apertures are previously formed at predetermined parts of the resin film by means of a laser.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: June 20, 2000
    Assignee: NEC Corporation
    Inventors: Yoshitsugu Funada, Michinobu Tanioka
  • Patent number: 6078123
    Abstract: A structure for mounting a SAW (Surface Acoustic Wave) device includes photosensitive resin filling a gap between the SAW device and a mounting substrate in the peripheral portion of the SAW device. The entire structure is substantially as small in size as the SAW device and light weight. The photosensitive resin is formed in a region including pads for connection in order to absorb thermal stresses and extraneous forces apt to act on the pads. Second resin may surround the photosensitive resin or may be provided in a laminate structure together with the photosensitive resin so as to enhance a sealing ability. A method of mounting a SAW device is also disclosed.
    Type: Grant
    Filed: August 5, 1998
    Date of Patent: June 20, 2000
    Assignee: NEC Corporation
    Inventors: Kei Tanaka, Eiichi Fukiharu, Yasunori Tanaka, Michinobu Tanioka, Kenichi Otake, Takuo Funaya
  • Patent number: 6013953
    Abstract: A semiconductor device comprises a substrate on which a plurality of external connection terminals are formed, and a semiconductor chip provided with a plurality of connection terminals. The connection terminals are connected to corresponding external connection terminals by electrical wiring. Each of predetermined connection terminals in the connection terminals of the semiconductor chip is connected to two or more corresponding external connection terminals on the substrate. Preferably, 90% or more of the connection terminals of the semiconductor chip are connected to two or more corresponding external connection terminals. When the semiconductor device is installed on a circuit board, the semiconductor device is mounted on the circuit board with its external connection terminals facing the circuit board, and electric connections between the semiconductor device and the circuit board is established by the external connection terminals.
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: January 11, 2000
    Assignee: NEC Corporation
    Inventors: Toshiyuki Nishihara, Yasunori Tanaka, Michinobu Tanioka, Masahiro Fujii
  • Patent number: 5784264
    Abstract: The MCM carrier having wiring layers on front and back surfaces and internally thereof. The MCM carrier includes first and second IC chips, an MCM board, and a carrier board. The first IC chip is mounted on the front surface of the MCM board and connected to the wiring layers, and the second IC chip is mounted on the back surface of the MCM board and connected to the wiring layers. The MCM board has a plurality of carrier board connection pads at a peripheral portion on the back surface thereof and the carrier board has MCM board connection terminals and external connection terminals in a matrix form. The MCM board and the carrier board are connected with each other through the carrier board connection pads and the MCM board connection terminals. This MCM carrier can be fabricated at high production yield and low cost with the overall structure being significantly scaled down.
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: July 21, 1998
    Assignee: NEC Corporation
    Inventor: Michinobu Tanioka
  • Patent number: 5668058
    Abstract: A flux is applied to a circuit board on which solder is deposited beforehand. Then, the circuit board is subjected to reflow and then to rinsing. After the rinsing, an IC chip 1 having metal bumps on its electrodes, is mounted to the circuit board. Before the mounting, the chip 1 and circuit board are heated in an inactive gas atmosphere having a low oxygen concentration. At the time of mounting, the solder is melted at a temperature higher than its melting point so as to connect the chip 1 to the circuit board.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: September 16, 1997
    Assignee: NEC Corporation
    Inventors: Michinobu Tanioka, Motoji Suzuki