Patents by Inventor Michinori Shiomi

Michinori Shiomi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9455373
    Abstract: A light emitting element includes: a laminated body including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer in this order, the second conductive semiconductor layer having a light extraction surface; and a recombination suppression structure provided in vicinity of an end surface of the active layer, the recombination suppression structure having a bandgap larger than a bandgap of the active layer.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: September 27, 2016
    Assignee: SONY CORPORATION
    Inventors: Mikihiro Yokozeki, Takahiro Koyama, Hironobu Narui, Hidekazu Aoyagi, Michinori Shiomi, Takahiko Kawasaki, Katsutoshi Itou
  • Publication number: 20150228846
    Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.
    Type: Application
    Filed: April 17, 2015
    Publication date: August 13, 2015
    Inventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobukata Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
  • Publication number: 20150189196
    Abstract: A dispersion material includes: a plurality of semiconductor nanoparticles; and an adsorption molecule configured to selectively absorb light having a predetermined wavelength and adsorbed to each of the plurality of semiconductor nanoparticles, the adsorption molecule having a plane aligned to be non-parallel to a direction from a center portion of each of the plurality of semiconductor nanoparticles toward an adsorption portion of each of the plurality of semiconductor nanoparticles.
    Type: Application
    Filed: December 12, 2014
    Publication date: July 2, 2015
    Inventors: Takeru BESSHO, Daisuke HOBARA, Michinori SHIOMI
  • Patent number: 9034738
    Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: May 19, 2015
    Assignee: SONY CORPORATION
    Inventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobukata Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
  • Patent number: 8987763
    Abstract: A light emitting device includes: a laminated body including a first-conductivity type semiconductor layer, a light emitting layer, and a second-conductivity type semiconductor layer in this order; a contact layer provided in contact with the second-conductivity type semiconductor layer at least at a peripheral edge of the second-conductivity type semiconductor layer; a first electrode electrically connected to the first-conductivity type semiconductor layer; a second electrode provided nearer to the first-conductivity type semiconductor layer than the second-conductivity type semiconductor layer; and a conductor electrically connecting the second electrode and the contact layer to each other.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: March 24, 2015
    Assignee: Sony Corporation
    Inventors: Hidekazu Aoyagi, Takahiko Kawasaki, Michinori Shiomi, Katsutoshi Itou, Makoto Nakashima
  • Patent number: 8859401
    Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: October 14, 2014
    Assignee: Sony Corporation
    Inventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobutaka Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
  • Publication number: 20130250992
    Abstract: A semiconductor device comprising a substrate made of a material with a hexagonal crystal structure and having a substrate axis which is perpendicular to a principal surface of the substrate; and a nitride-based group III-V compound semiconductor layer grown directly on and in contact with the principal surface of the substrate without growing a buffer layer between the substrate and the nitride-based group III-V compound semiconductor layer, wherein, a direction of a growth axis of the semiconductor layer is substantially the same as a direction of the substrate axis of the substrate.
    Type: Application
    Filed: March 20, 2013
    Publication date: September 26, 2013
    Applicant: Sony Corppration
    Inventors: AKIRA OHMAE, KOTA TOKUDA, MASAYUKI ARIMOCHI, NOBUHIRO SUZUKI, MICHINORI SHIOMI, TOMONORI HINO, KATSUNORI YANASHIMA
  • Patent number: 8435880
    Abstract: In a method for manufacturing a semiconductor device, the method includes the step of growing a nitride-based III-V compound semiconductor layer, which forms a device structure, directly on a substrate without growing a buffer layer, the substrate being made of a material with a hexagonal crystal structure and having a principal surface that is oriented off at an angle of not less than ?0.5° and not more than 0° from an R-plane with respect to a direction of a C-axis.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: May 7, 2013
    Assignee: Sony Corporation
    Inventors: Akira Ohmae, Kota Tokuda, Masayuki Arimochi, Nobuhiro Suzuki, Michinori Shiomi, Tomonori Hino, Katsunori Yanashima
  • Publication number: 20110212559
    Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.
    Type: Application
    Filed: May 6, 2011
    Publication date: September 1, 2011
    Applicant: SONY CORPORATION
    Inventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobutaka Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
  • Publication number: 20110095401
    Abstract: In a method for manufacturing a semiconductor device, the method includes the step of growing a nitride-based III-V compound semiconductor layer, which forms a device structure, directly on a substrate without growing a buffer layer, the substrate being made of a material with a hexagonal crystal structure and having a principal surface that is oriented off at an angle of not less than ?0.5° and not more than 0° from an R-plane with respect to a direction of a C-axis.
    Type: Application
    Filed: October 18, 2010
    Publication date: April 28, 2011
    Applicant: SONY CORPORATION
    Inventors: Akira Ohmae, Kota Tokuda, Masayuki Arimochi, Nobuhiro Suzuki, Michinori Shiomi, Tomonori Hino, Katsunori Yanashima
  • Publication number: 20100308349
    Abstract: A light-emitting diode with (a) a substrate having at least one recessed portion on one main surface; (b) a sixth nitride-based III-V group compound semiconductor layer grown on the substrate without forming a space in the recessed portion; and (c) a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type formed over the sixth nitride-based III-V group compound semiconductor layer, wherein, a dislocation occurring, in the sixth nitride-based III-V group compound semiconductor layer, from an interface with a bottom surface of the recessed portion in a direction vertical to the one main surface arrives at an inclined face or its vicinity of a triangle having the bottom surface of the recessed portion as a base and bends in a direction parallel to the one main surface.
    Type: Application
    Filed: June 9, 2010
    Publication date: December 9, 2010
    Applicant: Sony Corporation
    Inventors: Akira Ohmae, Shigetaka Tomiya, Yuki Maeda, Michinori Shiomi, Takaaki Ami, Takao Miyajima, Katsunori Yanashima, Takashi Tange, Atsushi Yasuda
  • Patent number: 7754504
    Abstract: A method for making a light-emitting diode, which including the steps of: providing a substrate having at least one recessed portion on one main surface and growing a first nitride-based III-V group compound semiconductor layer through a state of making a triangle in section having a bottom surface of the recessed portion as a base thereby burying the recessed portion; laterally growing a second nitride-based III-V group compound semiconductor layer from the first nitride-based III-V group compound semiconductor layer over the substrate; and successively growing a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type on the second nitride-based III-V group compound semiconductor layer.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: July 13, 2010
    Assignee: Sony Corporation
    Inventors: Akira Ohmae, Shigetaka Tomiya, Yuki Maeda, Michinori Shiomi, Takaaki Ami, Takao Miyajima, Katsunori Yanashima, Takashi Tange, Atsushi Yasuda
  • Publication number: 20070085093
    Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.
    Type: Application
    Filed: September 21, 2006
    Publication date: April 19, 2007
    Inventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobukata Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
  • Patent number: 7189665
    Abstract: A manufacturing method for a crystalline semiconductor material including a plurality of semiconductor crystal grains is provided. The manufacturing method includes forming an amorphous or polycrystalline semiconductor layer on a substrate having a flat surface; forming a plurality of projections each having a side wall surface substantially perpendicular to the flat surface of the substrate, a height set in the range of about 1 nm to less than or equal to about ¼ of the thickness of the semiconductor layer, and a lateral dimension set in the range of about 3 ?m to about 18 ?m in a direction parallel to the flat surface of the substrate; and heating the semiconductor layer a number of times by using a pulsed laser thereby forming the crystalline semiconductor material including the crystal grains each having a specific plane orientation with respect to a direction perpendicular to the flat surface of the substrate so that the crystal grains respectively correspond to the projections.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: March 13, 2007
    Assignee: Sony Corporation
    Inventors: Kazushi Nakano, Yukihisa Hitsuda, Toshio Fujino, Michinori Shiomi, Junichi Sato
  • Publication number: 20060258027
    Abstract: A method for making a light-emitting diode, which including the steps of: providing a substrate having at least one recessed portion on one main surface and growing a first nitride-based III-V group compound semiconductor layer through a state of making a triangle in section having a bottom surface of the recessed portion as a base thereby burying the recessed portion; laterally growing a second nitride-based III-V group compound semiconductor layer from the first nitride-based III-V group compound semiconductor layer over the substrate; and successively growing a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type on the second nitride-based III-V group compound semiconductor layer.
    Type: Application
    Filed: May 16, 2006
    Publication date: November 16, 2006
    Inventors: Akira Ohmae, Shigetaka Tomiya, Yuki Maeda, Michinori Shiomi, Takaaki Ami, Takao Miyajima, Katsunori Yanashima, Takashi Tange, Atsushi Yasuda
  • Publication number: 20060084246
    Abstract: A manufacturing method for a crystalline semiconductor material including a plurality of semiconductor crystal grains is provided. The manufacturing method includes forming an amorphous or polycrystalline semiconductor layer on a substrate having a flat surface; forming a plurality of projections each having a side wall surface substantially perpendicular to the flat surface of the substrate, a height set in the range of about 1 nm to less than or equal to about ¼ of the thickness of the semiconductor layer, and a lateral dimension set in the range of about 3 ?m to about 18 ?m in a direction parallel to the flat surface of the substrate; and heating the semiconductor layer a number of times by using a pulsed laser thereby forming the crystalline semiconductor material including the crystal grains each having a specific plane orientation with respect to a direction perpendicular to the flat surface of the substrate so that the crystal grains respectively correspond to the projections.
    Type: Application
    Filed: December 2, 2005
    Publication date: April 20, 2006
    Inventors: Kazushi Nakano, Yukihisa Hitsuda, Toshio Fujino, Michinori Shiomi, Junichi Sato
  • Patent number: 6972246
    Abstract: A manufacturing method for a crystalline semiconductor material including a plurality of semiconductor crystal grains is provided. The manufacturing method includes forming an amorphous or polycrystalline semiconductor layer on a substrate having a flat surface; forming a plurality of projections each having a side wall surface substantially perpendicular to the flat surface of the substrate, a height set in the range of about 1 nm to less than or equal to about ¼ of the thickness of the semiconductor layer, and a lateral dimension set in the range of about 3 ?m to about 18 ?m in a direction parallel to the flat surface of the substrate; and heating the semiconductor layer a number of times by using a pulsed laser thereby forming the crystalline semiconductor material including the crystal grains each having a specific plane orientation with respect to a direction perpendicular to the flat surface of the substrate so that the crystal grains respectively correspond to the projections.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: December 6, 2005
    Assignee: Sony Corporation
    Inventors: Kazushi Nakano, Yukihisa Hitsuda, Toshio Fujino, Michinori Shiomi, Junichi Sato
  • Publication number: 20050006646
    Abstract: A manufacturing method for a crystalline semiconductor material including a plurality of semiconductor crystal grains is provided. The manufacturing method includes forming an amorphous or polycrystalline semiconductor layer on a substrate having a flat surface; forming a plurality of projections each having a side wall surface substantially perpendicular to the flat surface of the substrate, a height set in the range of about 1 nm to less than or equal to about ¼ of the thickness of the semiconductor layer, and a lateral dimension set in the range of about 3 ?m to about 18 ?m in a direction parallel to the flat surface of the substrate; and heating the semiconductor layer a number of times by using a pulsed laser thereby forming the crystalline semiconductor material including the crystal grains each having a specific plane orientation with respect to a direction perpendicular to the flat surface of the substrate so that the crystal grains respectively correspond to the projections.
    Type: Application
    Filed: May 28, 2004
    Publication date: January 13, 2005
    Inventors: Kazushi Nakano, Yukihisa Hitsuda, Toshio Fujino, Michinori Shiomi, Junichi Sato