Patents by Inventor Michiyoshi Takano
Michiyoshi Takano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8136238Abstract: A method is provided to control the height of bump electrodes and increase a clearance between edge sections of a semiconductor chip and lead terminals of a tape substrate. By pushing up on a tape substrate by a bonding stage, and applying suction to the tape substrate through a suction groove, boundary portions of a semiconductor chip mounting region are drawn into the suction groove, and curved sections are formed in the tape substrate at locations corresponding to edge sections of a semiconductor chip and inclined sections disposed in outer circumference sections of the curved sections are formed in the tape substrate.Type: GrantFiled: February 3, 2009Date of Patent: March 20, 2012Assignee: Seiko Epson CorporationInventor: Michiyoshi Takano
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Patent number: 7888799Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: GrantFiled: May 10, 2010Date of Patent: February 15, 2011Assignee: Seiko Epson CorporationInventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
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Publication number: 20100252829Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: ApplicationFiled: May 10, 2010Publication date: October 7, 2010Applicant: SEIKO EPSON CORPORATIONInventors: Shuichi TANAKA, Haruki ITO, Yasuhito ARUGA, Ryohei TAMURA, Michiyoshi TAKANO
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Patent number: 7741712Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: GrantFiled: September 14, 2007Date of Patent: June 22, 2010Assignee: Seiko Epson CorporationInventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
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Patent number: 7638886Abstract: A semiconductor device including: a semiconductor layer; an electrode pad provided above the semiconductor layer; an insulating layer provided above the electrode pad and having an opening which exposes at least part of the electrode pad; and a metal electrode provided at least in the opening and including a first portion provided above the electrode pad, and a second portion provided above part of the insulating layer positioned outside the electrode pad, an area of a top surface of the second portion being larger than an area of a top surface of the first portion.Type: GrantFiled: August 2, 2006Date of Patent: December 29, 2009Assignee: Seiko Epson CorporationInventors: Akinori Shindo, Michiyoshi Takano
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Patent number: 7560814Abstract: A semiconductor device including: a semiconductor section in which an element is formed; an insulating layer formed on the semiconductor section; an electrode pad formed on the insulating layer; a contact section formed of a conductive material provided in a contact hole in the insulating layer and electrically connected with the electrode pad; a passivation film formed to have an opening on a first section of the electrode pad and to be positioned on a second section of the electrode pad; a bump formed to be larger than the opening in the passivation film and to be partially positioned on the passivation film; and a barrier layer which lies between the electrode pad and the bump. The contact section is connected with the second section at a position within a range in which the contact section overlaps the bump while avoiding the first section of the electrode pad.Type: GrantFiled: May 3, 2007Date of Patent: July 14, 2009Assignee: Seiko Epson CorporationInventors: Takeshi Yuzawa, Hideki Yuzawa, Michiyoshi Takano
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Publication number: 20090139085Abstract: A method is provided to control the height of bump electrodes and increase a clearance between edge sections of a semiconductor chip and lead terminals of a tape substrate. By pushing up on a tape substrate by a bonding stage, and applying suction to the tape substrate through a suction groove, boundary portions of a semiconductor chip mounting region are drawn into the suction groove, and curved sections are formed in the tape substrate at locations corresponding to edge sections of a semiconductor chip and inclined sections disposed in outer circumference sections of the curved sections are formed in the tape substrate.Type: ApplicationFiled: February 3, 2009Publication date: June 4, 2009Applicant: Seiko Epson CorporationInventor: Michiyoshi TAKANO
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Publication number: 20090035929Abstract: A method of manufacturing a semiconductor device includes: (a) forming an insulating layer having a contact hole on a semiconductor section in which an element is formed; (b) forming an electrode pad on the insulating layer so that a depression or a protrusion remains at a position at which the electrode pad overlaps the contact section; (c) forming a passivation film to have an opening on a first section of the electrode pad and to be positioned on a second section of the electrode pad; (d) forming a barrier layer on the electrode pad; and (e) forming a bump to be larger than the opening in the passivation film and to be partially positioned on the passivation film. The contact section is connected with the second section at a position within a range in which the contact section overlaps the bump while avoiding the first section of the electrode pad.Type: ApplicationFiled: October 2, 2007Publication date: February 5, 2009Applicant: Seiko Epson CorporationInventors: Takeshi Yuzawa, Hideki Yuzawa, Michiyoshi Takano
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Publication number: 20080012130Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: ApplicationFiled: September 14, 2007Publication date: January 17, 2008Applicant: SEIKO EPSON CORPORATIONInventors: Shuichi TANAKA, Haruki ITO, Yasuhito ARUGA, Ryohei TAMURA, Michiyoshi TAKANO
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Publication number: 20070267744Abstract: A semiconductor device and a method for making the same, wherein bumps of a semiconductor chip and inner leads of a film tape carrier can be securely bonded to each other by thermal welding using a heating unit.Type: ApplicationFiled: May 14, 2007Publication date: November 22, 2007Applicant: SEIKO EPSON CORPORATIONInventor: Michiyoshi Takano
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Publication number: 20070228560Abstract: A semiconductor device including: a semiconductor section in which an element is formed; an insulating layer formed on the semiconductor section; an electrode pad formed on the insulating layer; a contact section formed of a conductive material provided in a contact hole in the insulating layer and electrically connected with the electrode pad; a passivation film formed to have an opening on a first section of the electrode pad and to be positioned on a second section of the electrode pad; a bump formed to be larger than the opening in the passivation film and to be partially positioned on the passivation film; and a barrier layer which lies between the electrode pad and the bump. The contact section is connected with the second section at a position within a range in which the contact section overlaps the bump while avoiding the first section of the electrode pad.Type: ApplicationFiled: May 3, 2007Publication date: October 4, 2007Applicant: SEIKO EPSON CORPORATIONInventors: Takeshi Yuzawa, Hideki Yuzawa, Michiyoshi Takano
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Patent number: 7276792Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: GrantFiled: May 13, 2005Date of Patent: October 2, 2007Assignee: Seiko Epson CorporationInventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
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Patent number: 7233067Abstract: The invention includes a semiconductor device, and a method for making the same, wherein bumps of a semiconductor chip and inner leads of a film tape carrier can be securely bonded to each other by thermal welding using a heating unit. A semiconductor wafer is etched using a potassium iodide or ammonium iodide solution. By the etching, a barrier metal layer is removed while the upper face of a bump is simultaneously roughened and many prominences are formed. The formation of the prominences increases the surface area of the upper face of the bump 10 and improves the bonding between the bump of the semiconductor chip and the lead of the film tape carrier.Type: GrantFiled: November 16, 2004Date of Patent: June 19, 2007Assignee: Seiko Epson CorporationInventor: Michiyoshi Takano
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Patent number: 7230338Abstract: A semiconductor device including: a semiconductor section in which an element is formed; an insulating layer formed on the semiconductor section; an electrode pad formed on the insulating layer; a contact section formed of a conductive material provided in a contact hole in the insulating layer and electrically connected with the electrode pad; a passivation film formed to have an opening on a first section of the electrode pad and to be positioned on a second section of the electrode pad; a bump formed to be larger than the opening in the passivation film and to be partially positioned on the passivation film; and a barrier layer which lies between the electrode pad and the bump. The contact section is connected with the second section at a position within a range in which the contact section overlaps the bump while avoiding the first section of the electrode pad.Type: GrantFiled: June 2, 2005Date of Patent: June 12, 2007Assignee: Seiko Epson CorporationInventors: Takeshi Yuzawa, Hideki Yuzawa, Michiyoshi Takano
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Publication number: 20070124928Abstract: A method is provided to control the height of bump electrodes and increase a clearance between edge sections of a semiconductor chip and lead terminals of a tape substrate. By pushing up on a tape substrate by a bonding stage, and applying suction to the tape substrate through a suction groove, boundary portions of a semiconductor chip mounting region are drawn into the suction groove, and curved sections are formed in the tape substrate at locations corresponding to edge sections of a semiconductor chip and inclined sections disposed in outer circumference sections of the curved sections are formed in the tape substrate.Type: ApplicationFiled: February 14, 2007Publication date: June 7, 2007Applicant: SEIKO EPSON CORPORATIONInventor: Michiyoshi TAKANO
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Publication number: 20070045837Abstract: A semiconductor device including: a semiconductor layer; an electrode pad provided above the semiconductor layer; an insulating layer provided above the electrode pad and having an opening which exposes at least part of the electrode pad; and a metal electrode provided at least in the opening and including a first portion provided above the electrode pad, and a second portion provided above part of the insulating layer positioned outside the electrode pad, an area of a top surface of the second portion being larger than an area of a top surface of the first portion.Type: ApplicationFiled: August 2, 2006Publication date: March 1, 2007Inventors: Akinori Shindo, Michiyoshi Takano
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Publication number: 20070026661Abstract: A method of manufacturing a semiconductor device includes: (a) preparing a semiconductor chip having a plurality of electrodes; (b) preparing a substrate having a plurality of electrical connection portions; (c) holding the semiconductor chip by a holding tool; (d) planarizing an upper surface of the electrode of the semiconductor chip held by the holding tool; and (e) electrically connecting, after the step (d), the electrode of the semiconductor chip and the electrical connection portion of the substrate.Type: ApplicationFiled: July 20, 2006Publication date: February 1, 2007Applicant: SEIKO EPSON CORPORATIONInventors: Michiyoshi TAKANO, Kazuhiro KIJIMA
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Patent number: 7157308Abstract: A method is provided to control the height of bump electrodes and increase a clearance between edge sections of a semiconductor chip and lead terminals of a tape substrate. By applying suction to a tape substrate through a suction groove, boundary portions of a semiconductor chip mounting region are drawn into the suction groove, and curved sections are formed in the tape substrate at locations corresponding to edge sections of a semiconductor chip.Type: GrantFiled: February 24, 2004Date of Patent: January 2, 2007Assignee: Seiko Epson CorporationInventor: Michiyoshi Takano
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Publication number: 20050275115Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: ApplicationFiled: May 13, 2005Publication date: December 15, 2005Inventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
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Publication number: 20050269697Abstract: A semiconductor device including: a semiconductor section in which an element is formed; an insulating layer formed on the semiconductor section; an electrode pad formed on the insulating layer; a contact section formed of a conductive material provided in a contact hole in the insulating layer and electrically connected with the electrode pad; a passivation film formed to have an opening on a first section of the electrode pad and to be positioned on a second section of the electrode pad; a bump formed to be larger than the opening in the passivation film and to be partially positioned on the passivation film; and a barrier layer which lies between the electrode pad and the bump. The contact section is connected with the second section at a position within a range in which the contact section overlaps the bump while avoiding the first section of the electrode pad.Type: ApplicationFiled: June 2, 2005Publication date: December 8, 2005Applicant: SEIKO EPSON CORPORATIONInventors: Takeshi Yuzawa, Hideki Yuzawa, Michiyoshi Takano