Abstract: A method including: providing, on an output user interface of an electronic device, data including an audio sequence and/or an image, the provided data including a first and a second datum, the provided first datum being obtained by altering a third datum associated with a user account, the provided second datum being an unaltered datum or portion of a datum associated with the user account; designating one of the provided data via an input user interface; authenticating access to the user account from the electronic device based on a proximity between the designated datum and the provided first and/or second datum. A related electronic device, computer program product and corresponding medium.

Abstract: A triggering frame in a wireless network grants a medium to an AP for a TXOP. The frame defines RUs and allocates Uplink RUs to UL transmissions for an UL duration and Direct Link RUs to P2P transmissions. All the P2P exchanges are nested within the UL duration, hence avoiding an acknowledgment frame in the DiL RUs to interfere with a block-ack frame of the AP after the UL transmissions. This is relevant for DiL RUs adjacent, in frequency, to the other defined RUs. The block-ack frame is duplicated over the DiL RUs. The RU immediately adjacent to the DiL RUs is declared, in the triggering frame, as being unused: no non-AP station is allowed to use it during the UL duration, or even the TXOP. Such empty RU may be declared only in case the DiL transmission requires a response frame from the destination P2P station.

Abstract: A method for analyzing activity of a user of an electronic terminal is disclosed. The method includes obtaining contextual characteristics associated with at least one zone among a plurality of display zones of at least one screen of the electronic terminal, as a function of usage data of the terminal comprising data relating to a direction of gaze, data relating to a system activity of the terminal and/or data input to the terminal; and determining at least one activity indicator on the zone, depending on the contextual characteristics associated with the zone.

Abstract: The present invention provides a compound of formula (1) or a pharmaceutically acceptable salt thereof; a method for manufacturing said compound, and its therapeutic uses. The present invention further provides a combination of pharmacologically active agents and a pharmaceutical composition comprising said compound.

Abstract: The disclosure is directed at providing molecular tools and methods for transgenes integration in the genome of host cells, in particular tools and method enabling a transposition-dependent expression of the transgene, thereby facilitating identification and selection of effectively transformed hosts.

Abstract: The invention relates to a method for manufacturing macroscopic fibers of titanium dioxide (TiO2) by continuous extrusion in a one-way flow, to the macroscopic fibers of TiO2 that can be obtained by such a method, to the use of said fibers in heterogeneous photocatalysis for decontamination of organic pollutants from gaseous environments, and to a method for decontaminating gaseous environments, in particular air, using such fibers.

Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.

Abstract: A voltage scaling system can scale a supply voltage while preventing processor access of system components that are rendered unstable from the scaling. A processor receives an instruction to scale a system supply voltage to a target supply voltage. The processor executes the instruction and enters into a sleep mode. The processor can send, to a controller that saves power, an indication that the processor is in the sleep mode. When the processor is in the sleep mode, the processor becomes inactive and cannot access any components, e.g., Flash memory data, of the voltage scaling system. The controller can configure a voltage regulator to scale the system supply voltage to the target supply voltage. Once the target supply voltage is reached, the voltage regulator sends an interrupt to the processor, thereby waking up the processor from the sleep mode.

Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.

Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.

Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.

Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.

Abstract: The invention relates to a method for manufacturing macroscopic fibres of titanium dioxide (TiO2) by continuous extrusion in a one-way flow, to the macroscopic fibres of TiO2 that can be obtained by such a method, to the use of said fibres in heterogeneous photocatalysis for decontamination of organic pollutants from gaseous environments, and to a method for decontaminating gaseous environments, in particular air, using such fibres.

Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.

Abstract: A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain in response to event from an event generating module without activating a processor of the microcontroller system.

Abstract: A voltage scaling system can scale a supply voltage while preventing processor access of system components that are rendered unstable from the scaling. A processor receives an instruction to scale a system supply voltage to a target supply voltage. The processor executes the instruction and enters into a sleep mode. The processor can send, to a controller that saves power, an indication that the processor is in the sleep mode. When the processor is in the sleep mode, the processor becomes inactive and cannot access any components, e.g., Flash memory data, of the voltage scaling system. The controller can configure a voltage regulator to scale the system supply voltage to the target supply voltage. Once the target supply voltage is reached, the voltage regulator sends an interrupt to the processor, thereby waking up the processor from the sleep mode.

Abstract: A microcontroller system includes a main voltage regulator and a low power voltage regulator having a static current consumption less than the static current consumption of the main voltage regulator. A power state controller enables the low power voltage regulator during a power saving mode. On exiting the power saving mode, the power state controller enables the main voltage regulator and disables the low power voltage regulator after determining that the main voltage regulator is ready. The switching circuitry can be asynchronous.

Abstract: A microcontroller system includes a power manager that is configured to, during a power saving mode, configure an interrupt delaying module to receive and hold an interrupt from an interrupt source. In response to receiving the interrupt from the interrupt source, the power manager causes the microcontroller system to exit the power saving mode. Upon exiting the power saving mode, the power manager configures the interrupt delaying module to release the interrupt.

Abstract: A voltage scaling system can scale a supply voltage while preventing a processor from communicating with first system components that are rendered unstable from the scaling. On the other hand, the voltage scaling system allows second system components that are stable during the scaling to communicate with the processor. A processor scales a system supply voltage to a target supply voltage. The processor halts operations of the first system components and executes the instruction. When the first system components are halted, the processor cannot access the first system components. The second system components can continue operating during the scaling. A controller that saves power can configure a voltage regulator to scale the system supply voltage to the target supply voltage. Once the target supply voltage is reached, the voltage regulator sends an indication to a power management unit, after which the first system components continue to operate.

Abstract: A voltage scaling system can scale a supply voltage while preventing processor access of system components that are rendered unstable from the scaling. A processor receives an instruction to scale a system supply voltage to a target supply voltage. The processor executes the instruction and enters into a sleep mode. The processor can send, to a controller that saves power, an indication that the processor is in the sleep mode. When the processor is in the sleep mode, the processor becomes inactive and cannot access any components, e.g., Flash memory data, of the voltage scaling system. The controller can configure a voltage regulator to scale the system supply voltage to the target supply voltage. Once the target supply voltage is reached, the voltage regulator sends an interrupt to the processor, thereby waking up the processor from the sleep mode.