Abstract: A semiconductor component including a silicon carbide substrate. A pn junction includes doped layers of the substrate. The pn junction includes at a surface of the substrate a low doped first conductivity type layer and at a portion of the surface of the substrate a highly doped second conductivity type layer. An edge termination region of the pn junction laterally surrounds the pn junction provided at an edge of at least one of the layers of the pn junction. The edge termination region includes zones of the second conductivity type located at an edge of the highly doped second conductivity type layer. A charge content of the zones decreases toward an edge of the edge termination region in accordance with at least one characteristic selected from the group consisting of a stepwise or continuously decreasing total charge towards an outer border of the edge termination region and a decreasing effective sheet charge density toward an outer border of the edge termination region.

Abstract: A semiconductor device of planar structure, comprises a pn junction, formed of a first type conducting layer and on top thereof a second type conducting layer, both layers of doped silicon carbide, the edge of the second of the layers being provided with an edge termination (JTE), enclosing stepwise or continuously decreasing effective sheet charge density towards the outer border of the termination, wherein the pn junction and its JTE are covered by a doped or undoped SiC third layer.

Abstract: A field controlled semiconductor device of SiC comprises superimposed in the order mentioned at least a drain (12), a highly doped substrate layer (1) and a low doped n-type drift layer (2). It has also a highly doped n-type source region layer (6) and a source (11) connected thereto. A doped channel region layer (4) connects the source region layer to the drift layer, and a current is intended to flow therethrough when the device is in an on-state. The device has also a gate electrode (9). The channel region layer has a substantially lateral extension and is formed by a low doped n-type layer (4). The gate electrode (9) is arranged to influence the channel region layer from above for giving a conducting channel (17) created therein from the source region layer to the drift layer a substantially lateral extension.

Abstract: A semiconductor diode structure with a Schottky junction, wherein a metal contact and a silicon carbide semiconductor layer of a first conducting type form the junction and wherein the edge of the junction exhibits a junction termination divided into a transition belt (TB) having gradually increasing total charge or effective sheet charge density closest to the metal contact and a Junction Termination Extension (JTE) outside the transition belt, the JTE having a charge profile with a stepwise or uniformly deceasing total charge or effective sheet charge density from an initial value to a zero or almost zero total charge at the outermost edge of the termination following a radial direction from the center part of the JTE towards the outermost edge of the termination.

Abstract: An IGBT comprises a drain, a highly doped p-type substrate layer, a highly doped n-type buffer layer, a drift layer, a p-type base layer, a highly doped n-type source region layer and a source electrode. A trench is etched in the base layer and an insulating layer with a gate electrode thereon is arranged on the base layer from the source region layer to the drift layer for the creation of a conducting inversion channel there. A contact portion is provided vertically separated from the source region layer and has the source electrode applied thereon for collecting holes injected from the substrate layer to the drift layer at a vertical distance from the source region layer.

Abstract: A pn-diode of SiC has a first emitter layer part doped with first dopants having a low ionization energy and a second part designed as a grid and having portions extending vertically from above and past the junction between the drift layer and the first part and being laterally separated from each other by drift layer regions for forming a pn-junction by the first part and the drift layer adjacent such portions at a vertical distance from a lower end of the grid portions. The different parameters of the device are selected to allow a depletion of the drift layer in the blocking state form a continuous depleted region between the grid portions, to thereby screen off the high electric field at the pn-junction so that it will not be exposed to high electrical fields.

Abstract: A bipolar semiconductor comprising layers of SiC semiconductor material. At least one pn-junction is formed between two of the layers having charged carrier transport across the junction when the device is in a conductive state. A resistive element in series with the pn-junction lowers the current through the pn-junction as the voltage drop across the device increases with an increase in temperature. The temperature coefficient for the device switches from a negative to a positive at a lower current through the device.

Abstract: A semiconductor component comprises a pn junction having a first conductivity type layer and a second conductivity type layer, both being doped layers of silicon carbide (SiC), the first conductivity type layer being lower doped and being provided with a depletion region stopper (DRS) located outside the pn junction, the DRS having stepwise or continuously increasing effective sheet charge density of the first conducting type in a radial direction towards the outer edge of the semiconductor component.

Abstract: In a method for producing a channel region layer in a SiC-layer for providing a voltage-controlled semiconductor device a layer of silicon being one of a) polycrystalline and b) amorphous is applied on top of the SiC-layer, an aperture is etched in the silicon layer extending to the SiC-layer, a surface layer of a certain thickness of the silicon layer is oxidized, and the lateral extension of the channel region layer is determined by removing the oxidized layer and carrying out a further implantation into the area exposed by the so formed enlarged aperture.

Abstract: A field controlled semiconductor device of SiC has a drain, a highly doped substrate layer on top of the drain and a low doped n-type drift layer on top of the substrate layer. A p-type base layer is located on the drift layer and a vertical trench extends through the base layer. In the trench an n-type channel region extends vertically along a wall of the trench and connects a source region layer to the drift layer. A gate electrode is arranged in the trench to be on the opposite side of the channel region with respect to the base layer.

Abstract: An insulated gate bipolar transistor comprises a drain which supports a highly doped p-type substrate layer; a low doped n-type drift layer supported over the substrate layer; a base layer supported over the drift layer including a trench extending into the base layer, and supporting an insulated gate on an upper surface thereof separated from the trench by a highly doped n-type source region, the trench having a highly doped p-type layer at the bottom thereof vertically separated from the source region; and a source layer disposed over the n-type source region and extending into the trench covering the highly doped p-type layer in the trench bottom, wherein an applied voltage to the gate forms a conducting inversion channel in the base layer for electron transport from the source region to the drain, and the highly doped p-type layer in the bottom of the trench collects holes injected from the substrate layer into the drift layer thereby improving latch up immunity for the transistor.

Abstract: A semiconductor device comprises a semiconductor layer of SiC having an active area through which the device is adapted to be triggered by light incident thereon and means for generating and emitting light with an energy exceeding the bandgap, being the energy difference between the conduction band and the valence band, of the SiC-layer of the active area. The generating means is directly integrated in the device by being placed so as to cover substantial portions of the active area, and being made of a Group 3B-nitride having a larger bandgap that of the SiC of the SiC-layer.