Abstract: The subject matter described herein relates to a file system with adaptive flushing for an electronic device. The file system keeps data in memory much longer and its policy for flushing in-memory write cache to storage is application-aware and adaptive. More specifically, what parts of the cached data are ready for flushing could be determined according to the access characteristic of an application. In addition, when to do flushing can be selected flexibly at least partly based on user input interactions with an application of the electronic device or with the electronic device. Further, a multi-priority scheduling mechanism for scheduling data units that are ready to be flushed could be employed, which ensures fairness among applications and further improves flushing performance.

Abstract: A framework for use in developing proximity-based social interactions (PSIs) shows energy efficiency, topology robustness, and a lessened load for group participants. Implementations of the framework may include PSI-specific application hints to aggregate and schedule pending transmissions and match delivery requirement, topology structure and maintenance schemes that provide robustness and improve efficiency, and load-distributing group dissemination protocols.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a signal redistribution structure that comprises an anti-oxidation layer.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a signal redistribution structure that comprises an anti-oxidation layer.

Abstract: A framework for use in developing proximity-based social interactions (PSIs) shows energy efficiency, topology robustness, and a lessened load for group participants. Implementations of the framework may include PSI-specific application hints to aggregate and schedule pending transmissions and match delivery requirement, topology structure and maintenance schemes that provide robustness and improve efficiency, and load-distributing group dissemination protocols.

Abstract: Application testing and analysis may include performing perturbations to affect an environment associated with the application executing on a user device without affecting other applications executing on the user device. The execution of the application may be traced while the perturbations are being performed to determine an amount of resources of the user device consumed by the application and to determine whether a performance of the application was degraded.

Abstract: Application testing and analysis may include performing perturbations to affect an environment associated with the application executing on a user device without affecting other applications executing on the user device. The execution of the application may be traced while the perturbations are being performed to determine an amount of resources of the user device consumed by the application and to determine whether a performance of the application was degraded.

Abstract: Some implementations disclosed herein provide techniques and arrangements to enable interactive zones. For example, some implementations detect that a user has entered a zone associated with a physical object, where the zone is created via magnetic induction. In response to detecting that the user has entered the zone, some implementations send a virtual object representation of the physical object to a user device (e.g., a wireless phone) associated with the user. The user may interact with the virtual object, including selecting a command associated with the virtual object. Selecting the command may cause the physical object to perform one or more actions. In some implementations, a result of the physical object performing the one or more actions is sent to the user device.

Abstract: Systems and methods that provide for collection of sensor data in a wireless network with a dynamically changing structure. A data collection protocol exploits the self-awareness capabilities of nodes in selection of tree structures that form the wireless network during communication with a base station. The data collection protocol can further include a topology control component (which regulates how nodes are distributed among various tree structures and associated communication channels with the base station) and data retrieval component (which coordinates among the sensors to transmit data packets containing sensor data to efficiently employ available bandwidth).

Abstract: Systems and methods that provide for collection of sensor data in a wireless network with a dynamically changing structure. A data collection protocol exploits the self-awareness capabilities of nodes in selection of tree structures that form the wireless network during communication with a base station. The data collection protocol can further include a topology control component (which regulates how nodes are distributed among various tree structures and associated communication channels with the base station) and data retrieval component (which coordinates among the sensors to transmit data packets containing sensor data to efficiently employ available bandwidth).

Abstract: Tile-based routing between a bump pad and an input/output (I/O) device for implementation on a flip-chip integrated circuit (IC) die. A trace is routed between the bump pad and a position corresponding to a first I/O slot, the first I/O slot being at least partially occupied by the I/O device. A position is obtained for a device pad for the I/O device. The trace is then extended into an area corresponding to the position obtained for the device pad. It is a feature of this aspect of the invention that the trace extension extends the trace into a pad area for a second I/O slot, the second I/O slot being at least partially occupied by the I/O device. The invention also concerns a flip-chip integrated circuit (IC) die that includes a bump pad, an input/output (I/O) device, and a device pad electrically connected to the I/O device and disposed vertically adjacent to a portion of the I/O device.

Abstract: Provided is a technique for designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer. Electronic components are laid out on the semiconductor layer, and a primary power distribution network for distributing power to the electronic components is laid out on the primary metal layer. Then, a uniform trunk width is calculated for all trunks in a power mesh based on a desired maximum voltage drop for the generated electronic component layout. Finally, horizontal power trunks are laid out on the horizontal metal layer and vertical power trunks are laid out on the vertical metal layer using the calculated uniform trunk width, so as to form the power mesh, and an electrical connection is specified between the power mesh and the primary power distribution network.

Abstract: A method for laying out input/output (I/O) pairs, each including an I/O cell and a pad, on an integrated circuit die. Size information is obtained for each of a first I/O pair and a second I/O pair. A minimum pad spacing criterion is obtained which specifies a minimum distance between the pad in the first I/O pair and an element of the second I/O pair, and the first I/O pair and the second I/O pair are laid out so as to satisfy the minimum pad spacing criterion. Also provided is a method for laying out pads for input/output (I/O) cells on an integrated circuit die in which size information is obtained for each of a first I/O cell pad and a second I/O cell pad. A minimum pad spacing criterion is obtained, and the first I/O cell pad and the second I/O cell pad are laid out so as to satisfy the minimum pad spacing criterion.

Abstract: An integrated circuit (IC) die includes a semiconductor layer, electronic components formed on the semiconductor layer, and a primary metal layer upon which is formed a primary power distribution network for distributing power to the electronic components. The IC die also includes a horizontal metal layer, a vertical metal layer, and a power mesh electrically connected to the primary power distribution network, the power mesh including horizontal power trunks formed on the horizontal metal layer and vertical power trunks formed on the vertical metal layer. Also provided is an integrated circuit (IC) die which includes a semiconductor layer, electronic components formed on the semiconductor layer. A fine power distribution network, formed on a first metal layer, distributes power to the electronic components.

Abstract: A flip-chip integrated circuit die includes a semiconductor substrate, electronic components implemented on the semiconductor substrate, several plural metal layers, wires routed between the electronic components on the metal layers, a top layer, and bump pads arranged in a hexagonal array on the top layer. According to another aspect, the invention is directed to flip-chip integrated circuit design, in which a circuit description is input and standardized cells which correspond to electronic components in the circuit description are obtained. The standardized cells are laid out on the surface of the die using a rectangular-based layout technique, and bump pads are laid out in a hexagonal array.

Abstract: Tile-based routing between a bump pad and an input/output (I/O) device for implementation on a flip-chip integrated circuit (IC) die. A trace is routed between the bump pad and a position corresponding to a first I/O slot, the first I/O slot being at least partially occupied by the I/O device. A position is obtained for a device pad for the I/O device. The trace is then extended into an area corresponding to the position obtained for the device pad. It is a feature of this aspect of the invention that the trace extension extends the trace into a pad area for a second I/O slot, the second I/O slot being at least partially occupied by the I/O device. The invention also concerns a flip-chip integrated circuit (IC) die that includes a bump pad, an input/output (I/O) device, and a device pad electrically connected to the I/O device and disposed vertically adjacent to a portion of the I/O device.

Abstract: The present invention relates to a SOG (Spin-On-Glass) dispensing system and its controlling sequences and, more particularly, to a SOG dispensing system allowing for continuous production and its controlling sequences According to the present invention, a buffer tank, whose wall is set a plurality of level sensors at different level heights, is connected between a source tank with a SOG bottle inside and a coating unit of prior art and then SOG is supplied for a time interval from the source tank into the buffer tank by control signals from these level sensors. Besides, the buffer tank is surrounded with a cooling unit to provide a low temperature enviroment allowing for prolonging life time of SOG and preventing organic solvent inside SOG from evaporating and then crystallizing to form contamination particles at wall of the SOG dispensing system.

Abstract: Integrated circuit chip (IC) design and fabrication is a complex process requiring many stages including elaborate cell placement processes. The present invention provides a method and apparatus to facilitate the placement of cells on the surface of an integrated circuit device. Specifically, the invention involves placement of one type of cells (such as logic cells, I/O cells or scan cells) apart from other types of cells. The present invention facilitates the placement of such cells by first parsing the netlist to remove all cells other than the specific type of cells that are to be placed.

Abstract: Tile-based routing between a bump pad and an input/output (I/O) device for implementation on a flip-chip integrated circuit (IC) die. A trace is routed between the bump pad and a position corresponding to a first I/O slot, the first I/O slot being at least partially occupied by the I/O device. A position is obtained for a device pad for the I/O device. The trace is then extended into an area corresponding to the position obtained for the device pad. It is a feature of this aspect of the invention that the trace extension extends the trace into a pad area for a second I/O slot, the second I/O slot being at least partially occupied by the I/O device. The invention also concerns a flip-chip integrated circuit (IC) die that includes a bump pad, an input/output (I/O) device, and a device pad electrically connected to the I/O device and disposed vertically adjacent to a portion of the I/O device.

Abstract: A method for laying out input/output (I/O) pairs, each including an I/O cell and a pad, on an integrated circuit die. Size information is obtained for each of a first I/O pair and a second I/O pair. A minimum pad spacing criterion is obtained which specifies a minimum distance between the pad in the first I/O pair and an element of the second I/O pair, and the first I/O pair and the second I/O pair are laid out so as to satisfy the minimum pad spacing criterion. Also provided is a method for laying out pads for input/output (I/O) cells on an integrated circuit die in which size information is obtained for each of a first I/O cell pad and a second I/O cell pad. A minimum pad spacing criterion is obtained, and the first I/O cell pad and the second I/O cell pad are laid out so as to satisfy the minimum pad spacing criterion.