Patents by Inventor Mikio Hashimoto

Mikio Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10509568
    Abstract: An information processing apparatus includes a nonvolatile memory, a flag settable to a first value indicating that a program stored in a memory region of the nonvolatile memory has not been verified, and to a second value indicating that the program has been verified, a switching circuit configured to set the flag to the first value, in response to a request for permission to modify the program stored in the memory region, and a verification circuit that sets the flag to the second value upon verification of the program stored in the memory region, and upon restart of the information processing apparatus, carries out a verification process of the program prior to execution of the program if the first value is set in the flag, and executes the program without the verification process if the second value is set in the flag.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: December 17, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mikio Hashimoto, Kentaro Umesawa, Yoshiyuki Amanuma
  • Publication number: 20190369124
    Abstract: The present invention provides an agent for determining Alzheimer's disease, comprising an anti-S38AA antibody, a method of determining Alzheimer's disease in a test animal, comprising detecting an S38AA fragment in a sample collected from said animal, and a method of screening for a substance that treats or prevents Alzheimer's disease, comprising contacting a test substance with a cell permitting measurement of production of a S38AA fragment, measuring the production amount of the S38AA fragment in the cell, and comparing the production amount with that of the S38AA fragment in a control cell free of contact with the test substance, and selecting a test substance that down-regulates the production amount of the S38AA fragment as a substance capable of treating or preventing Alzheimer's disease, based on the comparison results.
    Type: Application
    Filed: August 19, 2019
    Publication date: December 5, 2019
    Applicant: Sumitomo Dainippon Pharma Co., Ltd.
    Inventors: Masakazu HASHIMOTO, Hiroyuki NAKAGAWA, Mikio AOKI, Lars O. TJERNBERG, Bengt WINBLAD
  • Patent number: 10474494
    Abstract: An information processing apparatus according to an embodiment includes a reception unit and switching unit. The reception unit receives an interrupt. The switching unit that switches a second operating system (OS) which is executing in a core to a first OS to which the interrupt for the first OS is input, when the reception unit receives an interrupt for the core in which the first OS is a priority OS and the second OS is not the priority OS.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: November 12, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Kanai, Shinya Takumi, Mikio Hashimoto, Hiroshi Isozaki
  • Patent number: 10393757
    Abstract: The present invention provides an agent for determining Alzheimer's disease, comprising an anti-S38AA antibody, a method of determining Alzheimer's disease in a test animal, comprising detecting an S38AA fragment in a sample collected from said animal, and a method of screening for a substance that treats or prevents Alzheimer's disease, comprising contacting a test substance with a cell permitting measurement of production of a S38AA fragment, measuring the production amount of the S38AA fragment in the cell, and comparing the production amount with that of the S38AA fragment in a control cell free of contact with the test substance, and selecting a test substance that down-regulates the production amount of the S38AA fragment as a substance capable of treating or preventing Alzheimer's disease, based on the comparison results.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: August 27, 2019
    Assignee: DAINIPPON SUMITOMO PHARMA CO., LTD.
    Inventors: Masakazu Hashimoto, Hiroyuki Nakagawa, Mikio Aoki, Lars O. Tjernberg, Bengt Winblad
  • Patent number: 10354073
    Abstract: According to one embodiment, an information processing device includes a processor, a nonvolatile memory, a designation unit, and a controller. The nonvolatile memory stores the first software and the second software which is used as substitute for the first software. The designation unit designates software to be executed by the processor at a boot. The controller protects an area of the nonvolatile memory storing the first software from being written while the first software is executed by the processor. When third software is executed by the processor, the third software verifies the second software. When the second software is legal in a result of verifying by the third software, the designation unit designates the second software.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: July 16, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryuiti Koike, Mikio Hashimoto, Naoko Yamada, Ryotaro Hayashi
  • Publication number: 20190210298
    Abstract: A weighing and packaging apparatus (10) includes a packaging unit (14), a weighing unit (11), and a frame (70). The packaging unit (14) includes a film transport mechanism (30) that transports a film (F) in a film transport direction, a detachable former (22), a former seat (82) that supports the former (22), and a sealing mechanism (50). The weighing unit (11) is positioned on an upper side in a vertical direction of the packaging unit (14), and supplies articles (A) to be packaged to the packaging unit (14). The frame (70) supports at least the weighing unit (11), and includes legs including a first front leg (71a), a first back leg (71b), a second front leg (72a), and a second back leg (72b). A movable portion (89) including the former seat (82) moves in a maintenance mechanism movable space (PM) when the former (22) is detached. All of the legs are located so as to avoid a leg prohibited space (PP).
    Type: Application
    Filed: August 18, 2017
    Publication date: July 11, 2019
    Applicant: Ishida Co., Ltd.
    Inventors: Toshiharu KAGEYAMA, Yuji OKAMOTO, Mikio KISHIKAWA, Makoto ICHIKAWA, Satoshi HASHIMOTO, Hideshi MIYAMOTO
  • Patent number: 10275592
    Abstract: According to an embodiment, an information processing device includes a first manager, a second manager, and a generator. The first manager loads a first class of a first object that requests execution of methods contained in a second object and a third class of a limiter configured to limit access from the first object to the methods. The second manager loads a second class of the second object. The generator generates the second object from the second class upon receiving a generation request for generating the second object from the first object, generates the limiter from the second object and the third class, and transmits the limiter to the first object.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: April 30, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyoshi Haruki, Fukutomo Nakanishi, Mikio Hashimoto
  • Patent number: 10229277
    Abstract: According to an embodiment, a code processing apparatus includes a determining unit, a concealing unit, an instructing unit, and an unconcealing unit. The determining unit is configured to determine, based on relocation information included in first code data that includes a code body and relocation information representing a portion of the code body to be relocated by a linker, a first portion including at least a part of the code body that is other than the portion. The concealing unit is configured to conceal the first portion. The instructing unit is configured to instruct the linker to process the first code data having the first portion concealed. The unconcealing unit is configured to unconceal the concealed portion of second code data that is generated from the first code data by the linker.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: March 12, 2019
    Assignees: Kabushiki Kaisha Toshiba, TOSHIBA SOLUTIONS CORPORATION
    Inventors: Yurie Shinke, Fukutomo Nakanishi, Hiroyoshi Haruki, Mikio Hashimoto, Fumihiko Sano
  • Publication number: 20180081712
    Abstract: An information processing apparatus according to an embodiment includes a reception unit and switching unit. The reception unit receives an interrupt. The switching unit that switches a second operating system (which is executing in a core to a first OS to which the interrupt for the first OS is input, when the reception unit receives an interrupt for the core in which the first OS is a priority OS and the second OS is not the priority OS.
    Type: Application
    Filed: February 21, 2017
    Publication date: March 22, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jun KANAI, Shinya TAKUMI, Mikio HASHIMOTO, Hiroshi ISOZAKI
  • Patent number: 9860218
    Abstract: A system software unit performs a first authentication operation with an external device using a first key that is registered in advance. A secure software unit determines whether or not system software satisfies a soundness condition. A dedicated memory unit is used to store a second key. While performing a reregistration operation for reregistering the first key, a system software unit requests the secure software unit to read the second key. When the system software satisfies the soundness condition, the secure software unit generates verification data using the second key. When a second authentication operation performed with the external device using the verification data is successful, the system software unit performs the reregistration operation.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: January 2, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryuiti Koike, Mikio Hashimoto, Naoko Yamada, Ryotaro Hayashi
  • Patent number: 9779033
    Abstract: In one embodiment, a storage unit stores a table tree and verifier tree. The table tree includes parent and child tables. The verifier tree includes parent and child verifiers associated with the parent and child tables, respectively. The parent verifier is used for verifying the child table and child verifier. A device stores a secure table tree corresponded to the table tree and used for address translation and a secure verifier tree corresponded to the verifier tree, to a secure storage unit. The device executes verification, based on verification information calculated based on a first child table and first child verifier in the storage unit and a first parent verifier in the secure verifier tree. The device sets the second address of the secure table tree such that the second address designates data in the first storage unit.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: October 3, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mikio Hashimoto, Naoko Yamada, Ryotaro Hayashi
  • Publication number: 20170255384
    Abstract: An information processing apparatus includes a nonvolatile memory, a flag settable to a first value indicating that a program stored in a memory region of the nonvolatile memory has not been verified, and to a second value indicating that the program has been verified, a switching circuit configured to set the flag to the first value, in response to a request for permission to modify the program stored in the memory region, and a verification circuit that sets the flag to the second value upon verification of the program stored in the memory region, and upon restart of the information processing apparatus, carries out a verification process of the program prior to execution of the program if the first value is set in the flag, and executes the program without the verification process if the second value is set in the flag.
    Type: Application
    Filed: September 1, 2016
    Publication date: September 7, 2017
    Inventors: Mikio HASHIMOTO, Kentaro UMESAWA, Yoshiyuki AMANUMA
  • Patent number: 9753867
    Abstract: In one embodiment, a device executes reading and writing for a storage unit storing a table tree and verifier tree. The table tree includes a parent table and child table. The verifier tree includes a parent verifier associated with the parent table, and a child verifier associated with the child table. The parent verifier is used for verifying the child table and child verifier. The device stores a secure table tree being a part of the table tree and used for address translation, and a secure verifier tree being a part of the verifier tree, to a secure storage unit. The device executes verification, based on verification information calculated based on a first child table and first child verifier in the storage unit and a first parent verifier in the secure verifier tree.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: September 5, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mikio Hashimoto, Naoko Yamada, Jun Kanai, Ryotaro Hayashi
  • Patent number: 9753868
    Abstract: In one embodiment, a device executes reading and writing for a storage unit storing a table tree and verifier tree. The table tree includes a parent table and child table. The verifier tree includes a parent verifier associated with the parent table, and a child verifier associated with the child table. The parent verifier is used for verifying the child table and the child verifier. The device stores a secure table tree being a part of the table tree and used for address translation, and a secure verifier tree being a part of the verifier tree, to a secure storage unit. The device, when data has a read-only attribute, calculates verification information based on the data and a secure value varying according as the data is updated, and executes verification based on a verifier corresponded to the data and the verification information.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: September 5, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoko Yamada, Mikio Hashimoto, Ryotaro Hayashi
  • Publication number: 20170032126
    Abstract: According to one embodiment, an information processing device includes a processor, a nonvolatile memory, a designation unit, and a controller. The nonvolatile memory stores the first software and the second software which is used as substitute for the first software. The designation unit designates software to be executed by the processor at a boot. The controller protects an area of the nonvolatile memory storing the first software from being written while the first software is executed by the processor. When third software is executed by the processor, the third software verifies the second software. When the second software is legal in a result of verifying by the third software, the designation unit designates the second software.
    Type: Application
    Filed: July 28, 2016
    Publication date: February 2, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ryuiti KOIKE, Mikio HASHIMOTO, Naoko YAMADA, Ryotaro HAYASHI
  • Patent number: 9524189
    Abstract: According to an embodiment, an information processing device is connectable to a peripheral device and includes a buffer, a first operating system, a second operating system, and a monitor. The monitor is configured to enable the first operating system or the second operating system to execute in a switching manner. The monitor includes a switching controller that, when the second operating system issues an access request to the peripheral device, saves a state of the second operating system and suspends its execution as well as restores a state of the first operating system and restarts its execution. The first operating system includes a request input-output controller that reads the access request from the buffer, that divides the read access request into instructions in receivable units for the peripheral device, and that issues each instruction. The first operating system includes an access controller that accesses the peripheral device according to the instructions.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: December 20, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Kanai, Hiroshi Isozaki, Mikio Hashimoto
  • Publication number: 20160226843
    Abstract: A system software unit performs a first authentication operation with an external device using a first key that is registered in advance. A secure software unit determines whether or not system software satisfies a soundness condition. A dedicated memory unit is used to store a second key. While performing a reregistration operation for reregistering the first key, a system software unit requests the secure software unit to read the second key. When the system software satisfies the soundness condition, the secure software unit generates verification data using the second key. When a second authentication operation performed with the external device using the verification data is successful, the system software unit performs the reregistration operation.
    Type: Application
    Filed: October 15, 2015
    Publication date: August 4, 2016
    Inventors: Ryuiti Koike, Mikio Hashimoto, Naoko Yamada, Ryotaro Hayashi
  • Publication number: 20160055030
    Abstract: According to an embodiment, an information processing device is connectable to a peripheral device and includes a buffer, a first operating system, a second operating system, and a monitor. The monitor is configured to enable the first operating system or the second operating system to execute in a switching manner. The monitor includes a switching controller that, when the second operating system issues an access request to the peripheral device, saves a state of the second operating system and suspends its execution as well as restores a state of the first operating system and restarts its execution. The first operating system includes a request input-output controller that reads the access request from the buffer, that divides the read access request into instructions in receivable units for the peripheral device, and that issues each instruction. The first operating system includes an access controller that accesses the peripheral device according to the instructions.
    Type: Application
    Filed: July 1, 2015
    Publication date: February 25, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jun KANAI, Hiroshi ISOZAKI, Mikio HASHIMOTO
  • Publication number: 20150379290
    Abstract: According to an embodiment, a code processing apparatus includes a determining unit, a concealing unit, an instructing unit, and an unconcealing unit. The determining unit is configured to determine, based on relocation information included in first code data that includes a code body and relocation information representing a portion of the code body to be relocated by a linker, a first portion including at least a part of the code body that is other than the portion. The concealing unit is configured to conceal the first portion. The instructing unit is configured to instruct the linker to process the first code data having the first portion concealed. The unconcealing unit is configured to unconceal the concealed portion of second code data that is generated from the first code data by the linker.
    Type: Application
    Filed: September 8, 2015
    Publication date: December 31, 2015
    Applicants: Kabushiki Kaisha Toshiba, TOSHIBA SOLUTIONS CORPORATION
    Inventors: Yurie SHINKE, Fukutomo NAKANISHI, Hiroyoshi HARUKI, Mikio HASHIMOTO, Fumihiko SANO
  • Publication number: 20150370726
    Abstract: In one embodiment, a storage unit stores a table tree and verifier tree. The table tree includes parent and child tables. The verifier tree includes parent and child verifiers associated with the parent and child tables, respectively. The parent verifier is used for verifying the child table and child verifier. A device stores a secure table tree corresponded to the table tree and used for address translation and a secure verifier tree corresponded to the verifier tree, to a secure storage unit. The device executes verification, based on verification information calculated based on a first child table and first child verifier in the storage unit and a first parent verifier in the secure verifier tree. The device sets the second address of the secure table tree such that the second address designates data in the first storage unit.
    Type: Application
    Filed: June 19, 2015
    Publication date: December 24, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mikio HASHIMOTO, Naoko Yamada, Ryotaro Hayashi