Abstract: Provided are a nonvolatile memory device and a method for manufacturing the same. The nonvolatile memory device may include a semiconductor substrate, a floating gate, a second insulation layer, a third insulation layer, a control gate, and a common source line. The semiconductor substrate may have an active region limited by a device isolation region. The floating gate may be formed on the active region with a first insulation layer between the floating gate and the active region. The second insulation layer covers one side of the floating gate, and the third insulation layer covers the floating gate and the second insulation layer. The control gate may be formed on the other side of the floating gate with a fourth insulation layer between the control gate and the floating gate. The common source line may be formed in a portion of the substrate that is located under the second insulation layer.

Abstract: A support structure for a semiconductor device with peripherally disposed contacts includes a support substrate and at least one conductive column protruding from the support substrate. The at least one conductive column is configured to contact an outer connector on a peripheral edge of a semiconductor device that may be carried by the support structure. Optionally, the at least one conductive column may engage a feature of (e.g., a recess in) the peripherally disposed outer connector. The at least one conductive column may facilitate alignment of one or more semiconductor devices with the support substrate alignment of semiconductor devices relative to one another, or electrical connection between multiple semiconductor devices of other components.

Abstract: The invention provides an electrically conductive composite having high conductivity, hermeticity, high mechanical strength, low surface roughness, lightweight, and thin profile. The composite comprises a rubber modified with vinyl ester resin. After curing in mold, the composite may serve as a bipolar plate in a fuel cell. For example, the bipolar plate is combined with a membrane electrode assembly (MEA) to form a proton exchange membrane fuel cell (PEMFC).

Abstract: Example embodiments may provide a nonvolatile memory device. The example embodiment nonvolatile memory device may include a floating gate structure formed on a semiconductor substrate with a gate insulating layer between them and/or a control gate formed adjacent to the floating gate with a tunneling insulation layer between them. The floating gate may include a first floating gate formed on the gate insulating layer, a second floating gate formed on the first floating gate with a first insulating pattern between them, and/or a gate connecting layer formed on at least one sidewall of the first insulating pattern so that the gate conducting layer may electrically connect the first floating gate and the second floating gate. The second floating gate may have a tip formed at its longitudinal end that may not contact the gate connecting layer.

Abstract: Disclosed are a side emitting lens, a light emitting device using the side emitting lens, a mold assembly for preparing the side emitting lens and a method for preparing the side emitting using the mold assembly. The lens of the present invention has a simple structure so the lens is easily fabricated through a molding process. If the lens is applied to the light emitting member, light generated from the light emitting member is laterally guided by means of the lens.

Abstract: A nonvolatile memory device includes a semiconductor substrate; a source region that is formed in the semiconductor substrate; a gate insulating film that is formed so as to partially overlap the source region on hte semiconductor substrate; a floating gate that is formed on the gate insulating film so as to have a structure forming a uniform electric field in the portion that overlaps the source region; a control gate that is formed so as to be elecrically isolated along one sidewall of the floating gate from an upper part of the floating gate, an inter-gate insulating film that is interposed between the floating gate and the control gate, and a drain region that is formed so as to be adjacent the other side of the control gate.

Abstract: A user authentication system and method for a communications network is provided. The credential authority publishes an accumulator and issues tokens and credentials to the users who are authorized to access a service. The user computes by himself a derived credential based on the credential issued by the credential authority, and proves to the verifier using the derived credential. If a new user is authorized, other users and the verifier need not update any data. If a user ever authorized is banned, i.e., his/her token is revoked, the credential authority computes the updated accumulator based on the token issued to the banned user, and publishes a revocation increment data comprising the updated accumulator and the increment data about the revoked token. Other users compute their updated credentials by themselves based on the updated revocation increment data received.

Abstract: The invention provides a malleable pseudonym certificate system and method for a communication network. According to one embodiment of the invention, a user acquires a root proof from a trusted entity, generates one or more pseudonym certificates based on the root proof, and sends anonymous public keys each equipped with one pseudonym certificate to verifiers. Through use of the pseudonym certificate, the verifier believes that the user's anonymous public key is certified by the trusted entity. The pseudonym certificate contains no information by which the verifier can figure out the real identity of the user. With the malleable pseudonym certificate system, the trusted entity needs only certify once for the user's root public key. The user can generate by him or herself mass anonymous public keys where each anonymous public key is equipped with a distinct pseudonym certificate.

Abstract: The invention provides a virtual subscriber identifier system and method of a communication network. According to one embodiment of the invention, a subscriber generates virtual subscriber identifiers by him/her self, generates a subscriber identity mapping data by which a identifier service provider can figure out the real identifier of the owner of the virtual subscriber identifier, and informs peers of the virtual subscriber identifiers. The subscriber identify mapping data may be a data in which a virtual subscriber identifier is associated to the real identifier of the subscriber, and be registered by the subscriber with the identifier service provider. A peer generates a communicating request including a virtual subscriber identifier as target, and sends the request to the identifier service provider, the identifier service provider determines the real identifier of the subscriber from the subscriber identity mapping data, and forwards the communication between the peer and the subscriber's terminal.

Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.

Abstract: A multichip assembly includes semiconductor devices or semiconductor device components with outer connectors on peripheral edges thereof. The outer connectors are formed by creating via holes along boundary lines between adjacent, unsevered semiconductor devices, or semiconductor device components, then plating or filling the holes with conductive material. When adjacent semiconductor devices or semiconductor device components are severed from one another, the conductive material in each via between the semiconductor devices is bisected. The semiconductor devices and components of the multichip assembly may have different sizes, as well as arrays of outer connectors with differing diameters and pitches. Either or both ends of each outer connector may be electrically connected to another aligned outer connector or contact area of another semiconductor device or component. Assembly in this manner provides a low-profile stacked assembly.

Abstract: A method of fabricating a flash memory cell having a split gate structure. A sacrificial layer is formed on a floating gate layer formed on a semiconductor substrate. The sacrificial layer is etched to form an opening exposing a portion of the floating gate layer. A gate interlayer insulating layer pattern is formed inside the opening. After removing the sacrificial layer pattern and etching the floating gate layer (using the gate interlayer insulating layer pattern as an etch mask), a floating gate is formed under the gate interlayer insulating layer pattern. A control gate is formed overlapping a portion of the floating gate.

Abstract: An apparatus and method for cathodic protection in an environment where thin film corrosive fluids are formed is provided. The apparatus which protects from corrosion an object exposed to the thin film corrosive fluids, by artificially adjusting a potential of the object, comprises a DC power supply of which cathode is electrically connected to the object to be corrosion-protected, and an anodic assembly of which anode is electrically connected to the DC power supply.

Abstract: A semiconductor device having a measuring pattern that enhances measuring reliability and a method of measuring the semiconductor device using the measuring pattern. The semiconductor device includes a semiconductor substrate having a chip area in which an integrated circuit is formed, and a scribe area surrounding the chip area. The semiconductor device also includes a measuring pattern formed in the scribe area and having a surface sectional area to include a beam area in which measuring beams are projected, and a dummy pattern formed in the measuring pattern to reduce the surface sectional area of the measuring pattern. The surface sectional area of the dummy pattern occupies from approximately 5% to approximately 15% of a surface sectional area of the beam area.

Abstract: A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths extending outwardly beyond a peripheral edge of an encapsulant. A plurality of terminals may be positioned proximate a terminal face of the encapsulant and these terminals may be electrically coupled to the same leads. This can facilitate connection of the microelectronic component to a substrate using the leads as a conventional leaded package. The terminals, however, can facilitate stacking of the leaded package with one or more additional microelectronic components, e.g., a BGA package.

Abstract: The invention discloses a radio frequency identification system, comprising: a radio frequency identification tag having an identification code and a set of verifiable data stored therein; and a radio frequency identification reader which sends a reading request to the radio frequency identification tag, requesting to read a first portion of the set of verifiable data, wherein the radio frequency identification tag further comprising control means, which, when the radio frequency identification tag receives the reading request from the radio frequency identification reader, in case of that the set of verifiable data has not been performed a locking operation, performs the locking operation on the set of verifiable data, so that from then on any data of a second portion of the set of verifiable data cannot be read.

Abstract: In a method of manufacturing a non-volatile memory device, a first gate insulation layer and a conductive layer are formed on a substrate and then the conductive layer is partially oxidized to form an oxide layer pattern. The conductive layer is partially etched using the oxide layer pattern as an etching mask to form a floating gate electrode on the first gate insulation layer and then the silicon layer is formed on the substrate including the floating gate electrode. The silicon layer is oxidized to form a tunnel insulation layer and a second gate insulation layer on a sidewall of the floating gate electrode and on a surface portion of the substrate adjacent to the floating gate electrode and then a control gate electrode is formed on the tunnel insulation layer and the second gate insulation layer.

Abstract: A nozzle structure for a high-pressure spray head includes a nozzle and a nozzle head. The nozzle is made of iron in a concave shape. The nozzle head is disposed in the nozzle. The nozzle head includes a glass ring and a ceramic ring. The ceramic ring comprises an outlet therein. The nozzle and the ceramic ring are combined together by means of the glass ring.

Abstract: Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads.

Abstract: Disclosed is an LED device, a method for manufacturing the same, and a light emitting apparatus having the same. The LED device includes (a) a light emitting diode unit and (b) an adjustment layer laminated on a light emitting surface of the light emitting diode unit, a fine pattern having being formed on the adjustment layer by repeating a shape in a light emission direction. The adjustment layer is (i) at least one layer formed by aligning transparency adjustment particles having a shape or (ii) a polymer film layer having a fine pattern imprinted on the polymer film layer so as to adjust transparency. A fine pattern adjustment layer having various shapes and an adjustable size is introduced on the light emitting surface of the LED unit. As a result, the light extraction efficiency of the surface of the LED unit improves together with ease of manufacturing and secured uniformity.