Abstract: A fuse circuit can include a cut-off unit circuit configured to electrically isolate a fuse from an input to a status information circuit after latching of status information associated with status of the fuse. Other fuse related circuits and methods are disclosed.

Abstract: A method for fabricating an LED having section grown on a sapphire substrate, a boded structure, and a unit chip separated from the bonded structure. The method includes (a) bonding the section grown on a first surface of the sapphire substrate to a first surface of a first substrate with a first binder; (b) bonding a second surface of the first substrate to a first surface of a second substrate with a second binder; (c) removing the second substrate from a bonded structure obtained as a result of step (b) after polishing a second surface of the sapphire substrate; (d) separating the bonded structure into unit chips after the second substrate has been removed; and (e) bonding the second surface of the polished sapphire substrate provided in each unit chip to a lead frame, and removing the first substrate. This method improves heat dissipation efficiency.

Abstract: A light emitting diode devic that includes (a) a light emitting diode section, (b) an electrically conductive pad section being disposed outside the light emitting diode section and being electrically connected to an external power source, and (c) at least one electrically conductive interconnection section for connecting the electrically conductive pad section to one side or both sides of the light emitting diode section. In the light emitting diode device, a wire is connected to the electrically conductive pad section disposed outside the light emitting diode section, and the electrically conductive pad section is connected to one side of the light emitting diode section by means of at least one electrically conductive interconnection section, so that not only it is easy to uniformly coat a fluorescent substance, but also an area covering vertically emitted light can be reduced to enhance a light extraction efficiency of the light emitting diode device.

Abstract: A semiconductor device package is disclosed which is substantially die-sized with respect to each of the X, Y and Z axes. The package includes outer connectors that are located along at least one peripheral edge thereof and that extend substantially across the height of the peripheral edge. Each outer connector is formed by severing a conductive via that extends substantially through a substrate blank, such as a silicon wafer, at a street located adjacent to an outer periphery of the semiconductor device of the package. The outer connectors may include recesses that at least partially receive conductive columns protruding from a support substrate therefor. Assemblies may include the packages in stacked arrangement, without height-adding connectors.

Abstract: There is provided a method of fabricating a split-gate flash memory cell using a spacer oxidation process. An oxidation barrier layer is formed on a floating gate layer, and an opening to expose a portion of the floating gate layer is formed in the oxidation barrier layer. Subsequently, a spacer is formed on a sidewall of the opening with a material layer having insulation property by oxidizing, and an inter-gate oxide layer pattern between a floating gate and a control gate is formed in the opening while the spacer is oxidized by performing an oxidation process.

Abstract: The invention relates to a framework system and methods for connecting a plurality of tools. The system comprises a plug-in mechanism configured to dynamically load the plurality of tools, a data pool having storage space configured to store data sets associated with the plurality of tools, a linking mechanism configured to establish communications links between the loaded plurality of tools to enable coordinated operation of the loaded plurality of tools, a session component configured to record the process history of the operations of the loaded plurality of tool and the system states corresponding to the process history of the operations and an annotation module configured to associate user-provided data corresponding to one or more of the stored data sets.

Abstract: This invention provides a dictionary learning method, said method comprising the steps of: learning a lexicon and a Statistical Language Model from an untagged corpus; integrating the lexicon, the Statistical Language Mode and subsidiary word encoding information into a small size dictionary. And this invention also provides an input method on a user terminal device using the dictionary with Part-of-Speech information and a Part-of-Speech Bi-gram Model added, and a user terminal device using the same. Therefore, sentence level prediction and word level prediction can be given by the user terminal device and the input is speeded up by using the dictionary which is searched by a Patricia Tree index of a dictionary index.

Abstract: An apparatus and method for cathodic protection in an environment where thin film corrosive fluids are formed is provided. The apparatus which protects from corrosion an object exposed to the thin film corrosive fluids, by artificially adjusting a potential of the object, comprises a DC power supply of which cathode is electrically connected to the object to be corrosion-protected, and an anodic assembly of which anode is electrically connected to the DC power supply.

Abstract: A hanger for an electronic apparatus. The hanger comprises a base mounted to a wall, a bracket pivoting on the base, a first link pivoting on the base and comprising a ratchet with a plurality of teeth, and a second link with a stopper rotatably connecting the first link and the bracket. The angle between the bracket and the base is varied by the stopper engaging each tooth of the ratchet. The bracket can rotate between a first position and a second position. When the bracket is in the first position, the bracket overlaps the base, and in the second position, the angle between the bracket and the base is maximized.

Abstract: A simplified manufacturing process for massive production of LEDs that have superior light emitting efficiency and superior heat discharging efficiency. The method employs a laser lift-off technique instead of the flip-chip bonding technique and it does not require a photolithography process, thereby substantially reducing the process steps and enhancing the heat discharging efficiency. The LED chips are formed as unit chips before irradiating the laser, thereby increasing the yield and realizing the mass production by preventing cleavage of the crystal structures. Heat discharging efficiency is also increased by roughening the surface of an n-type GaN layer. The light emitting area can be widened 30% more than in the flip-chip technique. Thus, the present invention serves to increase the light output and the heat discharging area, thereby drastically enhancing the performance of manufacturing high-output LEDs.

Abstract: Disclosed is a light emitting diode (LED) device that comprises a crystal structure of a sapphire substrate-free gallium nitride (GaN) LED, wherein the crystal structure is mounted on a first surface of a sub-mount substrate in the form of a unit chip, and the first surface of the sub-mount substrate has a surface area greater than the surface area of a region in which the unit chip is bonded. Preforms for manufacturing the LED device and a method for manufacturing the LED device are also disclosed. The sapphire substrate, on which the crystal structure of the light emitting diode has grown, is processed into a unit chip before being removed. Thus, any crack in the crystal structure of the light emitting diode that may occur during the removal of the sapphire substrate can be prevented. Therefore, a thin light emitting diode device can be manufactured in a mass production system.

Abstract: A pulse transformer package includes a substrate, a passive component, and a cap member. The substrate includes a surface layer, a base layer, a middle wiring layer between the surface and base layers, a set of bonding pads formed on the surface layer, and a set of connecting pads formed on the base layer. The bonding pads and the connecting pads are connected electrically to the wiring layer. The passive component is connected electrically to the bonding pads on the substrate. The cap member is connected to the surface layer of the substrate, and cooperates with the surface layer to form a sealed space for the passive component.

Abstract: A semiconductor device includes a substrate divided into a memory cell region and a logic region. A split gate electrode structure is formed in a memory cell region of a substrate. A silicon oxide layer is formed on a sidewall of the split gate electrode structure and a surface of the substrate. A word line is formed on the silicon oxide layer that is positioned on the sidewall of the split gate electrode structure. The word line has an upper width and a lower width. The lower width is greater than the upper width. A logic gate pattern is formed on a logic region of the substrate. The logic gate pattern has a thickness thinner than the lower width of the word line.

Abstract: A semiconductor device includes a substrate divided into a memory cell region and a logic region. A split gate electrode structure is formed in a memory cell region of a substrate. A silicon oxide layer is formed on a sidewall of the split gate electrode structure and a surface of the substrate. A word line is formed on the silicon oxide layer that is positioned on the sidewall of the split gate electrode structure. The word line has an upper width and a lower width. The lower width is greater than the upper width. A logic gate pattern is formed on a logic region of the substrate. The logic gate pattern has a thickness thinner than the lower width of the word line.

Abstract: Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads.

Abstract: A semiconductor device having a measuring pattern that enhances measuring reliability and a method of measuring the semiconductor device using the measuring pattern. The semiconductor device includes a semiconductor substrate having a chip area in which an integrated circuit is formed, and a scribe area surrounding the chip area. The semiconductor device also includes a measuring pattern formed in the scribe area and having a surface sectional area to include a beam area in which measuring beams are projected, and a dummy pattern formed in the measuring pattern to reduce the surface sectional area of the measuring pattern. The surface sectional area of the dummy pattern occupies from approximately 5% to approximately 15% of a surface sectional area of the beam area.

Abstract: The present invention herein relates to fastening structure for a heat sink to provide a fastening structure easy and convenient both for assembling and disassembling operation, characterized by fastening structure being a material of elasticity comprising a controlling member and a motioning member, wherein controlling member is composed of a reinforcing loop, a operational portion of controlling member and a first radian claw, a motioning member buckling up controlling member is composed of a operational portion of motioning member and a second radian claw, heat sink for assembling and disassembling operate in coordination with a first radian claw, a second radian claw and a reinforcing loop

Abstract: A seat for a heat radiator includes a frame with opposed first and second sides, and opposed third and fourth sides. A first bar with a slot is laterally formed at an inner wall of the first side. An elastic strip is positioned in the slot and protruded from a bottom of the bar. A hole is uprightly defined through a first corner of the second side. A finger with an opening is formed at a second corner of the second side. A pin is inserted in the hole, and has an aperture diametrically defined through the pin and above the hole. A fastener has an arm with a first end pivotally mounted in the aperture of the pin. A handle is formed at a second end of the arm, and an arcuate part is formed at a middle portion of the arm.

Abstract: A semiconductor device having a measuring pattern that enhances measuring reliability and a method of measuring the semiconductor device using the measuring pattern. The semiconductor device includes a semiconductor substrate having a chip area in which an integrated circuit is formed, and a scribe area surrounding the chip area. The semiconductor device also includes a measuring pattern formed in the scribe area and having a surface sectional area to include a beam area in which measuring beams are projected, and a dummy pattern formed in the measuring pattern to reduce the surface sectional area of the measuring pattern. The surface sectional area of the dummy pattern occupies from approximately 5% to approximately 15% of a surface sectional area of the beam area.