Abstract: A liquid crystal display includes a first substrate, gate lines and data lines disposed on a display area of the first substrate, a common voltage line disposed on a peripheral area of the first substrate, a common voltage transmission unit extending from the common voltage line, an organic layer disposed on the common voltage transmission unit and the common voltage line, a connecting member disposed on the organic layer disposed on the peripheral area, a first insulating layer disposed on the pixel electrode and the connecting member, a common electrode disposed on the first insulating layer, and a short point connecting the connecting member and the common electrode to each other. The common electrode and the first insulating layer include a plurality of cutouts in the peripheral region and display region of the first substrate which have substantially a same plane shape as each other.

Abstract: A liquid crystal display includes a first substrate including pixels arranged in m columns by n rows, n data lines disposed, m gate lines arranged substantially parallel to the data lines, n data distribution lines arranged to cross the m gate lines and electrically connected to the data lines, respectively, source driving chips disposed on a first portion of the first substrate, and a gate driver disposed on a second portion of the first substrate. Each of the data distribution lines is connected to a subset of the pixels arranged in a corresponding row, and each of the gate lines is connected to a subgroup of the pixels arranged in a corresponding column. The source driving chips apply data signals to the pixels through the first data lines and the data distribution lines, and the gate driver applies gate signals to the pixels through the gate lines.

Abstract: A display substrate includes a data line, a gate line and a fan-out line. The data line is disposed in a display area of a base substrate and transfers a data signal to a switching element electrically connected to a pixel electrode. The gate line is disposed in the display area and transfers a gate signal to the switching element. The fan-out line is disposed in a peripheral area of the base substrate surrounding the display area, electrically connected to at least one of the data line and the gate line, and includes a plurality of conductive layers making contact with each other through a contact hole.

Abstract: A liquid crystal display includes pixels which is disposed in row and column directions, respectively includes pixel electrodes, and arranged along a first pixel column to a sixth pixel column, gate lines including pairs of two adjacent gate lines for each pixel row in the row direction, data lines including a first data line at a left side of the first pixel column, a second data line between the second and third pixel columns, a third data line between the fourth and fifth pixel columns, and a fourth data line at a right side of the sixth pixel column; and common voltage lines including a first common voltage line between the first and second pixel columns, a second common voltage line between the third and fourth pixel columns, and a third common voltage line between the fifth and sixth pixel columns.

Abstract: A display device may include an insulating layer. The display device may further include a first field-generating electrode that overlaps the insulating layer. The display device may further include a second field-generating electrode that overlaps the first field-generating electrode and has a cutout. An exposed portion of the insulating layer may be exposed through the cutout and may be exposed between an edge (or boundary) of the first field-generating electrode and an end portion of the second field-generating electrode in a layout view of the display device.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: A liquid crystal display includes a first substrate, gate lines and data lines disposed on a display area of the first substrate, a common voltage line disposed on a peripheral area of the first substrate, a common voltage transmission unit extending from the common voltage line, an organic layer disposed on the common voltage transmission unit and the common voltage line, a connecting member disposed on the organic layer disposed on the peripheral area, a first insulating layer disposed on the pixel electrode and the connecting member, a common electrode disposed on the first insulating layer, and a short point connecting the connecting member and the common electrode to each other. The common electrode and the first insulating layer include a plurality of cutouts in the peripheral region and display region of the first substrate which have substantially a same plane shape as each other.

Abstract: A liquid crystal display, includes: a substrate; a gate line including a gate pad and a data line including a data pad, the gate and data lines being disposed on the substrate; a thin film transistor connected to the gate line and the data line; an organic layer disposed on the thin film transistor; a pixel electrode disposed on the organic layer; a first contact assistant disposed on the gate pad; a second contact assistant disposed on the data pad; a first insulating layer disposed on the pixel electrode; and a common electrode disposed on the first insulating layer, the common electrode overlapping with the pixel electrode. The common electrode includes first cutouts, the first insulating layer includes second cutouts, the plane shapes of the first and second cutouts are substantially the same, and the pixel electrode includes a polycrystalline transparent conductive material.

Abstract: In a thin film transistor array panel and a method of manufacturing the same, a thin passivation layer is positioned between a first field generating electrode and a second field generating electrode. The thin passivation layer overlaps the first and second field generating electrodes. The thin passivation layer includes a transparent photosensitive organic material. When forming the first field generating electrode, the passivation layer is used as a photosensitive film. Accordingly, the passivation layer and the first field generating electrode may be formed using a same single photo-mask. Accordingly, the manufacturing cost of the thin film transistor array panel may be reduced.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: A photoelectric device includes: a semiconductor substrate including monocrystalline silicon and has first and second surfaces that are opposite to each other; a doping unit formed on the first surface of the semiconductor substrate; and an insulating layer that is formed between the doping unit and the second surface of the semiconductor substrate, wherein the doping unit includes: a first semiconductor layer including a first dopant doped in the monocrystalline silicon; and a second semiconductor layer including a second dopant doped in the monocrystalline silicon.

Abstract: A method of manufacturing a solar cell including providing a semiconductor substrate having a first conductivity type; performing a first deposition process that includes forming a first doping material layer having a second conductivity type different from the first conductivity type; performing a drive-in process that includes heating the substrate having the first doping material layer thereon; performing a second deposition process after performing the drive-in process and including forming a second doping material layer on the first doping material layer, wherein the second doping material layer has the second conductivity type; locally heating portions of the substrate, the first doping material layer, and the second doping material layer with a laser to form a contact layer at a first surface of the substrate; and forming a first electrode on the contact layer and a second electrode on a second surface of the substrate opposite to the first surface.

Abstract: A method of fabricating a solar cell includes forming an emitter layer of a second conductive type on a front surface and a back surface of a substrate of a first conductive type opposite to the second conductive type, forming an anti-reflection layer on the front surface of the substrate, partially removing the anti-reflection layer and the emitter layer to form an isolation groove dividing the emitter layer into a plurality of regions, removing a portion of the emitter layer formed on the back surface of the substrate, and forming a passivation layer covering the isolation groove and the back surface of the substrate.

Abstract: A method for manufacturing a solar cell is presented. The method includes: forming an amorphous silicon layer on a first surface of a light absorbing layer; doping the amorphous silicon layer with a dopant; forming a dopant layer by diffusing the dopant into the amorphous silicon layer with a laser; forming a semiconductor layer by removing the dopant that remains outside the dopant layer; etching the surface of the semiconductor layer by using an etchant; forming a first electrode on the semiconductor layer; and forming a second electrode on a second surface of the light absorbing layer.

Abstract: A liquid crystal display includes: a first insulation substrate; a first gate conductor disposed on the first insulation substrate and in a same layer as a gate line and a second gate conductor disposed on the first insulation substrate and in the same layer as the gate line; a gate insulating layer disposed on the first gate conductor and the second gate conductor; a data conductor disposed on the gate insulating layer and in a same layer as a data line; a thin film transistor disposed on the first insulation substrate; a first spacer disposed on the first insulation substrate; and a second spacer disposed on the first insulation substrate, where heights or widths of the first and second spacers are different from each other and having different heights or widths, and the second spacer overlaps the first gate conductor and the second gate conductor.

Abstract: A method of manufacturing a photoelectric device, the method including: forming a first semiconductor layer on a semiconductor substrate through a first ion implantation; forming a second semiconductor layer having an inverted conductive type on a part of the first semiconductor layer through a second ion implantation; and performing thermal processing to restore lattice damage of the semiconductor substrate and activate a dopant into which ion implanted. According to one or more embodiments of the present invention, a photoelectric device having a reduction in the number of processes for manufacturing the photoelectric device and improved output characteristics is provided.

Abstract: Method of manufacturing a photovoltaic device and a photovoltaic device manufactured by using the method. The method includes forming a first conductive-type semiconductor layer using a first impurity on a semiconductor substrate, performing doping on a region of the first conductive-type semiconductor layer using a laser such that the region of the first conductive-type semiconductor layer has a higher concentration of the first impurity than a remaining portion of the first conductive-type semiconductor layer, performing edge isolation to form a groove portion at an edge portion of a rear surface of the semiconductor substrate, forming an antireflection layer on a front surface of the semiconductor substrate, forming a first metal electrode on the front surface of the semiconductor substrate, and forming a second metal electrode and a second conductive-type semiconductor layer including a second impurity that is different from the first impurity, on the rear surface of the semiconductor substrate.

Abstract: A display apparatus includes a plurality of first gate lines extended in a first direction and disposed on a substrate on which a plurality of pixels is disposed, a plurality of second gate line extended in a second direction to cross the first gate lines, a plurality of data lines disposed substantially parallel to the first gate lines, and a first insulating layer disposed between the first gate lines and the second gate lines and provided with a plurality of via holes to expose a portion of a corresponding first gate line of the first gate lines. Each of the first gate lines makes contact with a corresponding second gate line of the second gate lines through a corresponding via hole of the via holes.

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract: A method of manufacturing a solar cell including providing a semiconductor substrate having a first conductivity type; performing a first deposition process that includes forming a first doping material layer having a second conductivity type different from the first conductivity type; performing a drive-in process that includes heating the substrate having the first doping material layer thereon; performing a second deposition process after performing the drive-in process and including forming a second doping material layer on the first doping material layer, wherein the second doping material layer has the second conductivity type; locally heating portions of the substrate, the first doping material layer, and the second doping material layer with a laser to form a contact layer at a first surface of the substrate; and forming a first electrode on the contact layer and a second electrode on a second surface of the substrate opposite to the first surface.