Patents by Inventor Min-Hsien Chen
Min-Hsien Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220356568Abstract: The invention provides an improved semiconductor deposition method, which comprises providing a deposition machine, the deposition machine includes a chamber connected with a pipeline, putting a first wafer into the chamber, and performing a pipeline cleaning step, the pipeline cleaning step includes: cutting off the path between the pipeline and the chamber by turning off a plurality of valve switches, and introducing a gas from the pipeline to move along a first path of the pipeline. Then, a deposition step is performed on the first wafer to deposit a first material layer on the surface of the first wafer, the deposition step includes opening a plurality of valve switches to communicate the path between the pipeline and the chamber, and introducing the gas into the chamber along a second path of the pipeline.Type: ApplicationFiled: June 7, 2021Publication date: November 10, 2022Inventors: Qiang Zhang, Xijun Guo, Min-Hsien Chen, Ching-Ning Yang, Wen Yi Tan
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Patent number: 11222785Abstract: A method for depositing a metal layer on a wafer is disclosed. A PVD chamber is provide having therein a wafer chuck for holding a wafer to be processed, a target situated above the wafer chuck, a magnet positioned on a backside of the target, and a DC power supply for supplying a DC voltage to the target. The target is a metal or a metal alloy having ferromagnetism property. A paste process is performed to the PVD chamber. The paste process includes sequential steps of: admitting a working gas into the PVD chamber; and igniting the working gas in cascade stages. The wafer is then loaded into the PVD chamber and positioned onto the wafer chuck. A deposition process is then performed to deposit a metal layer sputtered from the target onto the wafer.Type: GrantFiled: August 19, 2019Date of Patent: January 11, 2022Assignee: United Semiconductor (Xiamen) Co., Ltd.Inventors: Xijun Guo, Jianhua Chen, Haipeng Zhu, Xianlei Zhang, Min-Hsien Chen, Ching-Ning Yang, Wen Yi Tan
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Publication number: 20210074923Abstract: The present disclosure provides an organic compound represented by the following Formula (I): wherein each of R1 and R2 is independently selected from the groups consisting of CN, CF3 and a substituted or non-substituted ester group, R3 is selected from the groups consisting of hydrogen, a substituted or non-substituted C1-C12 alkyl group and a substituted or non-substituted C1-C12 aryl group, and m is an integer between 1 and 4; each of Ar1 and Ar2 is independently selected from the group consisting of an ortho, meta or para substituted C6 aromatic ring; and each of is independently an electron-donating group.Type: ApplicationFiled: September 6, 2019Publication date: March 11, 2021Inventor: MIN-HSIEN CHEN
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Publication number: 20210013041Abstract: A method for depositing a metal layer on a wafer is disclosed. A PVD chamber is provide having therein a wafer chuck for holding a wafer to be processed, a target situated above the wafer chuck, a magnet positioned on a backside of the target, and a DC power supply for supplying a DC voltage to the target. The target is a metal or a metal alloy having ferromagnetism property. A paste process is performed to the PVD chamber. The paste process includes sequential steps of: admitting a working gas into the PVD chamber; and igniting the working gas in cascade stages. The wafer is then loaded into the PVD chamber and positioned onto the wafer chuck. A deposition process is then performed to deposit a metal layer sputtered from the target onto the wafer.Type: ApplicationFiled: August 19, 2019Publication date: January 14, 2021Inventors: XIJUN GUO, JIANHUA CHEN, HAIPENG ZHU, XIANLEI ZHANG, Min-Hsien Chen, Ching-Ning Yang, WEN YI TAN
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Publication number: 20200207752Abstract: The present disclosure provides an organic electroluminescent compound represented by the formula (1): wherein each of R1 and R2 is independently an electron-donating group and each of n and m is independently an integer between 1 and 4. The present disclosure further provides an organic light-emitting device and an organic electroluminescent device each comprising the organic electroluminescent compound represented by the formula (I).Type: ApplicationFiled: December 26, 2018Publication date: July 2, 2020Inventors: LI-CHEN WEI, MIN-HSIEN CHEN
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Patent number: 10651393Abstract: The present disclosure provides an organic electroluminescent compound represented by the following formula (III): Wherein each of R1 to R4 is independently selected from the group consisting of hydrogen and the groups represented by formula (i), formula (ii), formula (iii), formula (iv), formula (v), formula (vi), formula (vii) and formula (viii), and at least two of the R1 to R4 are independently selected from the group consisting of the groups represented by formula (i), formula (ii), formula (iii), formula (iv), formula (v), formula (vi), formula (vii) and formula (viii): wherein R5, R6, R7, R8, R9, R10,R11, R12, R13,R14, R15, R16, p, q, r, s, t, u, v, A, B and D are each as defined in the description.Type: GrantFiled: December 28, 2018Date of Patent: May 12, 2020Assignee: INT TECH CO., LTD.Inventors: Meng-Hung Hsin, Min-Hsien Chen
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Publication number: 20190140188Abstract: The present disclosure provides an organic electroluminescent compound represented by the following formula (III): Wherein each of R1 to R4 is independently selected from the group consisting of hydrogen and the groups represented by formula (i), formula (ii), formula (iii), formula (iv), formula (v), formula (vi), formula (vii) and formula (viii), and at least two of the R1 to R4 are independently selected from the group consisting of the groups represented by formula (i), formula (ii), formula (iii), formula (iv), formula (v), formula (vi), formula (vii) and formula (viii): wherein R5, R6, R7, R8, R9, R10,R11, R12, R13,R14, R15, R16, p, q, r, s, t, u, v, A, B and D are each as defined in the description.Type: ApplicationFiled: December 28, 2018Publication date: May 9, 2019Inventors: MENG-HUNG HSIN, MIN-HSIEN CHEN
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Patent number: 9853221Abstract: The present disclosure relates to a compound including a structure of Formula (I), and the use of the compound as a dopant in an emitting layer of an organic light emitting diode. The present disclosure also relates to an emitting layer of an organic light emitting diode and an organic light emitting diode device.Type: GrantFiled: August 10, 2016Date of Patent: December 26, 2017Assignee: NATIONAL TSING HUA UNIVERSITYInventors: Chien-Hong Cheng, Pachaiyappan Rajamalli, Natarajan Senthilkumar, Parthasarathy Gandeepan, Min-Hsien Chen
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Publication number: 20170317292Abstract: The present disclosure relates to a compound including a structure of Formula (I), and the use of the compound as a dopant in an emitting layer of an organic light emitting diode. The present disclosure also relates to an emitting layer of an organic light emitting diode and an organic light emitting diode device.Type: ApplicationFiled: August 10, 2016Publication date: November 2, 2017Inventors: Chien-Hong CHENG, Pachaiyappan RAJAMALLI, Natarajan SENTHILKUMAR, Parthasarathy GANDEEPAN, Min-Hsien CHEN
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Patent number: 9768029Abstract: A method of forming a semiconductor device is disclosed. A substrate having a dielectric layer thereon is provided. The dielectric layer has a gate trench therein and a gate dielectric layer is formed on a bottom of the gate trench. A work function metal layer and a top barrier layer are sequentially formed in the gate trench. A treatment is performed to the top barrier layer so as to form a silicon-containing top barrier layer. A low-resistivity metal layer is formed in the gate trench.Type: GrantFiled: May 31, 2016Date of Patent: September 19, 2017Assignee: United Microelectronics Corp.Inventors: Chun-Hsien Lin, Min-Hsien Chen
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Patent number: 9657019Abstract: A 1,9-diazaphenalene derivative is represented by where R, R1, R2, R3, Y1, and Y2 are as defined in the specification and claims. The 1,9-diazaphenalene derivative may emit fluorescence after being excited, and is thus suitable for use as a fluorescent material for an organic light emitting diode. A method for preparing the 1,9-diazaphenalene derivative is also disclosed.Type: GrantFiled: April 10, 2015Date of Patent: May 23, 2017Assignee: NATIONAL TSING HUA UNIVERSITYInventors: Chien-Hong Cheng, Jayachandran Jayakumar, Min-Hsien Chen
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Patent number: 9558996Abstract: A method for filling a trench with a metal layer is disclosed. A deposition apparatus having a plurality of supporting pins is provided. A substrate and a dielectric layer disposed thereon are provided. The dielectric layer has a trench. A first deposition process is performed immediately after the substrate is placed on the supporting pins to form a metal layer in the trench, wherein during the first deposition process a temperature of the substrate is gradually increased to reach a predetermined temperature. When the temperature of the substrate reaches the predetermined temperature, a second deposition process is performed to completely fill the trench with the metal layer. The present invention further provides a semiconductor device having an aluminum layer with a reflectivity greater than 1, wherein the semiconductor device is formed by using the method.Type: GrantFiled: September 9, 2014Date of Patent: January 31, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chi-Mao Hsu, Hsin-Fu Huang, Min-Chuan Tsai, Chien-Hao Chen, Wei-Yu Chen, Chin-Fu Lin, Jing-Gang Li, Min-Hsien Chen, Jian-Hong Su
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Publication number: 20160276157Abstract: A method of forming a semiconductor device is disclosed. A substrate having a dielectric layer thereon is provided. The dielectric layer has a gate trench therein and a gate dielectric layer is formed on a bottom of the gate trench. A work function metal layer and a top barrier layer are sequentially formed in the gate trench. A treatment is performed to the top barrier layer so as to form a silicon-containing top barrier layer. A low-resistivity metal layer is formed in the gate trench.Type: ApplicationFiled: May 31, 2016Publication date: September 22, 2016Inventors: Chun-Hsien Lin, Min-Hsien Chen
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Patent number: 9384984Abstract: A method of forming a semiconductor device is disclosed. A substrate having a dielectric layer thereon is provided. The dielectric layer has a gate trench therein and a gate dielectric layer is formed on a bottom of the gate trench. A work function metal layer and a top barrier layer are sequentially formed in the gate trench. A treatment is performed to the top barrier layer so as to form a silicon-containing top barrier layer. A low-resistivity metal layer is formed in the gate trench.Type: GrantFiled: September 3, 2013Date of Patent: July 5, 2016Assignee: United Microelectronics Corp.Inventors: Chun-Hsien Lin, Min-Hsien Chen
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Publication number: 20160185781Abstract: A 1,9-diazaphenalene derivative is represented by where R, R1, R2, R3, Y1, and Y2 are as defined in the specification and claims. The 1,9-diazaphenalene derivative may emit fluorescence after being excited, and is thus suitable for use as a fluorescent material for an organic light emitting diode. A method for preparing the 1,9-diazaphenalene derivative is also disclosed.Type: ApplicationFiled: April 10, 2015Publication date: June 30, 2016Applicant: National Tsing Hua UniversityInventors: Chien-Hong CHENG, Jayachandran JAYAKUMAR, Min-Hsien CHEN
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Publication number: 20150061041Abstract: A method of forming a semiconductor device is disclosed. A substrate having a dielectric layer thereon is provided. The dielectric layer has a gate trench therein and a gate dielectric layer is formed on a bottom of the gate trench. A work function metal layer and a top barrier layer are sequentially formed in the gate trench. A treatment is performed to the top barrier layer so as to form a silicon-containing top barrier layer. A low-resistivity metal layer is formed in the gate trench.Type: ApplicationFiled: September 3, 2013Publication date: March 5, 2015Applicant: United Microelectronics Corp.Inventors: Chun-Hsien Lin, Min-Hsien Chen
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Publication number: 20140374909Abstract: A method for filling a trench with a metal layer is disclosed. A deposition apparatus having a plurality of supporting pins is provided. A substrate and a dielectric layer disposed thereon are provided. The dielectric layer has a trench. A first deposition process is performed immediately after the substrate is placed on the supporting pins to form a metal layer in the trench, wherein during the first deposition process a temperature of the substrate is gradually increased to reach a predetermined temperature. When the temperature of the substrate reaches the predetermined temperature, a second deposition process is performed to completely fill the trench with the metal layer. The present invention further provides a semiconductor device having an aluminum layer with a reflectivity greater than 1, wherein the semiconductor device is formed by using the method.Type: ApplicationFiled: September 9, 2014Publication date: December 25, 2014Inventors: Chi-Mao Hsu, Hsin-Fu Huang, Min-Chuan Tsai, Chien-Hao Chen, Wei-Yu Chen, Chin-Fu Lin, JING-GANG LI, Min-Hsien Chen, JIAN-HONG SU
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Patent number: 8860135Abstract: A method for filling a trench with a metal layer is disclosed. A deposition apparatus having a plurality of supporting pins is provided. A substrate and a dielectric layer disposed thereon are provided. The dielectric layer has a trench. A first deposition process is performed immediately after the substrate is placed on the supporting pins to form a metal layer in the trench, wherein during the first deposition process a temperature of the substrate is gradually increased to reach a predetermined temperature. When the temperature of the substrate reaches the predetermined temperature, a second deposition process is performed to completely fill the trench with the metal layer. The present invention further provides a semiconductor device having an aluminum layer with a reflectivity greater than 1, wherein the semiconductor device is formed by using the method.Type: GrantFiled: February 21, 2012Date of Patent: October 14, 2014Assignee: United Microelectronics Corp.Inventors: Chi-Mao Hsu, Hsin-Fu Huang, Min-Chuan Tsai, Chien-Hao Chen, Wei-Yu Chen, Chin-Fu Lin, Jing-Gang Li, Min-Hsien Chen, Jian-Hong Su
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Publication number: 20130214336Abstract: A method for filling a trench with a metal layer is disclosed. A deposition apparatus having a plurality of supporting pins is provided. A substrate and a dielectric layer disposed thereon are provided. The dielectric layer has a trench. A first deposition process is performed immediately after the substrate is placed on the supporting pins to form a metal layer in the trench, wherein during the first deposition process a temperature of the substrate is gradually increased to reach a predetermined temperature. When the temperature of the substrate reaches the predetermined temperature, a second deposition process is performed to completely fill the trench with the metal layer.Type: ApplicationFiled: February 21, 2012Publication date: August 22, 2013Inventors: Chi-Mao Hsu, Hsin-Fu Huang, Min-Chuan Tsai, Chien-Hao Chen, Wei-Yu Chen, Chin-Fu Lin, Jing-Gang Li, Min-Hsien Chen, Jian-Hong Su