Patents by Inventor Min-Hsun Hsieh

Min-Hsun Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250143026
    Abstract: A semiconductor light-emitting device includes: a semiconductor stack, including; an active layer, formed on the semiconductor stack; a second semiconductor contact layer formed on the active layer; and a recessed region formed in the semiconductor stack and including a part of the upper surface; a transparent electrode on the second semiconductor contact layer; a protective layer on semiconductor stack, including a first and second opening; a first electrode pad in the first opening and connected with the first semiconductor contact layer; and a second electrode pad in the second opening and connected to the transparent electrode. The semiconductor light-emitting device receives an operating current having ratio to the area of the transparent electrode that ranges from 10 mA/mm2 to 1000 mA/mm2. In a top view, the active layer surrounds the recessed region. The semiconductor stack and the transparent electrode layer each includes an edge adjacent to the recessed region.
    Type: Application
    Filed: January 3, 2025
    Publication date: May 1, 2025
    Inventors: Hsin-Ying WANG, Chao-Hsing CHEN, Chi-Ling LEE, Chen OU, Min-Hsun HSIEH
  • Patent number: 12272774
    Abstract: The present application discloses a light-emitting device comprises a semiconductor light-emitting element, a transparent element covering the semiconductor light-emitting element, an insulating layer which connects to the transparent element, an intermediate layer which connects to the insulating layer; and a conductive adhesive material connecting to the intermediate layer.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: April 8, 2025
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Liang Liu, Ming-Chi Hsu, Shih-An Liao, Jen-Chieh Yu, Min-Hsun Hsieh, Jia-Tay Kuo, Yu-Hsi Sung, Po-Chang Chen
  • Patent number: 12255188
    Abstract: An embodiment of present invention discloses a light-emitting device which includes a first light-emitting area, a second light-emitting area, and a third light-emitting area. The first light-emitting area emits a red light and includes a first light-emitting unit. The second light-emitting area emits a blue light and includes a second light-emitting unit. The third light-emitting area emits a green light and includes a third light-emitting unit. The first light-emitting area is larger than the second light-emitting area and larger than the third light-emitting area. Each of the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit has a width of less than 100 ?m and a length of less than 100 ?m.
    Type: Grant
    Filed: October 13, 2023
    Date of Patent: March 18, 2025
    Assignee: EPISTAR CORPORATION
    Inventor: Min-Hsun Hsieh
  • Publication number: 20250006864
    Abstract: A semiconductor device is provided, which includes an epitaxial structure, a first contact electrode and a second contact electrode. The epitaxial structure includes a first semiconductor structure, a second semiconductor structure and an active region. The first semiconductor structure includes a first semiconductor contact layer. The second semiconductor structure includes a second semiconductor contact layer. The active region is located between the first semiconductor structure and the second semiconductor structure. The first contact electrode is located on the second semiconductor contact layer and directly contacts the first semiconductor contact layer. The second contact electrode is located on the second semiconductor contact layer and directly contacts the second semiconductor contact layer. The first semiconductor contact layer has a conductivity type of n-type and includes a first group III-V semiconductor material.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 2, 2025
    Inventors: Yi-Chieh LIN, Shih-Chang LEE, Wei-Chu LIAO, Mei-Chun LIU, Hui-Ching FENG, Zhen-Kai KAO, Yih-Hua RENN, Min-Hsun HSIEH
  • Publication number: 20240421277
    Abstract: A pixel structure includes a first light-emitting diode for emitting a first light, wherein the first light-emitting diode has a first semiconductor layer, a first light-emitting surface, and a first electrode under the first semiconductor layer away from the first light-emitting surface; a second light-emitting diode for emitting a second light, wherein the second light-emitting diode has a second semiconductor layer, a second light-emitting surface, and a second electrode under the second semiconductor layer away from the second light-emitting surface; a dielectric layer surrounding and contacting the first semiconductor layer and the second light-emitting diode and exposing the first light-emitting surface, the first electrode, the second light-emitting surface and the second electrode; a common conductive structure having a semiconductor layer and a metal layer; and a light-transmitting conductive layer covering and electrical connecting the first light-emitting diode, the second light-emitting diode and
    Type: Application
    Filed: June 13, 2024
    Publication date: December 19, 2024
    Inventors: Min-Hsun HSIEH, Ying-Yang SU, Chien-Chih CHEN, Wei-Shan HU, Ching-Tai CHENG, Chung-Che TENG, Tai-Ni CHU, Hsin-Mao LIU
  • Publication number: 20240421266
    Abstract: An optoelectronic system having a first optoelectronic element with a first surface; a second optoelectronic element with a second surface; an IC, with a third surface coplanar with the first surface and the second surface; an electrical connection, electrically connecting the first optoelectronic element and the IC; and a material, surrounding the first optoelectronic element, the second optoelectronic element, and the IC, and exposing the first surface, the second surface, and the third surface.
    Type: Application
    Filed: August 30, 2024
    Publication date: December 19, 2024
    Inventors: Min-Hsun HSIEH, Cheng-Nan HAN, Steve Meng-Yuan HONG, Hsin-Mao LIU, Tsung-Xian LEE
  • Publication number: 20240405169
    Abstract: A wavelength conversion unit arrangement includes a carrier and a wavelength conversion unit. The wavelength conversion unit includes a wavelength conversion layer and a filter layer, and the filter layer attaches the wavelength conversion unit to the carrier. The filter layer has a first surface facing the carrier and a second surface opposite the first surface, and the first surface and the second surface have different textures.
    Type: Application
    Filed: May 28, 2024
    Publication date: December 5, 2024
    Inventors: Chong-Yu WANG, Wei-Shan HU, Ching-Tai CHENG, Chien-Chih CHEN, Min-Hsun HSIEH
  • Publication number: 20240405182
    Abstract: A light-emitting device includes a carrier, a light-emitting element and a connection structure. The carrier includes a first electrical conduction portion. The light-emitting element includes a first light-emitting layer capable of emitting first light and a first contact electrode formed under the light-emitting layer. The first contact electrode is corresponded to the first electrical conduction portion. The connection structure includes a first electrical connection portion and a protective portion surrounding the first contact electrode and the first electrical connection portion. The first electrical connection portion includes an upper portion, a lower portion and a neck portion arranged between the upper portion and the lower portion. An edge of the upper portion is protruded beyond the neck portion, and an edge of the lower portion is protruded beyond the upper portion.
    Type: Application
    Filed: August 8, 2024
    Publication date: December 5, 2024
    Inventors: Min-Hsun Hsieh, Shau-Yi Chen, Shao-You Deng
  • Publication number: 20240405181
    Abstract: An embodiment of the present disclosure provides a semiconductor device arrangement. This arrangement includes a substrate, an adhesive structure, and a first semiconductor device. The substrate includes an upper surface. The adhesive structure is located on the upper surface and includes a first concave region. The first semiconductor device includes a lower surface facing toward the adhesive structure and a conductive bump located under the lower surface and in the first concave region. The conductive bump includes a first portion and a second portion. Wherein the lower surface does not contact the adhesive structure, the first portion contacts the first concave region, and the second portion does not contact the first concave region.
    Type: Application
    Filed: June 4, 2024
    Publication date: December 5, 2024
    Inventors: Min-Hsun HSIEH, Shih-An LIAO, Wei-Yu CHEN, Li-Shen TANG, Kun-Wei KAO, Jia-Xing CHUNG, Wei-Shan HU, Ching-Tai CHENG, Chang-Tai HSIAO, Yih-Hua RENN, Chun-Yen WU
  • Publication number: 20240405054
    Abstract: A monolithic array chip comprises a first semiconductor layer; a common electrode located on the first semiconductor layer; a first light-emitting unit with a first electrode located on the first semiconductor layer; a second light-emitting unit with a second electrode located on the first semiconductor layer; a third light-emitting unit with a third electrode located on the first semiconductor layer, wherein the first light-emitting unit, the second light-emitting unit, and the third light-emitting unit are separated from each other by a trench.
    Type: Application
    Filed: May 30, 2024
    Publication date: December 5, 2024
    Inventors: Min-Hsun HSIEH, Chih-Ming WANG, Jan-Way CHIEN, Hui-Ching FENG, Yu-Chi WANG, Hsia-Ching CHENG
  • Publication number: 20240405002
    Abstract: An embodiment of the present disclosure provides a semiconductor device arrangement. This semiconductor device arrangement includes a substrate and a plurality of semiconductor devices. The substrate includes an upper surface. The plurality of semiconductor devices is separately and staggered located on the upper surface, and includes a first semiconductor device and a second semiconductor device. Wherein the first semiconductor device includes a first interior angle, the second semiconductor device includes a second interior angle, and there is a minimum distance between the first interior angle and the second interior angle among the plurality of semiconductor devices, wherein the minimum distance is between 3 ?m 25 ?m.
    Type: Application
    Filed: June 5, 2024
    Publication date: December 5, 2024
    Inventors: Min-Hsun HSIEH, Chang-Tai HSIAO
  • Patent number: 12154885
    Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.
    Type: Grant
    Filed: August 15, 2023
    Date of Patent: November 26, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Shih-An Liao, Ying-Yang Su, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
  • Patent number: 12132073
    Abstract: A light-emitting module including a first optoelectronic unit having a first electrode pad and a second electrode pad, a second optoelectronic unit having a third electrode pad and a fourth electrode pad, a first supporting structure enclosing the first optoelectronic unit and the second optoelectronic unit, a first pin overlapping and confronted with both of the first electrode pad and the third electrode pad, a second pin overlapping the second electrode pad and the first supporting structure, and a third pin overlapping the fourth electrode pad and physically separated from the second pin.
    Type: Grant
    Filed: September 12, 2023
    Date of Patent: October 29, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Min Hsun Hsieh, Hsin-Mao Liu
  • Patent number: 12119321
    Abstract: A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section vie
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: October 15, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Shih-An Liao, Shau-Yi Chen, Ming-Chi Hsu, Chun-Hung Liu, Min-Hsun Hsieh
  • Publication number: 20240339345
    Abstract: A chip transferring method includes steps of: providing a plurality of chips on a first load-bearing structure; measuring photoelectric characteristic values of the plurality of chips; categorizing the plurality of chips into a first portion of the plurality of chips and a second portion of the plurality of chips according to the photoelectric characteristic values of the plurality of chips, wherein the second portion of the plurality of chips comprise parts of the plurality of chips which photoelectric characteristic value falls within an unqualified range; removing the second portion of the plurality of chips from the first load-bearing structure; dividing the first portion of the plurality of chips into a plurality of blocks, wherein each of the plurality of blocks comprising multiple chips of the first portion of the plurality of chips; and transferring the first portion of the plurality of chips in one of the plurality of blocks to a second load-bearing structure in single-batch.
    Type: Application
    Filed: June 20, 2024
    Publication date: October 10, 2024
    Inventors: Min-Hsun HSIEH, De-Shan KUO, Chang-Lin LEE, Jhih-Yong YANG
  • Publication number: 20240332264
    Abstract: A pixel package includes a first light-emitting diode, a second light-emitting diode, a third light-emitting diode, a transparent layered structure, and a first conductive structure. The first light-emitting diode has a first light-emitting surface and a first bottom surface opposite thereto, and the first light-emitting diode is arranged side by side with the second light-emitting diode over the first light-emitting surface. The transparent layered structure encapsulates and separates the first light-emitting diode, the second light-emitting diode, and the third light-emitting diode. The first conductive structure has a first portion and a second portion. The first portion is located between the first light-emitting diode and the first light-emitting surface. The second portion is located under the first portion and is exposed from the transparent layered structure.
    Type: Application
    Filed: March 25, 2024
    Publication date: October 3, 2024
    Inventors: Min-Hsun HSIEH, Kun-Wei KAO, Teng-Hui HSIEH
  • Publication number: 20240332455
    Abstract: The present application discloses a method of forming a semiconductor structure. The method of forming the semiconductor structure includes the following steps. A substrate is provided. An epitaxial structure with a patterned surface is formed on the substrate. The substrate is removed to expose the patterned surface of the epitaxial structure. A filling structure is formed over the patterned surface to form a flat surface. A singulation process is performed on the epitaxial structure to form a plurality of light emitting structures.
    Type: Application
    Filed: March 18, 2024
    Publication date: October 3, 2024
    Inventor: Min-Hsun HSIEH
  • Patent number: 12107080
    Abstract: The application discloses a light-emitting device including a carrier which includes an insulating layer, an upper conductive layer formed on the insulating layer, a plurality of conducting vias passing through the insulating layer, and a lower conductive layer formed under the insulating layer; four light-emitting elements arranged in rows and columns flipped on the carrier; and a light-passing unit formed on the carrier and covering the four light-emitting elements; wherein each of the light-emitting elements including a first light-emitting bare die emitting a first dominant wavelength, a second light-emitting bare die emitting a second dominant wavelength, and a third light-emitting bare die emitting a third dominant wavelength; and wherein two adjacent first light-emitting bare die in a row has a first distance W1, two adjacent first light-emitting bare die in a column has a second distance W2, and W1 is the same as W2.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: October 1, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Tzu-Hsiang Wang
  • Patent number: 12100793
    Abstract: A light-emitting device includes a carrier, a light-emitting element and a connection structure. The carrier includes a first electrical conduction portion. The light-emitting element includes a first light-emitting layer capable of emitting first light and a first contact electrode formed under the light-emitting layer. The first contact electrode is corresponded to the first electrical conduction portion. The connection structure includes a first electrical connection portion and a protective portion surrounding the first contact electrode and the first electrical connection portion. The first electrical connection portion includes an upper portion, a lower portion and a neck portion arranged between the upper portion and the lower portion. An edge of the upper portion is protruded beyond the neck portion, and an edge of the lower portion is protruded beyond the upper portion.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: September 24, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Min-Hsun Hsieh, Shau-Yi Chen, Shao-You Deng
  • Publication number: 20240313146
    Abstract: The present disclosure provides a light-emitting module and a display apparatus thereof. The light-emitting module includes a circuit substrate which includes a first surface and a second surface opposite to the first surface. The first surface includes a plurality of conductive channels, and the second surface includes a plurality of conductive pads. A plurality of light-emitting groups is arranged in a matrix on the first surface. Each of the light-emitting groups includes a red light-emitting diode chip, a green light-emitting diode chip, and a blue light-emitting diode chip. An electric component is disposed on the first surface and located in the light-emitting groups matrix. A translucent encapsulating component covers the plurality of light-emitting groups and the electric component. The light-emitting groups matrix comprises m columns and n rows.
    Type: Application
    Filed: May 20, 2024
    Publication date: September 19, 2024
    Inventors: Min-Hsun HSIEH, Jen-Chieh YU, Chun-Wei CHEN