Abstract: An external cavity tunable laser includes a gain median module to generate a broadband optical spectrum covering a predetermined wavelength range; a collimate lens turning a diverging beam into a collimated beam; a pair of etalons to tune frequency; an actuator to adjust an external cavity optical pathlength; a bandpass filter to block one or more frequencies outside the predetermined wavelength range; a beam splitter to split a percentage of the beam to a photodetector; a reflection mirror for feedback to gain median waveguide; an isolator for preventing reflecting light back to the external cavity; and a hermetically sealed housing less than 0.15 cubic centimeters.

Abstract: A pixel structure, an array substrate, a display panel and a display device. The pixel structure includes a gate line (10), a data line (20), a gate (30), a first electrode (40), a second electrode (50), and a third electrode (60); the gate (30) is connected to the gate line (10); the first electrode (40) is connected to the data line (20); and the second electrode (50) has a first portion and a second portion that are distributed in the extending direction of the second electrode, wherein the first portion of the second electrode (50) cooperates with the first electrode (40) and the gate (30) to form a first thin film transistor, and the second portion of the second electrode (50) cooperates with the third electrode (60) and the gate (30) to form a second thin film transistor.

Abstract: An electronic device includes a first substrate structure, multiple electronic elements and a second substrate structure. The first substrate structure includes a first substrate. The electronic elements are disposed on the first substrate. The second substrate structure is coupled to the first substrate structure. The second substrate structure includes a second substrate, a protection circuit, a driving circuit and a bonding pad. The protection circuit is disposed on the second substrate. The driving circuit is disposed on the second substrate and configured to drive at least a part of the electronic elements. The bonding pad is disposed on the second substrate. The protection circuit is respectively coupled to the bonding pad and the driving circuit. The electronic device may reduce the damage caused by electrostatic discharge or reduce the impact of the bonding process of the bonding pad on signal conduction.

Abstract: An industrial work order analysis system applies statistical and machine learning analytics to both open and closed work orders to identify problems and abnormalities that could impact manufacturing and maintenance operations. The analysis system applies algorithms to learn normal maintenance behaviors or characteristics for different types of maintenance tasks and to flag abnormal maintenance behaviors that deviate significantly from normal maintenance procedures. Based on this analysis, embodiments of the work order analysis system can identify unnecessarily costly maintenance procedures or practices, as well as predict asset failures and offer enterprise-specific recommendations intended to reduce machine downtime and optimize the maintenance process.

Abstract: The present invention provides an apparatus for manufacturing a secondary battery, which includes a pressing part configured to press a stack in which electrodes and separators are alternately disposed, wherein the pressing part includes: a main pressing part configured to press an entire surface of the stack; and a sub pressing part including a drum part configured to press a partial surface of the stack, on which an edge part of an electrode active material layer provided on each of the electrodes is disposed, on the entire surface, wherein the drum part includes: a body part having a rotational shaft; and an elastic part provided on an outer circumferential surface of the body part and configured to press the partial surface of the stack.

Abstract: A laser diode includes a substrate, an epitaxial structure, an electrode contacting layer and an optical cladding layer. The epitaxial structure is disposed on the substrate, and is formed with a ridge structure opposite to the substrate. The electrode contacting layer is disposed on a top surface of the ridge structure. The optical cladding layer has a refractive index smaller than that of the electrode contacting layer. The optical cladding layer includes a first cladding portion which covers side walls of the ridge structure, and a second cladding portion which is disposed on a portion of the top surface of the ridge structure. A method for manufacturing the abovementioned laser diode is also disclosed.

Abstract: Some embodiments of the present disclosure relate to an integrated chip including an extended via that spans a combined height of a wire and a via and that has a smaller footprint than the wire. The extended via may replace a wire and an adjoining via at locations where the sizing and the spacing of the wire are reaching lower limits. Because the extended via has a smaller footprint than the wire, replacing the wire and the adjoining via with the extended via relaxes spacing and allows the size of the pixel to be further reduced. The extended via finds application for capacitor arrays used for pixel circuits.

Abstract: Semiconductor structure and methods of forming the same are provided. An exemplary method includes receiving a workpiece including a magnetic tunneling junction (MTJ) and a conductive capping layer disposed on the MTJ, depositing a first dielectric layer over the workpiece, performing a first planarization process to the first dielectric layer, and after the performing of the first planarization process, patterning the first dielectric layer to form an opening exposing a top surface of the conductive capping layer, selectively removing the conductive capping layer. The method also includes depositing an electrode layer to fill the opening and performing a second planarization process to the workpiece such that a top surface of the electrode layer and a top surface of the first dielectric layer are coplanar.

Abstract: A semiconductor device assembly is provided. The assembly includes a package substrate which has a tunneled interconnect structure. The tunneled interconnect structure has a solder-wettable surface, an interior cavity, and at least one microvia extending from the surface to the cavity. The assembly further includes a semiconductor device disposed over the substrate and a solder joint coupling the device and the substrate. The joint comprises the solder between the semiconductor device and the interconnect structure, which includes the solder on the surface, the solder in the microvia, and the solder within the interior cavity.

Abstract: A method includes forming a transistor, which includes forming a dummy gate stack over a semiconductor region, and forming an Inter-Layer Dielectric (ILD). The dummy gate stack is in the ILD, and the ILD covers a source/drain region in the semiconductor region. The method further includes removing the dummy gate stack to form a trench in the first ILD, forming a low-k gate spacer in the trench, forming a replacement gate dielectric extending into the trench, forming a metal layer to fill the trench, and performing a planarization to remove excess portions of the replacement gate dielectric and the metal layer to form a gate dielectric and a metal gate, respectively. A source region and a drain region are then formed on opposite sides of the metal gate.

Abstract: A water-filtration device filtrates water, has a main-filtration path and a bypassing-filtration path, and comprises a filter head, a water filter, a guiding assembly and an adjusting valve movably mounted at the filter head. The guiding assembly is mounted at the filter head and connected to the water filter. An O-ring of the adjusting valve can block an end of a bypassing portion of the guiding assembly. In the main-filtration path, water entering from a water inlet of the filter head does not pass through the bypassing portion, thereby completely passing through filter materials in a first filtrating room and a second filtrating room of the water filter. Water in the bypassing-filtration path passes through the bypassing portion and the filter material in the first filtrating room. The O-ring does not reach into the bypassing portion, thereby reducing wear and damage to the O-ring, and avoiding water leakage.

Abstract: An anterograde monosynaptic transneuronal viral tracer system for mapping the direct postsynaptic targets of neurons in a given brain nucleus comprises a tracer H129-derived recombinant HSV-1 virion; and a helper AAV2/9-derived recombinant AAV2/9 virion; wherein the tracer H129-derived recombinant HSV-1 virion comprises a recombinant HSV-1-H129 viral genome with an impaired gK gene, and a mutant gK protein that pseudotypes the tracer H129-derived recombinant HSV-1 virion; and wherein the helper AAV2/9-derived recombinant AAV2/9 virion comprises a recombinant AAV2/9 viral genome that contains an HSV-1 H129 wild-type gK encoding sequence.

Abstract: A method for producing exosomes in a large-scale by using a cyclic tensile bioreactor to stimulate cells to release exosomes. In addition, the exosome having an anti-HLA-G protein specific for cancer is used as a delivery vehicle to deliver therapeutic agents for treating cancer.

Abstract: A semiconductor device assembly includes a substrate and a first semiconductor device mounted to the substrate. An epoxy-based spacer is mounted to the substrate proximate to the first semiconductor device by an adhesive attached to a bottom surface of the epoxy-based spacer and to the substrate. A second semiconductor device is mounted directly to top surfaces of both the first semiconductor device and the epoxy-based spacer.

Abstract: An MRAM structure includes a dielectric layer. A first MRAM, a second MRAM and a third MRAM are disposed on the dielectric layer, wherein the second MRAM is disposed between the first MRAM and the third MRAM, and the second MRAM includes an MTJ. Two gaps are respectively disposed between the first MRAM and the second MRAM and between the second MRAM and the third MRAM. Two tensile stress pieces are respectively disposed in each of the two gaps. A first compressive stress layer surrounds and contacts the sidewall of the MTJ entirely. A second compressive stress layer covers the openings of each of the gaps and contacts the two tensile stress pieces.

Abstract: Semiconductor devices and associated systems and methods are disclosed herein. In some embodiments, the semiconductor devices include a package substrate, a stack of dies carried by the package substrate, and one or more radiation shields configured to absorb neutrons from neutron radiation incident on the semiconductor device. The radiation shields can include one or more walls attached to a perimeter portion of the package substrate at least partially surrounding the stack of dies and/or a lid carried over the stack of dies. Each of the radiation shields can include hydrocarbon materials, boron, lithium, gadolinium, cadmium, and like materials that effectively absorb neutrons from neutron radiation. In some embodiments, the semiconductor devices also include a molding material over the stack of dies and the radiation shields, and a hydrocarbon coating over an external surface of the mold material.

Abstract: An industrial work order analysis system applies statistical and machine learning analytics to both open and closed work orders to identify problems and abnormalities that could impact manufacturing and maintenance operations. The analysis system applies algorithms to learn normal maintenance behaviors or characteristics for different types of maintenance tasks and to flag abnormal maintenance behaviors that deviate significantly from normal maintenance procedures. Based on this analysis, embodiments of the work order analysis system can identify unnecessarily costly maintenance procedures or practices, as well as predict asset failures and offer enterprise-specific recommendations intended to reduce machine downtime and optimize the maintenance process.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.

Abstract: Semiconductor devices having flow controllers configured to reduce mitigation of mold material between stacked layers, and associated systems and methods, are disclosed herein. In some embodiments, the semiconductor device includes a package substrate that has first and second surfaces. First and second die stacks are formed on the first surface and are adjacent to each other. A portion of the first surface extends between the first and second die stacks. A layer of material is adhered to top surfaces of the first and second die stacks and extends at a distance above the package substrate to form a tunnel between the layer of material, opposing sidewalls of the die stacks, and the package substrate. The semiconductor device further includes a flow controller that is adhered to at least a portion of the first surface inside the tunnel that reduces a cross-sectional surface area of at least a portion of the tunnel.

Abstract: An MRAM structure includes a dielectric layer. A first MRAM, a second MRAM and a third MRAM are disposed on the dielectric layer, wherein the second MRAM is disposed between the first MRAM and the third MRAM, and the second MRAM includes an MTJ. Two gaps are respectively disposed between the first MRAM and the second MRAM and between the second MRAM and the third MRAM. Two tensile stress pieces are respectively disposed in each of the two gaps. A first compressive stress layer surrounds and contacts the sidewall of the MTJ entirely. A second compressive stress layer covers the openings of each of the gaps and contacts the two tensile material pieces.