Patents by Inventor Min Liang

Min Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12293248
    Abstract: The present disclosure provides a map information acquisition method and a map acquisition apparatus and a non-transitory computer-readable storage medium. The method comprises: acquiring and constructing, by a map acquisition apparatus, map data, and acquiring, by the map acquisition apparatus, shelf identity information of each of shelves, wherein the shelf identity information is in one-to-one correspondence with the shelves, wherein the map acquisition apparatus comprises: a shopping cart component provided with a map construction system and a radio frequency identification reader; and marking, by the map acquisition apparatus, the map data according to each of the shelf identity information, and generating, by the map acquisition apparatus, map information marked with multiple pieces of shelf identity information.
    Type: Grant
    Filed: January 18, 2024
    Date of Patent: May 6, 2025
    Assignee: HANSHOW TECHNOLOGY CO., LTD.
    Inventors: Shiguo Hou, Min Liang, Jun Chen, Qi Jiang, Yang Zhao
  • Publication number: 20250125208
    Abstract: A method of manufacturing a semiconductor package includes the following steps. A first redistribution layer structure is formed over a circuit board structure. A through via is formed over the first redistribution layer structure. A first die is mounted onto the first redistribution layer structure aside the through via. A first encapsulant is formed to encapsulate the first die and the through via, wherein surfaces of the first encapsulant, the first die and the through via are substantially coplanar.
    Type: Application
    Filed: December 25, 2024
    Publication date: April 17, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Yi Wu, Chen-Hua Yu, Chung-Shi Liu, Yu-Min Liang
  • Patent number: 12253681
    Abstract: A surgical navigation system includes a first tracking unit, a second tracking unit and a processing unit. The first tracking unit captures a first infrared image of a position identification unit that includes a reference target fixed on a patient and an instrument target disposed on a surgical instrument. The second tracking unit captures a second infrared image of the position identification unit. The processing unit performs image recognition on the first and second infrared images with respect to the position identification unit, and uses, based on a result of the image recognition, a pathological image and one of the first and second infrared images to generate an augmented reality image. When both the first and second images have both the reference target and the instrument target, one of the first image and the second image with a higher accuracy is used to generate the augmented reality image.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: March 18, 2025
    Assignee: TAIWAN MAIN ORTHOPAEDIC BIOTECHNOLOGY CO., LTD.
    Inventor: Min-Liang Wang
  • Patent number: 12254374
    Abstract: The present disclosure provides a locating method and a locating system for a smart shopping cart, a computer device and a storage medium. The method includes: constructing a locating fingerprint database of an smart shopping cart based on commodity attributes collected by an intelligent device and shelf label heartbeat signals received by a communication module; when a motion sensor obtains the motion data of the shopping cart body, the communication module sends all shelf label heartbeat signals received within a second preset time window to a server; the server matches all the shelf label heartbeat signals received within the second preset time window with the locating fingerprint database to obtain locating information of the smart shopping cart.
    Type: Grant
    Filed: September 5, 2024
    Date of Patent: March 18, 2025
    Assignee: HANSHOW TECHNOLOGY CO., LTD
    Inventors: Min Liang, Zhe Fu, Xingyu Zhang
  • Patent number: 12249587
    Abstract: A semiconductor structure includes a substrate component, an IC die component over the substrate component, and a composite redistribution structure interposed between and electrically coupled to the substrate and IC die components. The composite redistribution structure includes a local interconnect component between a first redistribution structure overlying the substrate component and a second redistribution structure underlying the IC die component, and an insulating encapsulation between the first and second redistribution structures and embedding the local interconnect component therein.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: March 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Yi Wu, Chen-Hua Yu, Yu-Min Liang, Jung-Wei Cheng
  • Publication number: 20250064547
    Abstract: A positioning marker ball is adapted for an optical positioning system and includes a main body unit, and an optical unit. The main body unit includes a ball body, and a rod portion that extends outwardly from the ball body, and that has a connecting end section disposed opposite the ball body and is adapted to connect a mount. The ball body is molded integrally with the rod portion. The optical unit is disposed on the ball body, and includes a reflective layer that is disposed on the ball body to reflect light. A positioning device adapted for an optical positioning system includes the positioning marker ball described above. A method for making the positioning marker ball is also included.
    Type: Application
    Filed: January 26, 2024
    Publication date: February 27, 2025
    Inventor: Min-Liang WANG
  • Publication number: 20250069525
    Abstract: A positioning method for an electrical shelf label, a computer device, and a non-transitory computer readable storage medium. The method includes: obtaining, by a server, a candidate electronic shelf label with a fuzzy positioning result; sequentially executing, by each of the candidate-matching shelf label pairs, a distance measurement task according to the distance measurement instruction to obtain a measured distance between the candidate electronic shelf label and each of the matching electronic shelf labels; revising, by the server, the fuzzy positioning result of the candidate electronic shelf label based on all the measured distances to determine an actual positioning result for the candidate electronic shelf label.
    Type: Application
    Filed: September 27, 2024
    Publication date: February 27, 2025
    Applicant: HANSHOW TECHNOLOGY CO., LTD.
    Inventors: Min LIANG, Yaping JI, Sicheng YU
  • Publication number: 20250062184
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor die, a second semiconductor die, a molding compound, a heat dissipation module and an adhesive material. The first and second semiconductor dies are different types of dies and are disposed side by side. The molding compound encloses the first and second semiconductor dies. The heat dissipation module is located directly on and in contact with the back sides of the first and second semiconductor dies. The adhesive material is filled and contacted between the heat dissipation module and the molding compound. The semiconductor package has a central region and a peripheral region surrounding the central region. The first and second semiconductor dies are located within the central region. A sidewall of the heat dissipation module, a sidewall of the adhesive material and a sidewall of the molding compound are substantially coplanar.
    Type: Application
    Filed: November 4, 2024
    Publication date: February 20, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang, Wen-Lin Chen
  • Patent number: 12230589
    Abstract: A semiconductor package includes a substrate, a semiconductor device, and a ring structure. The semiconductor device disposed on the substrate. The ring structure disposed on the substrate and surrounds the semiconductor device. The ring structure includes a first portion and a second portion. The first portion bonded to the substrate. The second portion connects to the first portion. A cavity is between the second portion and the substrate.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: February 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Jung-Wei Cheng, Yu-Min Liang, Jiun-Yi Wu, Yen-Fu Su, Chien-Chang Lin, Hsin-Yu Pan
  • Publication number: 20250056447
    Abstract: The present disclosure provides a communication method of an electronic shelf label system, a system, and a computer device. The method includes: repeatedly sending, by each of the plurality of base stations, a synchronization frame, wherein the synchronization frame includes a packet sequence number, and each of the synchronization frames includes a different packet sequence number; receiving, by the electronic shelf label, the synchronization frame at a receiving time point scheduled to wake up; determining whether the packet sequence number of the synchronization frame is the same as a packet sequence number corresponding to the receiving time point; and adjusting, if both are the same, by the electronic shelf label, a duration of the next sleep to compensate for the time difference, so as the next reception of a synchronization frame includes a packet sequence number corresponding to the receiving time point.
    Type: Application
    Filed: October 11, 2024
    Publication date: February 13, 2025
    Inventors: Min LIANG, Yaping JI, Gengfeng CHEN, Guofeng ZHANG, Yujing WANG, Ju ZHANG, Qi JIANG
  • Publication number: 20250056441
    Abstract: The present disclosure provides a communication method of an electronic shelf label system, a system, a computer device and a storage medium. The method includes: configuring, by a server, an offset of each of base stations in a corresponding synchronization sub-network based on neighboring relationships between all the base stations in each of the synchronization sub-networks, so that each of the base stations calculates synchronization frame transmission time in a predetermined signal transmission cycle based on the offset; calculating, by each of the base stations, idle time in a synchronization channel based on the synchronization frame transmission time, so that each of the base stations receives a target synchronization frame sent by a superior base station in the idle time of the synchronization channel. According to the present disclosure, the synchronization frames sent by all the base stations has central and adjacent feature in time.
    Type: Application
    Filed: April 16, 2024
    Publication date: February 13, 2025
    Inventors: Min LIANG, Yaping JI, Gengfeng CHEN, Guofeng ZHANG, Yujing WANG, Ju ZHANG, Qi JIANG
  • Publication number: 20250045128
    Abstract: A shelf label communication method based on a synchronous network, a shelf label system and a computer device are provided. The synchronous network includes a base station topological structure, including a master base station, a first-level secondary base station directly connected to the master base station, and a (i+1)th-level secondary base station directly connected to an ith-level secondary base station, and each base station being connected to only one superior base station. The first-level secondary base station obtains a first synchronization signal from the master base station, so the first-level secondary base station starts to operate according to system time of the master base station. Further, the (i+1)th-level secondary base station obtains a second synchronization signal from the ith-level secondary base station, so that the (i+1)th-level secondary base station starts to operate according to local system time of the ith-level secondary base station.
    Type: Application
    Filed: October 21, 2024
    Publication date: February 6, 2025
    Applicant: HANSHOW TECHNOLOGY CO., LTD.
    Inventors: Min LIANG, Yaping JI, Yujing WANG, Longfei GAO, Qi JIANG, Ju ZHANG, Gengfeng CHEN, Guofeng ZHANG
  • Patent number: 12218020
    Abstract: A semiconductor package includes a circuit structure, a first redistribution layer, a second redistribution layer, a first encapsulant, a bus die and a plurality of through vias. The first redistribution layer is disposed over the circuit structure. The second redistribution layer is disposed over the first redistribution layer. The first encapsulant is disposed between the first redistribution layer and the second redistribution layer. The through vias surround the bus die. The first encapsulant is extended along an entire sidewall of the bus die, and a first surface of the bus die is substantially coplanar with top surfaces of the first encapsulant and the plurality of through vias.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: February 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Yi Wu, Chen-Hua Yu, Chung-Shi Liu, Yu-Min Liang
  • Patent number: 12218021
    Abstract: A semiconductor package includes a circuit board structure, a first redistribution layer structure and first bonding elements. The circuit board structure includes outermost first conductive patterns and a first mask layer adjacent to the outermost first conductive patterns. The first redistribution layer structure is disposed over the circuit board structure. The first bonding elements are disposed between and electrically connected to the first redistribution layer structure and the outermost first conductive patterns of the circuit board structure. In some embodiments, at least one of the first bonding elements covers a top and a sidewall of the corresponding outermost first conductive pattern.
    Type: Grant
    Filed: May 31, 2023
    Date of Patent: February 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Wei Cheng, Jiun-Yi Wu, Hsin-Yu Pan, Tsung-Ding Wang, Yu-Min Liang, Wei-Yu Chen
  • Patent number: 12207187
    Abstract: A method and a system for electronic shelf label network access and roaming communication are disclosed in the present disclosure. The present disclosure greatly improves the success rate of a background server in selecting an optimal base station to timely communicate with an electronic shelf label that has newly entered a coverage area of an electronic shelf label system or moved, and ensures the reliability and stability of the communication between the background server and the electronic shelf label.
    Type: Grant
    Filed: August 8, 2024
    Date of Patent: January 21, 2025
    Assignee: Hanshow Technology Co., Ltd.
    Inventors: Min Liang, Shiguo Hou, Yaping Ji, Yujing Wang, Ju Zhang, Guofeng Zhang, Qi Jiang
  • Patent number: 12206171
    Abstract: A sensing system is provided that includes a first sub-sensing system having a first azimuth plane. The first sub-sensing system includes a Gradient-index lens, and a first plurality of antenna elements arranged adjacent to the Gradient-index lens and configured to receive a first signal emanating from a first field of view. The sensing system also includes a second sub-sensing system having a second azimuth plane oriented at an angle with respect to the first azimuth plane and a second plurality of antenna elements configured to receive a second signal emanating from a second field of view.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: January 21, 2025
    Assignee: Lunewave Inc.
    Inventors: Hao Xin, Jiang Xin, Min Liang, Ning Cao
  • Publication number: 20240430779
    Abstract: The present disclosure discloses a method and system for querying and responding to grouped electronic shelf labels, which simplify a large number of query instructions into one query instruction, so that a transmission data volume for querying a large number of electronic shelf labels is greatly saved, the overhead caused by queries on the system is reduced, and the system service throughput is improved.
    Type: Application
    Filed: September 4, 2024
    Publication date: December 26, 2024
    Inventors: Min LIANG, Shiguo HOU, Yaping JI, Yujing WANG, Ju ZHANG, Guofeng ZHANG
  • Patent number: 12165946
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor die, a second semiconductor die, a molding compound, a heat dissipation module and an adhesive material. The first and second semiconductor dies are different types of dies and are disposed side by side. The molding compound encloses the first and second semiconductor dies. The heat dissipation module is located directly on and in contact with the back sides of the first and second semiconductor dies. The adhesive material is filled and contacted between the heat dissipation module and the molding compound. The semiconductor package has a central region and a peripheral region surrounding the central region. The first and second semiconductor dies are located within the central region. A sidewall of the heat dissipation module, a sidewall of the adhesive material and a sidewall of the molding compound are substantially coplanar.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: December 10, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang, Wen-Lin Chen
  • Patent number: D1065531
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: March 4, 2025
    Assignee: TAIWAN MAIN ORTHOPAEDIC BIOTECHNOLOGY CO., LTD.
    Inventor: Min-Liang Wang
  • Patent number: D1072813
    Type: Grant
    Filed: April 25, 2023
    Date of Patent: April 29, 2025
    Assignee: Nanning FuLian FuGui Precision Industrial Co., Ltd.
    Inventors: Zhi-Cheng Yu, Xiao-Min Liang