Abstract: A method and a system for electronic shelf label network access and roaming communication are disclosed in the present disclosure. The present disclosure greatly improves the success rate of a background server in selecting an optimal base station to timely communicate with an electronic shelf label that has newly entered a coverage area of an electronic shelf label system or moved, and ensures the reliability and stability of the communication between the background server and the electronic shelf label.

Abstract: Methods, systems and computer devices are provided for adjusting a frame-listening cycle. The method includes: configuring, by a server, a fixed frame-listening cycle of an electronic shelf label according to a time period; and sending, by the server, a second frame-listening cycle modification command through a base station when the server is to issue the fast response service during the low power consumption time period, so that the electronic shelf label modifies the current frame-listening cycle to a fast frame-listening cycle according to the second frame-listening cycle modification command. According to the present disclosure, the electronic shelf label can not only respond to the fast response service in real time, but also keep the low power consumption of a long frame-listening cycle, thereby simultaneously satisfying the requirements of high real-time performance and low power consumption of the electronic shelf label.

Abstract: The disclosure provides a shelf label communication method based on a synchronous network, a shelf label system and a computer device. In the method, an electronic shelf label establishes a first timing task of a timer when receiving a timing service instruction; determines a timing duration of the first timing task based on a time difference between current local system time when the timing service instruction is received and the instruction execution system time, and starts the first timing task; the electronic shelf label cyclically calibrates a current timing duration in the first timing task based on the periodically received base-station system time, to obtain the calibrated current timing duration.

Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, a second encapsulant, and a conductive terminal. The first die includes a first connector, and the second die includes a second connector. The first encapsulant includes: a first portion, on the second die; a second portion, sandwiched between a first sidewall of the first die and a first sidewall of the second die; and a third portion, covering a second sidewall of the second die. The second encapsulant, laterally encapsulating the first die, the second die and the first encapsulant. The conductive terminal, electrically connected to the first die and the second die through a redistribution layer (RDL) structure. The third portion of first encapsulant is sandwiched between the second sidewall of the second die and the second encapsulant.

Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a redistribution layer, a semiconductor die, conducting connectors, dummy bumps and an underfill. The semiconductor die is disposed on a top surface of the redistribution layer and electrically connected with the redistribution layer. The conducting connectors are disposed between the semiconductor die and the redistribution layer, and are physically and electrically connected with the semiconductor die and the redistribution layer. The dummy bumps are disposed on the top surface of the redistribution layer, beside the conducting connectors and under the semiconductor die. The underfill is disposed between the semiconductor die and the redistribution layer and sandwiched between the dummy bumps and the semiconductor die. The dummy bumps are electrically floating. The dummy bumps are in contact with the underfill without contacting the semiconductor die.

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: A positioning method for an electrical shelf label, a computer device, and a non-transitory computer readable storage medium. The method includes: obtaining, by a server, a candidate electronic shelf label with a fuzzy positioning result; sequentially executing, by each of the candidate-matching shelf label pairs, a distance measurement task according to the distance measurement instruction to obtain a measured distance between the candidate electronic shelf label and each of the matching electronic shelf labels; revising, by the server, the fuzzy positioning result of the candidate electronic shelf label based on all the measured distances to determine an actual positioning result for the candidate electronic shelf label.

Abstract: Interconnect devices, packaged semiconductor devices and methods are disclosed herein that are directed towards embedding a local silicon interconnect (LSI) device and through substrate vias (TSVs) into system on integrated substrate (SoIS) technology with a compact package structure. The LSI device may be embedded into SoIS technology with through substrate via integration to provide die-to-die FL connection arrangement for super large integrated Fan-Out (InFO) for SBT technology in a SoIS device. Furthermore, the TSV connection layer may be formed using lithographic or photoresist-defined vias to provide eLSI P/G out to a ball-grid-array (BGA) connection interface.

Abstract: According to various embodiments, a face mask includes a cover shield, an input and an output fan. The cover shield is shaped to cover nose and mouth of a wearer, and defines an inner space between the cover shield and the skin of the wearer. The input fan is coupled to the cover shield, and is configured to draw air from outside into the inner space. The output fan is coupled to the cover shield, and is configured to expel air out of the inner space.

Abstract: A headset may include a headband; first and second earcups respectively attached to first and second ends of the headband; a first light display unit; a headset receiver configured to receive data from a processor-based device; and a headset control unit. Each of the first and second earcups may include an interior surface and an exterior surface, where the interior surfaces of the first and second earcups may face each other and the exterior surfaces of the first and second earcups may face away from each other. The first light display unit may include a matrix of independently controllable light emitting elements arranged along a boundary of the exterior surface of the first earcup. The headset control unit may be configured to control the light emitting elements of the first light display unit based on the data received by the headset receiver.

Abstract: Disclosed are a control method for electronic price tags, an electronic price tag and an electronic price tag system. The control method comprises: receiving at least one first service instruction by a wireless communication module, and receiving at least one second service instruction by a short-distance communication module; and performing, by a fusion processing module, fusion processing on the at least one first service instruction and the at least one second service instruction, which are of a same service type and have an effective duration overlap therebetween, to enable a response module to respond synchronously according to control parameters obtained after fusion processing.

Abstract: Interconnect devices, packaged semiconductor devices and methods are disclosed herein that are directed towards embedding a local silicon interconnect (LSI) device and through substrate vias (TSVs) into system on integrated substrate (SoIS) technology with a compact package structure. The LSI device may be embedded into SoIS technology with through substrate via integration to provide die-to-die FL connection arrangement for super large integrated Fan-Out (InFO) for SBT technology in a SoIS device. Furthermore, the TSV connection layer may be formed using lithographic or photoresist-defined vias to provide eLSI P/G out to a ball-grid-array (BGA) connection interface.

Abstract: This disclosure provides a method of dynamically adjusting timing between adjacent networks in a synchronous network and an electronic shelf label system. The method includes: determining, by a server, a timing adjustment direction and a timing adjustment value of a current network based on an interference timing relationship diagram; generating, by the server, a corresponding adjustment task form the timing adjustment direction and the timing adjustment value of the current network, and sending the adjustment task to a master base station in the current network in the processing of each of the current networks, such that the master base station and a secondary base station dynamically adjust timing based on the adjustment task.

Abstract: Mitoxantrone hydrochloride liposome can be used in the preparation of drugs for treating advanced solid tumors. A higher therapeutically effective amount of mitoxantrone hydrochloride liposome, for example 8-150 mg/m2, is administered to patients with the advanced solid tumors. Animal test results show that the mitoxantrone hydrochloride liposome can effectively inhibit the growth of various solid tumor transplantation tumors. Clinical research results show that the mitoxantrone hydrochloride liposome can effectively treat advanced solid tumors, and is safe and controllable.

Abstract: A semiconductor structure includes a redistribution structure, topmost and bottom conductive terminals. The redistribution structure includes a topmost pad in a topmost dielectric layer, a topmost under-bump metallization (UBM) pattern directly disposed on the topmost pad and the topmost dielectric layer, a bottommost UBM pad embedded in a bottommost dielectric layer, and a bottommost via laterally covered by the bottommost dielectric layer. Bottom surfaces of the topmost pad and the topmost dielectric layer are substantially coplanar, bottom surfaces of the bottommost UBM pad and the bottommost dielectric layer are substantially coplanar, the bottommost via is disposed on a top surface of the bottommost UBM pad, top surfaces of the bottommost via and the bottommost dielectric layer are substantially coplanar. The topmost conductive terminal lands on a recessed top surface of the topmost UBM pattern, and the bottommost conductive terminal lands on the planar bottom surface of the bottommost UBM.

Abstract: An electronic shelf label positioning method and system. The method includes: receiving a binding relationship between a shelf ID and a guide rail ID, and a binding relationship between the guide rail ID and wireless label IDs; receiving the wireless label ID read by the electronic shelf label; determining the guide rail ID of the guide rail where the electronic shelf label is located based on the wireless label ID and the binding relationship between the guide rail ID and the wireless label ID; determining the shelf ID of the commodity shelf where the electronic shelf label is located based on the determined guide rail ID and the binding relationship between the shelf ID and the guide rail ID; and determining a position of the electronic shelf label based on the determined guide rail ID, the determined shelf ID and the wireless label ID.

Abstract: A headset may include a headband; first and second earcups respectively attached to first and second ends of the headband; a first light display unit; a headset receiver configured to receive data from a processor-based device; and a headset control unit. Each of the first and second earcups may include an interior surface and an exterior surface, where the interior surfaces of the first and second earcups may face each other and the exterior surfaces of the first and second earcups may face away from each other. The first light display unit may include a matrix of independently controllable light emitting elements arranged along a boundary of the exterior surface of the first earcup. The headset control unit may be configured to control the light emitting elements of the first light display unit based on the data received by the headset receiver.

Abstract: This application is directed to system, devices, and methods of keyboard key switches that facilitate electrical connections to specialized keycaps. In some embodiments, a serial connection (e.g., USB or any serial protocol) can be created and maintained between a key switch of the inventive subject matter and a specialized keycap that couples with a top portion of the key switch's plunger. Key switches of the inventive subject matter incorporate spring probes to create electrical connections between a printed circuit board disposed below the key switches and the top portions of the key switches' plungers. Thus, different regions of a key switch's plunger can feature different conductive regions, which facilitates creating electrical connections between a PCB and a specialized keycap.