Patents by Inventor Min Liao

Min Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128626
    Abstract: A transmission device includes a daisy chain structure composed of at least three daisy chain units arranged periodically and continuously. Each of the daisy chain units includes first, second and third conductive lines, and first and second conductive pillars. The first and second conductive lines at a first layer extend along a first direction and are discontinuously arranged. The third conductive line at a second layer extends along the first direction and is substantially parallel to the first and second conductive lines. The first conductive pillar extends in a second direction. The second direction is different from the first direction. A first part of the first conductive pillar is connected to the first and third conductive lines. The second conductive pillar extends in the second direction. A first part of the second conductive pillar is connected to the second and third conductive lines.
    Type: Application
    Filed: November 25, 2022
    Publication date: April 18, 2024
    Applicants: UNIMICRON TECHNOLOGY CORP., National Taiwan University
    Inventors: Yu-Kuang WANG, Ruey-Beei Wu, Ching-Sheng Chen, Chun-Jui Huang, Wei-Yu Liao, Chi-Min Chang
  • Publication number: 20240130038
    Abstract: A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.
    Type: Application
    Filed: November 23, 2022
    Publication date: April 18, 2024
    Applicants: UNIMICRON TECHNOLOGY CORP., National Taiwan University
    Inventors: Chin-Hsun WANG, Ruey-Beei Wu, Ching-Sheng Chen, Chun-Jui Hung, Wei-Yu Liao, Chi-Min Chang
  • Publication number: 20240079423
    Abstract: A CIS has a monolithic transfer gate electrode embedded in the semiconductor substrate. In some embodiments, the transfer gate electrode is below the surface. In some embodiments, the top of the transfer gate electrode is nearly even with or below a bottom of a floating diffusion region. In some embodiments, the transfer gate electrode wraps partially around the area of the floating diffusion region. In some embodiments, the transfer gate electrode wraps entirely around the area of the floating diffusion region. Embedding the transfer gate in the substrate reduces surface crowding and allows a scale reduction. The wrapping of the transfer gate electrode around the area of the floating diffusion region increases the area of the transfer gate channel while limiting the area that is occupied by the transfer gate.
    Type: Application
    Filed: January 4, 2023
    Publication date: March 7, 2024
    Inventors: Szu-Ying Chen, Yu-Min Liao
  • Patent number: 11917830
    Abstract: A NAND ferroelectric memory cell with a three-dimensional structure and a preparation method thereof are provided, the ferroelectric memory cell comprises: an oxide insulating layer, a channel layer, a channel buffer layer, a ferroelectric layer, and/or a gate buffer layer, and a gate arranged successively from the inside to the outside. In the memory cell of the present disclosure, the buffer layer has the following effects: 1. It can induce the crystallization of ferroelectric film to form ferroelectric phase; 2. It can reduce adverse effects caused by different crystalline characteristics of the channel layer and the ferroelectric layer, improve the quality and uniformity of the deposited film; 3. It can enhance the interface property of the channel layer, reduce leakage current, and enhance endurance of the device. Therefore, the buffer layer can improve the overall storage property and homogeneity of memory cells with a three-dimensional structure.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: February 27, 2024
    Assignee: XIANGTAN UNIVERSITY
    Inventors: Min Liao, Siwei Dai, Yanwei Huan, Qijun Yang, Zhaotong Liu, Yichun Zhou
  • Patent number: 11898245
    Abstract: Methods and apparatus for a baking chamber for processing a chamber component are provided herein. In some embodiments, a baking chamber includes: an enclosure defining a first chamber, wherein the first chamber comprises: a first chamber body having a first floor and first sidewalls that couple the first floor to a first lid of the first chamber body to define a first interior volume; a first support disposed in the first interior volume; a first gas line disposed in the first interior volume proximate the first lid; a first showerhead disposed between the first gas line and the first support; a first exhaust coupled to the first floor; and a first heater disposed in the first interior volume between the first support and the first floor; and wherein the enclosure includes a door configured to facilitate transferring the chamber component into and out of the enclosure.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 13, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chien-Min Liao, Chi-Feng Liu, Yi Nung Wu, Hsiu Yang, Yixing Lin, Boon Sen Chan, Siamak Salimian
  • Patent number: 11856378
    Abstract: A system with sound adjustment capability is provided. The system includes a head-mounted device, a first loudspeaker and a processor. The first loudspeaker is detachable from the head-mounted device. The processor is configured to detect a plurality of positions and a plurality of orientations of the head-mounted device and the first loudspeaker to determine whether the first loudspeaker is detached from the head-mounted device. The processor is further configured to modify a first audio signal by at least one first filter or at least one second filter to generate a filtered first audio signal. The at least one first filter is used when the first loudspeaker is coupled to the head-mounted device, and the at least one second filter is used when the first loudspeaker is detached from the head-mounted device. The filtered first audio signal is configured to drive the first loudspeaker.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: December 26, 2023
    Assignee: HTC Corporation
    Inventors: Chun-Min Liao, Tsung-Yu Tsai, Chi-Tang Ho
  • Patent number: 11856706
    Abstract: The present disclosure is directed to a system and method to identify and track parts of a semiconductor processing chamber, as well as the status of the parts, and store status information in a centralized location as status changes over time.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: December 26, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Hsui Yang, Yao-Hung Yang, Jeevan Shanbhag, Chien-Min Liao, Earl Hunter, David Ganon, Mariana Luigi, Siamak Salimian, Tom K. Cho, Chun-Chung Chen
  • Patent number: 11824939
    Abstract: This invention discloses an internet-based remote interactive system for sex toys, comprising: an APP server used for storing data of different users and handling different user data requests; a sex toy that can receive signals, in which, the sex toy is configured to produce actions based on the received signals; a wireless mobile device with an APP for sending signals to the sex toy, in which, the APP can send signals to the sex toy to control the sex toy action based on the user-operated virtual control panel, and can also send signals to the sex toy to control the sex toy action based on the control commands received from the APP server.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: November 21, 2023
    Inventors: Junhao Hu, Min Liao
  • Patent number: 11676494
    Abstract: The present invention discloses a vessel collision avoiding system and method based on Artificial Potential Field algorithm, the method comprises the following steps: (S1) obtaining a vessel information, at least one obstacle information and a target information; (S2) establishing an Artificial Potential Field (APF) by the vessel information, the at least one obstacle information and the target information, wherein the Artificial Potential Field comprises an attractive field of the target and a repulsive field of the obstacle; (S3) combining the attractive field and the repulsive field to obtain a first resultant force; (S4) Adding an external force to the Artificial Potential Field based on the vessel information or the obstacle information; (S5) combining the first resultant force and the external force to obtain a second resultant force; and (S6) the vessel sails in the direction of the second resultant force to avoid the obstacle.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: June 13, 2023
    Assignee: SHIP AND OCEAN INDUSTRIES R&D CENTER
    Inventors: Feng-Yeang Chung, Chun-Han Chu, Chi-Min Liao, Mu-Hua Chen, Ling-Ji Mu, Li-Yuan Zhang, Sheng-Wei Huang
  • Publication number: 20230171542
    Abstract: A system with sound adjustment capability is provided. The system includes a head-mounted device, a first loudspeaker and a processor. The first loudspeaker is detachable from the head-mounted device. The processor is configured to detect a plurality of positions and a plurality of orientations of the head-mounted device and the first loudspeaker to determine whether the first loudspeaker is detached from the head-mounted device. The processor is further configured to modify a first audio signal by at least one first filter or at least one second filter to generate a filtered first audio signal. The at least one first filter is used when the first loudspeaker is coupled to the head-mounted device, and the at least one second filter is used when the first loudspeaker is detached from the head-mounted device. The filtered first audio signal is configured to drive the first loudspeaker.
    Type: Application
    Filed: November 26, 2021
    Publication date: June 1, 2023
    Inventors: Chun-Min LIAO, Tsung-Yu TSAI, Chi-Tang HO
  • Publication number: 20230152936
    Abstract: Embodiments of a 3D web interaction system are disclosed that allow a user to select a content item from a browser, displayed in an artificial reality environment, and present a corresponding version of the content item in the artificial reality environment. The 3D web interaction system can create the version of the selected content item in different ways depending on whether the selected content item is associated with 3D content and, if so, the type of the associated 3D content. For example, the 3D web interaction system can create and present different versions of the selected content item depending on whether the selected content item is(a) not associated with 3D content, (b) associated with “environment content,” or (c) associated with one or more 3D models.
    Type: Application
    Filed: January 13, 2023
    Publication date: May 18, 2023
    Inventors: Joshua Jacob INCH, Reilly DONOVAN, Diana Min LIAO, Justin ROGERS
  • Patent number: 11650576
    Abstract: A server for knowledge recommendation for defect review. The server includes a processor electronically coupled to an electronic storage device storing a plurality of knowledge files related to wafer defects. The processor is configured to execute a set of instruction to cause the server to: receive a request for knowledge recommendation for inspecting an inspection image from a defect classification server; search for a knowledge file in the electronic storage device that matches the inspection image; and transmit the search result to the defect classification server.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: May 16, 2023
    Assignee: ASML Netherlands B.V.
    Inventors: Wei Fang, Cho Huak Teh, Robeter Jian, Yi-Ying Wang, Shih-Tsung Chen, Jian-Min Liao, Chuan Li, Zhaohui Guo, Pang-Hsuan Huang, Shao-Wei Lai, Shih-Tsung Hsu
  • Publication number: 20230135737
    Abstract: A model adjustment method, comprises: by a processing device, performing: obtaining inferred data that is inferred using a model, performing a feedback mechanism on the inferred data to obtain a feedback command associated with correctness of the inferred data, adjusting the inferred data according to the feedback command to generate adjusted data, and using the adjusted data as one of a plurality of pieces of training data for retraining the model. The present disclosure further provides a model adjustment system and non-transitory computer readable medium.
    Type: Application
    Filed: November 30, 2021
    Publication date: May 4, 2023
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Shih Yu LU, Sung-min LIAO, Veeresha Ramesha ITTANGIHALA, Shih-Kai LU, Xaver CHEN
  • Patent number: 11556220
    Abstract: Embodiments of a 3D web interaction system are disclosed that allow a user to select a content item from a browser, displayed in an artificial reality environment, and present a corresponding version of the content item in the artificial reality environment. The 3D web interaction system can create the version of the selected content item in different ways depending on whether the selected content item is associated with 3D content and, if so, the type of the associated 3D content. For example, the 3D web interaction system can create and present different versions of the selected content item depending on whether the selected content item is (a) not associated with 3D content, (b) associated with “environment content,” or (c) associated with one or more 3D models.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: January 17, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Joshua Jacob Inch, Reilly Donovan, Diana Min Liao, Justin Rogers
  • Patent number: 11532466
    Abstract: Certain embodiments provide a method and non-transitory computer readable medium having instructions that, when executed by a processor of a processing system, cause the processing system to perform a method for improving operation of a semiconductor processing system. The method of part life estimation generally includes obtaining a chamber part having a first surface portion and second surface portion. A data matrix in the first portion of the chamber part is read. The data matrix has raised features. The first portion of the chamber part is cleaned. Wear on the raised features is evaluated. The part is discarded in response to the wear on the raised feature.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: December 20, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Chien-Min Liao, Yao-Hung Yang, Tom K. Cho, Siamak Salimian, Hsiu Yang, Chun-Chung Chen
  • Patent number: 11502083
    Abstract: A hafnium oxide-based ferroelectric field effect transistor includes a substrate, an isolation region arranged around the substrate; a gate structure including a buffer layer, a floating gate electrode, a hafnium oxide-based ferroelectric film layer, a control gate electrode and a film electrode layer which are sequentially stacked from bottom to top at a middle part of an upper surface of the substrate, a side wall arranged outside the gate structure, a source region and a drain region arranged oppositely at two sides of the gate structure and are formed by extending from an inner side of the isolation region to the middle part of the substrate, a first metal silicide layer formed by extending from the inner side of the isolation region to the side wall, and a second metal silicide layer arranged on an upper surface of the gate structure.
    Type: Grant
    Filed: September 25, 2021
    Date of Patent: November 15, 2022
    Assignee: XIANGTAN UNIVERSITY
    Inventors: Min Liao, Binjian Zeng, Yichun Zhou, Jiajia Liao, Qiangxiang Peng, Yanwei Huan
  • Patent number: 11443825
    Abstract: Provided is a failure mode analysis method for a memory device including the following steps. A wafer is scanned by a test system to generate a failure pattern of the wafer, and a failure count of a single-bit in the wafer is obtained by a test program. A single-bit grouping table is defined according to a word-line layout, a bit-line layout, and an active area layout. A core group and a gap group are formed through grouping in at least one process in a self-aligned double patterning process. Failure counts of single-bits in the core group and the gap group are respectively counted to generate core failure data and gap failure data.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: September 13, 2022
    Assignee: Winbond Electronics Corp.
    Inventors: Yu-Feng Ho, Kuo-Min Liao, Yu-Pei Lin
  • Publication number: 20220275505
    Abstract: Methods and apparatus for a baking chamber for processing a chamber component are provided herein. In some embodiments, a baking chamber includes: an enclosure defining a first chamber, wherein the first chamber comprises: a first chamber body having a first floor and first sidewalls that couple the first floor to a first lid of the first chamber body to define a first interior volume; a first support disposed in the first interior volume; a first gas line disposed in the first interior volume proximate the first lid; a first showerhead disposed between the first gas line and the first support; a first exhaust coupled to the first floor; and a first heater disposed in the first interior volume between the first support and the first floor; and wherein the enclosure includes a door configured to facilitate transferring the chamber component into and out of the enclosure.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 1, 2022
    Inventors: Chien-Min LIAO, Chi-Feng LIU, Yi Nung WU, Hsiu YANG, Yixing LIN, Boon Sen CHAN, Siamak SALIMIAN
  • Publication number: 20220277976
    Abstract: The invention provides a chip carrier, a chip testing module and a chip handling module. The chip carrier for carrying a plurality of chips comprises a main body with an upper surface and a lower surface. The main body has a plurality of air guide holes, and two ends of each air guide hole are respectively exposed on the upper surface and the lower surface. A part of the air guide holes are defined as a first group, and the air guide holes of the first group are connected. The main body is made of conductive material.
    Type: Application
    Filed: February 24, 2022
    Publication date: September 1, 2022
    Inventors: Sheng-Hung WANG, Po-Hsiang CHANG, Zhe-Min LIAO
  • Patent number: 11416979
    Abstract: A defect displaying method is provided in the disclosure. The method comprises acquiring defect group information from an image of a wafer, wherein the defect group information includes a set of correlations between a plurality of defects identified from the image and one or more corresponding assigned defect types and displaying at least some of the plurality of defects according to their corresponding assigned defect types.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: August 16, 2022
    Assignee: ASML Netherlands B.V.
    Inventors: Wei Fang, Cho Huak Teh, Ju Hao Chien, Yi-Ying Wang, Shih-Tsung Chen, Jian-Min Liao, Chuan Li, Zhaohui Guo, Pang-Hsuan Huang, Shao-Wei Lai, Shih-Tsung Hsu