Patents by Inventor Min Lin

Min Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10291405
    Abstract: In response to receiving an unknown first session identifier from a client for a first communication session between the client and a server, a Man in the Middle (MitM) computer requests a second session identifier from the server for a second communication session between the server and the MitM computer. The MitM computer generates a third session identifier for a third communication session between the MitM computer and the client. The MitM computer generates a fourth communication session between the server and the client using a combination of the second communication session and the third communication session. In response to receiving an invalid session identifier from the client for a fifth communication session between the client and the server, the MitM computer transmits an instruction, to the client, to flush a session cache in the client to force a full TLS handshake between the client and the server.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: May 14, 2019
    Assignee: International Business Machines Corporation
    Inventors: Cheng-Ta Lee, Ping Min Lin, Wei-Shiau Suen, Ming-Hsun Wu
  • Patent number: 10291261
    Abstract: Techniques are described for codeword decoding. In an example, a system computes a checksum for a codeword based on the codeword and a parity check matrix. The system compares the checksum to thresholds. Each threshold is associated with a different decoder from a plurality of decoders available on the system. The system selects a decoder from the plurality of decoders. The decoder is selected based on the comparison of the checksum to the thresholds. The system decodes the codeword by using the selected decoder.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: May 14, 2019
    Assignee: SK Hynix Inc.
    Inventors: Johnson Yen, HongChich Chou, Yi-Min Lin
  • Patent number: 10289141
    Abstract: A method for generating a power distribution network (PDN) is provided. A heterogeneous circuit data is input. A plurality of horizontal power lines and a plurality of vertical power lines are determined according to the heterogeneous circuit data. A PDN model of the heterogeneous circuit is determined according to the horizontal power lines and the vertical power lines. Power consumption value is assigned to a plurality of internal nodes of the PDN model of the heterogeneous circuit. The PDN model of the heterogeneous circuit is adjusted to meet a target voltage drop limitation of the heterogeneous circuit data.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: May 14, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chang-Tzu Lin, Ding-Ming Kwai, Tzu-Min Lin
  • Patent number: 10288255
    Abstract: A lens array is disposed on a substrate and includes a plurality of converging lenses. The converging lenses are configured to project light beams and are arranged along a first direction. Two of the light beams respectively converged by adjacent two of the converging lenses at least partially overlap with each other by geometry of the adjacent two converging lenses, a distance between the adjacent two converging lenses, or a combination thereof.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: May 14, 2019
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Tsung-Huan Tsai, Yu-Min Lin
  • Patent number: 10281101
    Abstract: A vehicle lamp includes a condenser lens with a focal plane and an optical axis, a heat-dissipation base disposed at a side of the condenser lens such that the focal plane is disposed between the condenser lens and the heat-dissipation base, a first light source disposed on the heat-dissipation base with a first light-emitting surface facing the focal plane, a reflector disposed on the heat-dissipation base and having a plurality of ellipsoidal surfaces with at least one of the two focal points of each of the ellipsoidal surfaces located on the focal plane, and a second light source disposed on the heat-dissipation base with a substrate and second light-emitting surfaces disposed on the substrate facing the reflector.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: May 7, 2019
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Shih-Kai Lin, Yu-Min Lin
  • Publication number: 20190119429
    Abstract: The present disclosure provides a photopolymer composition and the applications thereof. The photopolymer composition comprises: 5 weight percent to 15 weight percent of gelatin methacrylate (GelMA), 0.1 weight percent to 5 weight percent of silanized biologically active additive, 0.1 weight percent to 5 weight percent of photoinitiator, and 75 weight percent to 95 weight percent of a solvent. Compared to a conventional hydrogel, the hydrogel prepared from the photopolymer composition of the present disclosure has improved compressive strength, mechanical strength and stability. Accordingly, the hydrogel is applicable to biomedical research and tissue repair.
    Type: Application
    Filed: December 1, 2017
    Publication date: April 25, 2019
    Inventors: Yuan-Min LIN, Jiun-Ming SU
  • Patent number: 10270399
    Abstract: A gate bias circuit for a plurality of GaAs amplifier stages is a transistor coupled to a temperature compensation current received from a CMOS control stage. A plurality of pHEMPT amplifier stages are coupled to the gate bias circuit and to a control voltage which switches the amplifier stage. A selectively controlled stage pass transistor enables a current mirror between the gate bias circuit and each stage amplifying transistor. The penultimate pHEMPT amplifier stage is coupled to a CMOS amplifier. A CMOS circuit provides both the temperature compensation current by a proportional to absolute temperature (PTAT) circuit and the control voltage enabling each pHEMPT transistor to receive its input signal in combination with the gate bias voltage.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: April 23, 2019
    Assignee: TUBIS TECHNOLOGY INC
    Inventors: James Wang, Yuh-Min Lin, Kun-You Lin
  • Patent number: 10263537
    Abstract: A power conversion apparatus includes: DC input terminals for inputting a DC voltage; AC output terminals for outputting an AC voltage; a switching element; a first resonant capacitance connected across the switching element; a first LC resonance circuit that has an inductance and a capacitance connected in series and is connected together with the switching element between the AC output terminals; and a second LC resonance circuit connected in series together with the switching element between the DC input terminals. The second LC resonance circuit includes a first connector portion connected to one DC input terminal and a second connector portion connected to the switching element, and has a first current path, which includes an inductance, and a second current path, which includes a series circuit with an inductance and a capacitance, formed between the first connector portion and the second connector portion.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: April 16, 2019
    Assignee: TDK CORPORATION
    Inventors: Min Lin, Ken Matsuura, Hitoshi Kinoshita
  • Patent number: 10254185
    Abstract: A sensor includes a deformable membrane that deflects in response to a stimuli. The sensor further includes a capacitive element coupled to the deformable membrane. The capacitive element is disposed within an enclosed cavity of the sensor. The capacitive element changes capacitance in response to the deformable membrane deflecting. The capacitive element comprises a getter material for collecting gas molecules within the enclosed cavity.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: April 9, 2019
    Assignee: InvenSense, Inc.
    Inventors: Johannes Schumm, Andreas Reinhard, Thomas Kraehenbuehl, Stefan Thiele, Rene Hummel, Chung-Hsien Lin, Wang Shen Su, Tsung Lin Tang, Chia Min Lin
  • Publication number: 20190077780
    Abstract: Provided is a method for preparing an epoxide by halohydrination, the method comprising: (1) halohydrination: adding H2O, a halogen(s) and an olefin compound to a reaction device for reaction to obtain a halohydrin; (2) saponification: saponificating the halohydrin with an alkali metal hydroxide to obtain an epoxide and an alkali metal halide; (3) performing a bipolar membrane electrodialysis of the alkali metal halide to obtain an alkali metal hydroxide and a halogen hydride. Also provided is a method for preparing an epoxide by halohydrination, the method comprising: (1) halohydrination: halohydrinating a halogen hydride, an H2O2 and an olefin compound to obtain a halohydrin; optionally, (2) saponification: saponificating the halohydrin with an alkali metal hydroxide to obtain an epoxide and an alkali metal halide; optionally, (3) performing a bipolar membrane electrodialysis of the alkali metal halide to obtain an alkali metal hydroxide and a halogen hydride.
    Type: Application
    Filed: March 13, 2017
    Publication date: March 14, 2019
    Inventors: Xingtian Shu, Min Lin, Weilin Liao
  • Publication number: 20190066967
    Abstract: Ion generators for ion implanters are provided. The ion generator for an ion implanter includes an ion source arc chamber including an arc chamber housing and a thermal electron emitter coupled to the arc chamber housing. In addition, the thermal electron emitter includes a filament and a cathode, and the cathode has a solid top portion made of a work function modified conductive material including tungsten (W) and a work function modification metal.
    Type: Application
    Filed: August 31, 2017
    Publication date: February 28, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tai-Kun KAO, Tsung-Min LIN, Jen-Chung CHIU, Ren-Dou LEE
  • Patent number: 10218388
    Abstract: Techniques are described for decoding a message. In one example, the techniques include obtaining a first message comprising a plurality of information bits and a plurality of parity bits, decoding the first message using an iterative decoding algorithm to generate a first bit sequence, generating a miscorrection metric based at least on the first bit sequence and one or more reliability values corresponding to one or more bits in the first message, determining whether a miscorrection happened in the decoder by comparing the miscorrection metric with a first threshold, and upon determining that a miscorrection did not happen, outputting the first bit sequence as a decoded message.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: February 26, 2019
    Assignee: SK Hynix Inc.
    Inventors: Yi-Min Lin, Aman Bhatia, Naveen Kumar, Johnson Yen
  • Publication number: 20190051800
    Abstract: A light emitting diode (LED) device and a method of manufacturing the LED device aforementioned are provided. The LED device (400) includes a LED chip (430), an encapsulant (440) and a ring-shape barrier (450?). The LED chip has a first surface and a reflection surface, and the encapsulant covers the LED chip. Wherein the reflection surface (450a) is inclined with respect to a side surface (430b) of the LED chip. A light output angle can be effectively adjusted, and the needs to re-design lenses when market demand changes may be reduced.
    Type: Application
    Filed: November 9, 2016
    Publication date: February 14, 2019
    Applicant: EVERLIGHT ELECTRONICS CO., LTD.
    Inventors: Chih-Min LIN, Tsung-Lin LU, Wei-Tyng YU, Robert YEH, Chung-Chuan HSIEH, Chun-Min LIN
  • Patent number: 10205469
    Abstract: Techniques for reducing the latency for decoding product codewords with minimal hardware architecture changes are described. In an example, a system accesses and decodes a generalized product code (GPC) codeword by using at least one of a plurality of Chase decoding procedures available on the system. A first Chase decoding procedure is configured according to first values for a set of decoding parameters. A second Chase decoding procedure is configured according to second values for the set of decoding parameters. The second values are different from the first values. The first Chase decoding procedure has a smaller latency and a higher bit error rate (BER) relative to the second Chase decoding procedure based on the first values and the second values for the set of decoding parameters.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: February 12, 2019
    Assignee: SK Hynix Inc.
    Inventors: Naveen Kumar, Aman Bhatia, Yi-Min Lin, Fan Zhang
  • Patent number: 10200066
    Abstract: An apparatus for decoding is disclosed. The apparatus includes a memory and a processor coupled to the memory. The processor is configured to obtain a first codeword comprising one or more information bits and one or more parity bits, obtain a first parameter corresponding to a code rate of the first codeword, and decode the first codeword using a multi-rate decoder to generate a decoded codeword. The multi rate decoder performs a code reconstruction procedure on the first codeword to generate a reconstructed codeword, and decodes the reconstructed codeword. The processor is further configured to output the decoded codeword.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: February 5, 2019
    Assignee: SK Hynix Inc.
    Inventors: Yi-Min Lin, Aman Bhatia, Naveen Kumar, Johnson Yen
  • Publication number: 20190029686
    Abstract: A nerve repair conduit configured to be secured on first and second portions of a selected nerve. The nerve repair conduit includes a polymeric body having a proximal end, a distal end, an exterior surface and an interior surface defining an interior lumen. In addition, the nerve conduit includes at least one drug reservoir to hold agent(s) that may, for example, facilitate nerve regeneration. The drugs diffuse from the drug reservoir(s) into the nerve repair conduit through an outlet (e.g., a semipermeable membrane) in proximity to the first and second portions of a selected nerve. The nerve repair conduit may be configured to deliver the agent(s) at a rate having substantially zero-order kinetics and/or at a constant rate over a selected period of time (e.g., at least 1 week).
    Type: Application
    Filed: April 2, 2018
    Publication date: January 31, 2019
    Inventors: Jayant P. Agarwal, Bruce Kent Gale, Himanshu Jayant Sant, Keng-Min Lin
  • Patent number: 10186962
    Abstract: A control circuit according to an embodiment of the present invention is configured to control a switching element of a switching power supply. The control circuit includes a comparator having a first input terminal configured to receive an output voltage of the switching power supply. The comparator has a second input terminal that is connectable to a positive terminal of a reference voltage source. The comparator has an output. The output brings the reference voltage to a first voltage while the output signal takes a first voltage level. The output brings the reference voltage to a second voltage while the output signal takes a second voltage level. The constant voltage source has a positive terminal connected to a negative terminal of the reference voltage source and a ground of the comparator.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: January 22, 2019
    Assignee: TDK CORPORATION
    Inventors: Ken Matsuura, Min Lin
  • Patent number: 10187086
    Abstract: Techniques for reducing the latency for decoding product codewords with minimal hardware architecture changes are described. In an example, multiple decoding procedures are available a system. The system maintains decoding states. Each decoding state corresponds to a constituent codeword of a product codeword and to a decoding procedure. For instance, a BCH decoding state indicates whether the decoding of the respective BCH constituent codeword has previously failed. The decoding of the product codeword depends on the various decoding state. For instance, in a BCH decoding iteration, if a BCH decoding state of a constitutent codeword is set to “failed,” the BCH decoding of that codeword is skipped.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: January 22, 2019
    Assignee: SK Hynix Inc.
    Inventors: Aman Bhatia, Naveen Kumar, Yi-Min Lin, Fan Zhang
  • Publication number: 20180375504
    Abstract: A FET driving circuit includes: inputs into which a DC voltage is inputted; outputs connected to gate and source electrodes of a FET; a switch; a capacitance connected across the switch; and an LC resonance circuit connected in series with the switch across the inputs. A voltage generated across the switch during switching is outputted to drive the FET. The LC resonance circuit has a first connector connected to one input and a second connector connected to the switch, and is configured with a path including an inductance and a path including an inductance and a capacitance. An impedance between the first and second connectors has two resonant frequencies. The impedance has a local maximum at the lower resonant frequency, which is higher than a switching frequency, and a local minimum at the higher resonant frequency, which is around double the switching frequency.
    Type: Application
    Filed: June 25, 2018
    Publication date: December 27, 2018
    Applicant: TDK CORPORATION
    Inventors: Min LIN, Ken MATSUURA
  • Publication number: 20180375503
    Abstract: A FET driving circuit includes: two inputs for inputting a DC voltage; two outputs respectively connected to gate and source electrodes of a FET; a switch; a resonant capacitance connected between both ends of the switch; and an LC resonance circuit connected between the inputs and both ends of the switch. When the two inputs are shorted, frequency characteristics of an impedance of the LC resonance circuit include, in order from a low to a high-frequency side, first to fourth resonant frequencies. The first resonant frequency is higher than a switching frequency of the switch, the second resonant frequency is around double the switching frequency, the fourth resonant frequency is around four times the switching frequency, and the impedance has local maxima at the first resonant frequency and the third resonant frequency and local minima at the second resonant frequency and the fourth resonant frequency.
    Type: Application
    Filed: June 25, 2018
    Publication date: December 27, 2018
    Applicant: TDK CORPORATION
    Inventors: Min LIN, Ken MATSUURA