Patents by Inventor Min Lin

Min Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090324445
    Abstract: A chemical vapor sterilization process is enhanced by concentrating a germicide via exploitation of the difference between the vapor pressures of the germicide and its solvent. A diffusion restriction can be placed into the diffusion path to assist this process and the path then opened to provide rapid diffusion of the thus concentrated germicide. The path through the diffusion restriction can be closed to allow the pressure in a sterilization chamber to be lowered prior to receiving the concentrated germicide.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 31, 2009
    Applicant: Ethicon, Inc.
    Inventors: James P. Kohler, Szu-Min Lin, RICHARD Jed Kendall
  • Publication number: 20090312185
    Abstract: An isolated polypeptide comprising an amino acid sequence that is at least 62% identical to SEQ ID NO:2. The polypeptide, when present in a cell, increases the cell's ability to tolerate glyphosate. Also disclosed are related nucleic acid, antibody, vector, transgenic plant, as well as uses thereof.
    Type: Application
    Filed: May 11, 2007
    Publication date: December 17, 2009
    Applicant: Si Chuan Heben Biotic Engineering Co. Ltd.
    Inventors: Min Lin, Kexuan Tang, Yiping Wang, Jin Wang, Yu Zhu
  • Patent number: 7633601
    Abstract: To avoid the yield of wafers that undergo immersion lithography influencing by delay of post exposure baking (PEB), an operation system adjusts a speed of inputting the wafers to undergo immersion lithography according to a status of wafers that have finished exposure and are waiting for baking. Therefore, the wafers that have finished exposure are transmitted to be baked efficiently and on time.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: December 15, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Yong-Fa Huang, Benjamin Szu-Min Lin, Chun-Chi Yu, Huan-Ting Tseng, Bo-Jou Lu
  • Publication number: 20090276615
    Abstract: A servo device auto-booted upon power supply recovery and a method thereof include a plurality of mainboards, a circuit board, a power supply, a memory unit, an auto-booting unit, and a switching unit. The switching unit and the memory unit storing a basic input/output system (BIOS) are disposed on the circuit board. The auto-booting unit outputs a selection signal when the power supply recovers the supply of power after an abnormal power failure, and then the switching unit transmits the BIOS to each mainboard sequentially according to the selection signal, so as to finish the auto-booting of the entire servo device.
    Type: Application
    Filed: June 25, 2008
    Publication date: November 5, 2009
    Applicant: INVENTEC CORPORATION
    Inventors: Kuo-Wei Huang, E-Min Lin
  • Publication number: 20090267704
    Abstract: A capacitor device is provided. The capacitor device includes at least one capacitor. The capacitor device also includes a first capacitor and a first filter coupling the first capacitor and a conductive region, wherein the first capacitor has a first resonance frequency and the first filter is configured to operate at a first frequency band covering the first resonance frequency.
    Type: Application
    Filed: February 27, 2009
    Publication date: October 29, 2009
    Inventors: Huey-Ru CHANG, Min-Lin Lee, Jiin-Shing Perng, Sheng-Che Hung, Shinn-Juh Lai
  • Patent number: 7608218
    Abstract: A chemical vapor sterilization process is enhanced by flowing a portion of the sterilant vapor through an instrument container using a normal portion of the exhaust process. Preferably, an exhaust conduit which draws a vacuum on a sterilization chamber is oriented so that the container is adjacent an inlet to the conduit.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: October 27, 2009
    Assignee: Ethicon, Inc.
    Inventors: Ben Fryer, Szu Min Lin, Robert Lukasik, Todd Morrison
  • Publication number: 20090263674
    Abstract: An integrated circuit structure includes a substrate and a metallization layer over the substrate. The metallization layer includes a dielectric layer and metal lines in the dielectric layer. The integrated circuit structure further includes a sensing element over the metallization layer. The sensing element may be formed in passivation layers.
    Type: Application
    Filed: April 22, 2008
    Publication date: October 22, 2009
    Inventors: Ke Chun Liu, Kuan-Chieh Huang, Chin-Min Lin, Ken Wen-Chien Fu, Mingo Lin
  • Publication number: 20090263499
    Abstract: Provided is a method of decontaminating an area, and related device. The method comprises releasing a germicidal agent into the area from a germicidal source, controlling the germicidal agent concentration in the area to a predetermined concentration that does not exceed a Permissible Exposure Limit, and contacting microorganisms in the area with the germicidal agent to decontaminate the area. The device comprises a releasing mechanism configured to release a germicidal agent from a germicidal source at a predetermined concentration into the area such that the predetermined concentration of germicidal agent in the area does not exceed a Permissible Exposure Limit.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 22, 2009
    Applicant: Ethicon, Inc.
    Inventors: Robert C. Platt, JR., Szu-Min Lin, Robert G. Lukasik
  • Publication number: 20090253591
    Abstract: The invention is a method for using an avian embryo to identify the neuripotency of a cell population. The invention may be used for applications such as screening for candidate neuripotent cell lines for masterbanking, validation of working cell banks, and identifying agents and conditions capable of inducing neural differentiation in a cell population.
    Type: Application
    Filed: April 3, 2008
    Publication date: October 8, 2009
    Inventors: CHIH-MIN LIN, Alexander Kharazi
  • Patent number: 7596864
    Abstract: A method for soldering a soft wire to a printed circuit board conveniently includes the following step: providing a bracket having a through hole and an enameled wire; fastening the enameled wire to the bracket with the conductive wire crossing over the through hole; providing a printed circuit board formed with conductive pads thereon and setting the printed circuit board onto the bracket with the pad aligned to the through hole so that a portion of the magnet wire crossing the through hole lies on the conductive pad; providing a soldering tool having a thermal contact portion and inserting the thermal contact portion into the through hole to solder the magnet wire to the conductive pad.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: October 6, 2009
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: John Chow, Huan Chen, Chih-Min Lin
  • Publication number: 20090219668
    Abstract: A capacitive device is provided. The capacitive device includes a first electrode and a second electrode below the first electrode and spaced apart from the first electrode, wherein at least one of the first electrode and the second electrode includes a plurality of conductive step sections, the plurality of conductive step sections having different heights. The capacitive device also includes an insulating region between the first electrode and the second electrode; and at least one slot formed on one of the first electrode and the second electrode.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 3, 2009
    Inventors: Chien-Min Hsu, Min-Lin Lee, Shinn-Juh Lai, Huey-Ru Chang, Ray-Fong Hong
  • Publication number: 20090213526
    Abstract: A capacitive module is provided. The capacitive module may include a first capacitor including a first electrode and a second electrode, one of the first electrode and the second electrode being coupled to at least one first conductive via and the other one of the first electrode and the second electrode being coupled to at least one second conductive via. The capacitive module may also include a second capacitor spaced apart from the first capacitor, the second capacitor including a third electrode and a fourth electrode, one of the third electrode and the fourth electrode being coupled to the at least one first conductive via and the other one of the third electrode and the fourth electrode being coupled to the at least one second conductive via.
    Type: Application
    Filed: February 20, 2009
    Publication date: August 27, 2009
    Inventors: Chien-Min Hsu, Min-Lin Lee, Shinn-Juh Lai, Chen-Hsuan Chiu
  • Patent number: 7580590
    Abstract: An optical image system surface resolution calibration method is provided herein, which utilizes a calibration standard and an image sensor device. The surface of the calibration standard is provided with a plurality of interleaving bright lines and dark lines, the calibration standard is disposed in a plane to be measured, and the image sensor device is provided with an imaging means, a memory means, and a logic-arithmetic means, that is used to fetch the image information of the calibration standard and store the image information thus obtained. Meanwhile, the image sensor device is used to select and calculate the linear equations of the bright lines, and finally calculate the magnification factor of the image fetched by the image sensor device through the geometric mathematical means by making use of the slope and intersection distance of the linear equation and the average distance between the adjacent bright lines calculated from the intersection distance.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: August 25, 2009
    Assignee: Chroma Ate Inc.
    Inventors: Yao-Min Lin, Wei-Che Chang, Huang-Chang Chang
  • Publication number: 20090210055
    Abstract: An artificial retina chip module including a signal processing chip, a first polymer bump layer, and a photodiode array chip is provided. The signal processing chip includes a plurality of first pad disposed on a surface thereof. The first polymer bump layer includes a plurality of polymer bumps insulated from one another. Each of the first polymer bumps is composed of a polymer material and a conductive layer coated on the polymer material. Each first polymer bump is embedded into the corresponding first pad and the signal processing chip, wherein one end of the first polymer bump protrudes from the first pad and the other end thereof protrudes from a back surface of the signal processing chip. The photodiode array chip is disposed at one side of the signal processing chip and is electrically connected to the signal processing chip through the first polymer bumps.
    Type: Application
    Filed: September 17, 2008
    Publication date: August 20, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tao-Chih Chang, Min-Lin Lee
  • Patent number: 7576702
    Abstract: An automatic feedback adjustment device for a digital antenna includes a digital antenna unit, a trafficator, a tuner, a demodulator, an antenna direction driver unit, a secondary controller, and a primary controller. The digital antenna unit is a digital video/broadcasting antenna system. The trafficator is connected to the digital antenna unit to retrieve direction data associated with the actual elevation angle and direction. The tuner is connected to the digital antenna unit and the demodulator is connected to the tuner in order to receive and convert a transmission signal from a transmission terminal into the video data and a received-signal quality signal. The antenna direction driver unit is connected to the digital antenna unit in order to drive adjustment of direction and elevation angle of the antenna.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: August 18, 2009
    Assignee: Genesys Logic, Inc.
    Inventors: Hsin-Ching Yin, Wen-Ming Huang, Wen-Fu Tsai, Ching-Chun Huang, Chi-Wei Hsiao, Jin-Min Lin, Chien-Chih Wang
  • Patent number: 7569180
    Abstract: A chemical vapor sterilization process is enhanced by concentrating a germicide via exploitation of the difference between the vapor pressures of the germicide and its solvent. A diffusion restriction can be placed into the diffusion path to assist this process and the path then opened to provide rapid diffusion of the thus concentrated germicide. The path through the diffusion restriction can be closed to allow the pressure in a sterilization chamber to be lowered prior to receiving the concentrated germicide.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: August 4, 2009
    Assignee: Ethicon, Inc.
    Inventors: James P. Kohler, Szu-Min Lin, Richard Jed Kendall
  • Patent number: 7563329
    Abstract: A method for monitoring a cleaning process for a medical instrument, includes the steps of placing the instrument in a cleaning chamber; placing a soil standard in the cleaning chamber; cleaning the instrument and the soil standard with a cleaning solution; and detecting whether soil remains on said soil standard. The soil standard includes two substantially parallel substrates separated with two substantially equal thickness spacers, wherein a gap is formed between the two substrates with soil in the gap.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: July 21, 2009
    Assignee: Ethicon Inc.
    Inventors: Szu-Min Lin, Paul T. Jacobs, Jenn-Hann Wang, Robert C. Platt, Peter C. Zhu
  • Publication number: 20090180236
    Abstract: A stepwise capacitor structure includes at least one stepwise conductive layer. The stepwise capacitor represents a feature of multiple capacitors. When currents flow through the stepwise capacitor, different current paths are presented in between an upper conductor and a bottom conductor of the stepwise capacitor in response to different current frequency; different inductor is induced in each path and decoupled by a stepwise capacitor structure as disclosed herein.
    Type: Application
    Filed: March 25, 2009
    Publication date: July 16, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Min-Lin Lee, Shih-Hsien Wu, Shinn-Juh Lai, Shur-Fen Liu
  • Publication number: 20090180225
    Abstract: An ESD protection structure is provided. A substrate includes a first voltage variable material and has a first surface, a second surface substantially paralleled to the first surface and a via connecting the first and second surfaces. A first metal layer is disposed in the substrate for coupling to a ground terminal. The first voltage variable material is in a conductive state when an ESD event occurs, such that the via is electrically connected with the first metal layer to form a discharge path, and the first voltage variable material is in an isolation state when the ESD event is absent, such that the via is electrically isolated from the first metal layer.
    Type: Application
    Filed: August 13, 2008
    Publication date: July 16, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chi-Liang Pan, Min-Lin Lee, Shinn-Juh Lai, Shih-Hsien Wu, Chen-Hsuan Chiu
  • Patent number: 7561410
    Abstract: A hybrid capacitor is provided which includes a substrate, at least one plate capacitor and at least one through hole capacitor. The substrate has through holes and the plate capacitors are on the substrate. At least one through hole capacitor and at least one plate capacitor are in parallel. The through hole capacitor at least includes an anode layer, a first dielectric layer, a first cathode layer and a second cathode layer. The anode layer is disposed on an inner surface of at least one through hole, and a surface of the anode layer is a porous structure. The first dielectric layer is disposed on the porous structure of the anode layer and covered with the first cathode layer. The first cathode layer is covered with the second cathode layer. A conductivity of the second cathode layer is larger than a conductivity of the first cathode layer.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: July 14, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Min-Lin Lee, Li-Duan Tsai, Shur-Fen Liu, Bang-Hao Wu, Cheng-Liang Cheng