Patents by Inventor Min Lin

Min Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7556767
    Abstract: A method for cleaning and sterilizing a medical device comprises the steps of: placing the device into a container; cleaning the device in the container with a cleaning solution; rinsing the device in the container with a rinse solution; and vaporizing a liquid substance in the container to create a sterilant vapor and contacting the device with the vapor to effect sterilization of the device.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: July 7, 2009
    Assignee: Ethicon, Inc.
    Inventors: Szu-Min Lin, Paul Taylor Jacobs
  • Patent number: 7555224
    Abstract: An all-optical label swapping system and method superimposes a low-speed ASK label on top of a high-speed DC-balanced-line-coded ASK payload. An old ASK label is erased by modulating the combined payload and label signal with the inverse of the received ASK label. This ASK labeling technique requires only low speed external modulators and low speed optical receivers to perform the label swapping mechanism, and does not require sophisticated optical components.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: June 30, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Min Lin, Maria C. Yuang, San-Liang Lee, Winston I. Way
  • Publication number: 20090159322
    Abstract: A through hole capacitor at least including a substrate, an anode layer, a dielectric layer, a first cathode layer, and a second cathode layer is provided. The substrate has a plurality of through holes. The anode layer is disposed on the inner surface of at least one through hole, and the surface of the anode layer is a porous structure. The dielectric layer is disposed on the porous structure of the anode layer. The first cathode layer covers a surface of the dielectric layer. The second cathode layer covers a surface of the first cathode layer, and the conductivity of the second cathode layer is greater than that of the first cathode layer. The through hole capacitor can be used for impedance control, as the cathode layers of the through hole are used for signal transmission.
    Type: Application
    Filed: March 11, 2008
    Publication date: June 25, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Bang-Hao Wu, Li-Duan Tsai, Min-Lin Lee, Cheng-Liang Cheng
  • Publication number: 20090161890
    Abstract: The present invention discloses a Micro-Electro-Mechanical Systems (MEMS) capacitive sensing circuit wherein two input nodes of a fully differential amplifier are separately connected to a MEMS capacitive sensing device and a matching capacitor, which both contain similar capacity value and connect to a bias node, and two resistors separately connect the MEMS capacitive sensing device and the matching capacitor to ground (zero voltage). Thus, the present invention could effectively eliminate the bias noise in the circuit without any discrete capacitor and capable for designer to integrate all circuit devices into an IC.
    Type: Application
    Filed: January 15, 2008
    Publication date: June 25, 2009
    Inventor: Yuh-Min LIN
  • Publication number: 20090161298
    Abstract: A hybrid capacitor is provided which includes a substrate, at least one plate capacitor and at least one through hole capacitor. The substrate has through holes and the plate capacitors are on the substrate. At least one through hole capacitor and at least one plate capacitor are in parallel. The through hole capacitor at least includes an anode layer, a first dielectric layer, a first cathode layer and a second cathode layer. The anode layer is disposed on an inner surface of at least one through hole, and a surface of the anode layer is a porous structure. The first dielectric layer is disposed on the porous structure of the anode layer and covered with the first cathode layer. The first cathode layer is covered with the second cathode layer. A conductivity of the second cathode layer is larger than a conductivity of the first cathode layer.
    Type: Application
    Filed: March 18, 2008
    Publication date: June 25, 2009
    Applicant: Industrial Technology Research Institute
    Inventors: Min-Lin Lee, Li-Duan Tsai, Shur-Fen Liu, Bang-Hao Wu, Cheng-Liang Cheng
  • Publication number: 20090128993
    Abstract: A multi-tier capacitor structure has at least one multi-tier conductive layer. At least one conductive via passes through the multi-tier conductive layer. When currents flow through the conductive via, different current paths are presented in the conductive via in response to different current frequency; in other words, different inductor is induced. Therefore, a single plate capacitor structure has function of hierarchical decoupling capacitor effect.
    Type: Application
    Filed: July 15, 2008
    Publication date: May 21, 2009
    Applicant: Industrial Technology Reaserch Institute
    Inventors: Shih-Hsien Wu, Min-Lin Lee, Shinn-Juh Lai, Shur-Fen Liu
  • Publication number: 20090132757
    Abstract: A storage system for improving efficiency in accessing flash memory and method for the same are disclosed. The present invention provides a cache unit for temporarily storing data prior to writing in the flash memory or reading from the flash memory. In reading process, after data stored in a flash memory is accessed by a host, the cache unit holds the data. Upon subsequent read requests to read the same data, the data is cached accordingly, thereby shortening a preparation time for reading the data from the flash memory. In writing process, a host requests write a series of requests to write data into the flash memory, the data is gathered and is stored in the cache unit until the cache unit is full. A cluster of data in the cache unit is accordingly written into the flash memory, so that a preparation time for writing the data into the flash memory is also shortened.
    Type: Application
    Filed: September 16, 2008
    Publication date: May 21, 2009
    Applicant: GENESYS LOGIC, INC.
    Inventors: Jin-min Lin, Feng-shu Lin
  • Publication number: 20090107717
    Abstract: An electrically conductive structure includes a first conductive structure and a second conductive structure. Each has a conducting section at one end and a coupling section at the other end. The first and second conducting sections are electrically connected to a power and ground contact of an electronic device, respectively. The first and second coupling sections are respectively connected with power and ground layer of a circuit board. The first coupling sections are connected with the first conducting section through first extending sections and the second coupling sections are connected with the second conducting section through second extending sections. At least two coupling sections of the conductive structures are arranged in pairs. The first conductive structure and the second conductive structure are arranged in a staggered array to form two wiring loops having opposite current directions, thereby generating a magnetic flux cancellation effect.
    Type: Application
    Filed: July 29, 2008
    Publication date: April 30, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Min Hsu, Shih-Hsien Wu, Shinn-Juh LAI, Min-Lin LEE
  • Publication number: 20090112042
    Abstract: A decontamination gel is obtained to be spayed on a contaminated material. Places of contaminations of Co, Cs and Sr are shown by the gel. Then the gel is dried up in the air to form a film. Thus, the contaminations are cleaned by removing the film.
    Type: Application
    Filed: October 24, 2007
    Publication date: April 30, 2009
    Applicant: ATOMIC ENERGY COUNCIL - INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: Jen-Chieh Chung, Che-Nan Chen, Kon-Min Lin, Tsong-Yang Wei
  • Publication number: 20090110708
    Abstract: A method and device provide for inactivating microorganisms on tissue exposed through a surgical incision. The method includes the steps of: applying a coating of a solution comprising hydrogen peroxide to the tissue; and force drying the solution on the tissue so as to concentrate the solution on the tissue. The concentrated solution kills microorganisms.
    Type: Application
    Filed: October 30, 2007
    Publication date: April 30, 2009
    Inventors: Robert C. Platt, Szu-Min Lin, Robert Lukasik
  • Publication number: 20090107529
    Abstract: A method and device provide for delivering fluid for cleaning and/or decontamination to a lumen in a medical device. A tube having a plurality of openings therethrough is inserted into the lumen of the medical device the fluid is flowed through the tube, out of the openings and into the lumen.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Inventors: Szu-Min Lin, Robert C. Platt, Peter C. Zhu
  • Publication number: 20090097175
    Abstract: An ESD protection substrate is disclosed. The ESD protection substrate includes a first conductor, a second conductor, a pointed structure, and an ESD protection material. The pointed structure is electrically connected to the first or the second conductor. The ESD protection material is disposed between the first and the second conductors.
    Type: Application
    Filed: March 12, 2008
    Publication date: April 16, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chen-Hsuan Chiu, Min-Lin Lee, Shinn-Juh Lai, Shih-Hsien Wu, Chi-Liang Pan
  • Patent number: 7519983
    Abstract: A method for filtering the SDTV channels in a DVB is provided, including the following steps: using the video frequency ID and center frequency of the SDTV channel of the user's choice to look up a table to obtain at least a remaining video frequency ID different from the video frequency ID of the SDTV channel, while the remaining video frequency ID having the same center frequency as the SDTV channel; configuring a plurality of registers in the controller; and the controller discarding a plurality of DVB packets according to the registers. The controller can be either a PCI_EXPRESS controller or a USB controller.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: April 14, 2009
    Assignee: Genesys Logic, Inc.
    Inventors: Chi-Wei Hsiao, Jin-Min Lin, Wen-Ming Huang
  • Patent number: 7515435
    Abstract: A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: April 7, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Uei-Ming Jow, Chang-Sheng Chen, Chin-Sun Shyu, Min-Lin Lee, Shinn-Juh Lay, Ying-Jiunn Lai
  • Publication number: 20090077410
    Abstract: A method for setting an actual operation frequency of a memory is provided. The method includes the following steps. First, a memory model list is provided for selecting a memory model. Then, an estimation operation frequency of the memory is obtained according to the selected model. Finally, the operation frequency of a front side bus (FSB) is adjusted and cooperated with a frequency transformation ratio to generate the actual operation frequency of the memory according to the estimation operation frequency.
    Type: Application
    Filed: August 25, 2008
    Publication date: March 19, 2009
    Applicant: ASUSTEK COMPUTER INC.
    Inventors: Bing-Min Lin, Chin-Fu Ho, Yu-Sheng Wang, Yen-Ting Chou
  • Publication number: 20090066268
    Abstract: A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.
    Type: Application
    Filed: August 13, 2008
    Publication date: March 12, 2009
    Applicant: ASUSTEK COMPUTER INC.
    Inventors: Bing-Min Lin, Chao-Chung Wu, Chin-Fu Ho
  • Publication number: 20090051469
    Abstract: A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.
    Type: Application
    Filed: October 29, 2008
    Publication date: February 26, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Uei-Ming Jow, Chang-Sheng Chen, Chin-Sun Shyu, Min-Lin Lee, Shinn-Juh Lay, Ying-Jiunn Lai
  • Publication number: 20090050356
    Abstract: A circuit structure is provided. The circuit structure includes a capacitor including a top capacitor electrode; a bottom capacitor electrode parallel to the top capacitor electrode; and an insulating layer between the top and the bottom capacitor electrodes. The insulating layer includes a dielectric rod enclosed by a dielectric material. The dielectric rod has a higher dielectric constant than that of the dielectric material. The circuit structure may be a printed circuit board or packaging substrate, wherein the capacitor is formed between the two layers of the capacitor. Additional dielectric rods may be formed in the insulating layer of the capacitor and spaced apart from the dielectric rods.
    Type: Application
    Filed: August 22, 2007
    Publication date: February 26, 2009
    Inventors: Kuo-Ching "Steven" Hsu, Chien-Min Lin, Tzong-Lin Wu, Guan-Tzong Wu
  • Patent number: 7490314
    Abstract: A user interface is provided that exposes items such as developer tasks, commands, property settings, and other related information to a user. The user interface may be invoked in a number of development interfaces such as, for example, a designer or an editor. The user interface may be either an object bound interface or an action triggered interface. An object bound interface exposes a set of items that are associated with a corresponding object. An action triggered interface exposes a set of items that are associated with a corresponding triggering action. In addition to enumerating developer tasks, the user interface may provide a direct link to other interfaces that facilitate task execution.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: February 10, 2009
    Assignee: Microsoft Corporation
    Inventors: Paul Yuknewicz, Michael Harsh, Simon Calvert, Donna Wallace, Antoine Cote, Fred Balsiger, Nikhil Kothari, Brian Pepin, Jeffrey Chrisope, Graeme Mott, Christopher Dias, Bulusu Krishna Mohan, Andrew Cheng-min Lin, Joseph F. Kubiniec, James Schmelzer, Corrina Barber, Anson M. Horton, Meghan Rae Perez
  • Patent number: 7490025
    Abstract: An integrated circuit (IC) with a self-proofreading function includes a micro control unit (MCU) and a one-time programmable (OTP) memory connected with the MCU. The OTP memory includes an instruction memory region for storing instructions and a parameter memory region for storing standard parameters for proofreading. The MCU computes a measured result according to the standard parameters. The IC can operate without an external memory, therefore, the proofreading procedure using the IC is simplified, and the cost of the terminal product using the IC can be reduced.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: February 10, 2009
    Assignee: De Poan Pneumatic Corp.
    Inventors: Po-Yin Chao, Kuo-Yuan Yuan, Hsiang-Min Lin