Abstract: The present invention relates to an electrolyte solution and a secondary battery including the same. According to the present invention, the present invention has an effect of providing a secondary battery having improved charging efficiency and output due to low discharge resistance and having a long lifespan and excellent high-temperature capacity retention by suppressing gas generation and increase in thickness.

Abstract: The present invention relates to an electrolyte solution and a secondary battery including the same. According to the present invention, the present invention has an effect of providing a secondary battery having improved charging efficiency and output due to low discharge resistance and having a long lifespan and excellent high-temperature capacity retention by suppressing gas generation and increase in thickness.

Abstract: The present invention relates to an electrolyte solution and a secondary battery including the same. According to the present invention, the present invention has an effect of providing a secondary battery having improved charging efficiency and output due to low discharge resistance and having a long lifespan and excellent high-temperature capacity retention by suppressing gas generation and increase in thickness.

Abstract: The present invention relates to an electrolyte solution and a secondary battery including the same. According to the present invention, the present invention has an effect of providing a secondary battery having improved charging efficiency and output due to low discharge resistance and having a long lifespan and excellent high-temperature capacity retention by suppressing gas generation and increase in thickness.

Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a data line and a drain electrode on the gate insulating layer; forming an organic semiconductor layer on the data line, the drain electrode and an exposed portion of the gate insulating layer between the data line and the drain electrodel; forming a protective member fully covering the organic semiconductor layer; forming a passivation layer on the protective layer, the data line, and the drain electrode; forming a contact hole in the passivation layer to expose a portion of the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the contact hole.

Abstract: The present invention disclosed an organic thin film transistor, an organic thin film transistor array substrate and an organic thin film transistor display. The present invention disclosed organic materials which is proper for the application to a large screen display. The presentation also disclosed structures and a method for manufacturing such an organic thin film transistor, the organic thin film transistor array substrate and the organic thin film transistor display.

Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a data line and a drain electrode on the gate insulating layer; forming an organic semiconductor layer on the data line, the drain electrode and an exposed portion of the gate insulating layer between the data line and the drain electrodel; forming a protective member fully covering the organic semiconductor layer; forming a passivation layer on the protective layer, the data line, and the drain electrode; forming a contact hole in the passivation layer to expose a portion of the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the contact hole.

Abstract: A method of manufacturing a thin film transistor array panel is provided, the method including: forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a data line and a drain electrode on the gate insulating layer; forming an organic semiconductor layer on the data line, the drain electrode and an exposed portion of the gate insulating layer between the data line and the drain electrode; forming a protective member fully covering the organic semiconductor layer; forming a passivation layer on the protective layer, the data line, and the drain electrode; forming a contact hole in the passivation layer to expose a portion of the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the contact hole.

Abstract: The present invention disclosed an organic thin film transistor, an organic thin film transistor array substrate and an organic thin film transistor display. The present invention disclosed organic materials which is proper for the application to a large screen display. The presentation also disclosed structures and a method for manufacturing such an organic thin film transistor, the organic thin film transistor array substrate and the organic thin film transistor display.

Abstract: The present invention disclosed an organic thin film transistor, an organic thin film transistor array substrate and an organic thin film transistor display. The present invention disclosed organic materials which is proper for the application to a large screen display. The presentation also disclosed structures and a method for manufacturing such an organic thin film transistor, the organic thin film transistor array substrate and the organic thin film transistor display.

Abstract: An organic thin film transistor array panel is provided, which includes: a substrate; a data line formed on the substrate and including a source electrode; a drain electrode formed on the substrate and separated from the data line; an organic semiconductor disposed on the source electrode and the drain electrode; a gate insulator formed on the organic semiconductor; a gate line including a gate electrode disposed on the gate insulator; a passivation layer formed on the gate line and having a first contact hole on the drain electrode; a pixel electrode connected to the drain electrode through the first contact hole; and an opaque light blocking member disposed under the organic semiconductor.

Abstract: A method of forming an organic semiconductor pattern is provided. A pattern is formed on a first substrate. An adhesive is coated on the pattern to form an adhesive pattern. An organic semiconductor layer is formed on a second substrate. The second substrate is combined with the first substrate to remove a portion of the organic semiconductor layer attached to the pattern from the second substrate to form the organic semiconductor pattern.

Abstract: The present invention provides a thin film transistor comprising: a substrate (110); a gate electrode (124) formed on the substrate; a gate insulating layer (140) covering the substrate and the gate electrode; a source electrode and a drain electrode (173, 175) formed on the gate insulating layer; a semiconductor layer (150) formed on the gate insulating layer, the source electrode and the drain electrode; and a passivation layer (180) covering the semiconductor layer, the source electrode, the drain electrode and the gate insulating layer, wherein at least one of the gate insulating layer and the passivation layer is made of Parylene.

Abstract: An organic thin film transistor array panel is provided, which includes: a substrate; a data line formed on the substrate and including a source electrode; a drain electrode formed on the substrate and separated from the data line; an organic semiconductor disposed on the source electrode and the drain electrode; a gate insulator formed on the organic semiconductor; a gate line including a gate electrode disposed on the gate insulator; a passivation layer formed on the gate line and having a first contact hole on the drain electrode; a pixel electrode connected to the drain electrode through the first contact hole; and an opaque light blocking member disposed under the organic semiconductor.

Abstract: An organic thin film transistor array panel is provided, which includes: a substrate; a data line formed on the substrate and including a source electrode; a drain electrode formed on the substrate and separated from the data line; an organic semiconductor disposed on the source electrode and the drain electrode; a gate insulator formed on the organic semiconductor; a gate line including a gate electrode disposed on the gate insulator; a passivation layer formed on the gate line and having a first contact hole on the drain electrode; a pixel electrode connected to the drain electrode through the first contact hole; and an opaque light blocking member disposed under the organic semiconductor.

Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes: a substrate; a data line disposed on the substrate; an interlayer insulating layer disposed on the data line; a gate line disposed on the interlayer insulating layer and including a gate electrode; a gate insulating layer disposed on the gate line and the interlayer insulating layer, the gate insulating layer and the interlayer insulating film having a contact hole exposing the data line; a first electrode disposed on the gate insulating layer and connected to the data line through the contact hole; a second electrode disposed opposite the first electrode with respect to the gate electrode; an organic semiconductor disposed on the first and the second electrodes and contacting the first and the second electrodes; and a passivation member disposed on the organic semiconductor.

Abstract: A method of forming an organic semiconductor pattern is provided. A pattern is formed on a first substrate. An adhesive is coated on the pattern to form an adhesive pattern. An organic semiconductor layer is formed on a second substrate. The second substrate is combined with the first substrate to remove a portion of the organic semiconductor layer attached to the pattern from the second substrate to form the organic semiconductor pattern.

Abstract: A method for forming a pattern of an organic insulating film by forming an electrode on a substrate, coating an imprintable composition thereon to form an organic insulating film, pressurizing and curing the organic insulating film using a patterned mold to transfer a pattern of the mold to the organic insulating film, and etching a portion of the organic insulating film remaining on the electrode. Since a pattern of an organic insulating film can be formed by simple molding without the use of a photoresist, the overall procedure is simplified and eventually an organic thin film transistor with high charge carrier mobility can be fabricated by all wet processes.

Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes: a substrate; a data line disposed on the substrate; an interlayer insulating layer disposed on the data line; a gate line disposed on the interlayer insulating layer and including a gate electrode; a gate insulating layer disposed on the gate line and the interlayer insulating layer, the gate insulating layer and the interlayer insulating film having a contact hole exposing the data line; a first electrode disposed on the gate insulating layer and connected to the data line through the contact hole; a second electrode disposed opposite the first electrode with respect to the gate electrode; an organic semiconductor disposed on the first and the second electrodes and contacting the first and the second electrodes; and a passivation member disposed on the organic semiconductor.

Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on a substrate; forming a gate insulating layer on the gate line; depositing an ITO layer at a temperature of about 20-35° C.; etching the ITO layer to form a data line and a drain electrode on the gate insulating layer; and forming an organic semiconductor on the data line, the drain electrode, and the gate insulating layer.