Patents by Inventor Min Sik Jang
Min Sik Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240006495Abstract: A semiconductor memory device, and a method of manufacturing the semiconductor memory device, includes a first source layer, a second source layer on the first source layer, a stack on the second source layer, a channel structure passing through the stack and the second source layer, and a common source line passing through the stack and the second source layer. The second source layer includes an air gap and a conductive layer surrounding the air gap.Type: ApplicationFiled: September 15, 2023Publication date: January 4, 2024Applicant: SK hynix Inc.Inventors: Chang Soo LEE, Young Ho YANG, Sung Soon KIM, Hee Soo KIM, Hee Do NA, Min Sik JANG
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Patent number: 11799003Abstract: A semiconductor memory device, and a method of manufacturing the semiconductor memory device, includes a first source layer, a second source layer on the first source layer, a stack on the second source layer, a channel structure passing through the stack and the second source layer, and a common source line passing through the stack and the second source layer. The second source layer includes an air gap and a conductive layer surrounding the air gap.Type: GrantFiled: April 15, 2021Date of Patent: October 24, 2023Assignee: SK hynix Inc.Inventors: Chang Soo Lee, Young Ho Yang, Sung Soon Kim, Hee Soo Kim, Hee Do Na, Min Sik Jang
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Publication number: 20220181455Abstract: A semiconductor memory device, and a method of manufacturing the semiconductor memory device, includes a first source layer, a second source layer on the first source layer, a stack on the second source layer, a channel structure passing through the stack and the second source layer, and a common source line passing through the stack and the second source layer. The second source layer includes an air gap and a conductive layer surrounding the air gap.Type: ApplicationFiled: April 15, 2021Publication date: June 9, 2022Applicant: SK hynix Inc.Inventors: Chang Soo LEE, Young Ho YANG, Sung Soon KIM, Hee Soo KIM, Hee Do NA, Min Sik JANG
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Patent number: 10574089Abstract: Provided are an attractor for PMA wireless charging type wireless power reception module and a manufacturing method thereof, and a wireless power reception module having the same. The attractor for PMA wireless charging type wireless power reception module according to an embodiment of the present invention comprises: a wireless power reception module; and a thin magnetic piece formed of a magnetic material having a saturation magnetic flux density of 0.5 tesla or more such that a change in the voltage value of a hall sensor of a certain value or more can be detected in both an aligned state when a wireless power transmission module is aligned and a non-aligned state when the wireless power reception module is not in line with the wireless power transmission module within a non-alignment region having a certain area including the aligned state.Type: GrantFiled: November 23, 2015Date of Patent: February 25, 2020Assignee: AMOSENSE CO., LTD.Inventors: Chun Gul Lee, Kil Jae Jang, Dong Hoon Lee, Min Sik Jang, Ki Chul Kim, Jong Ho Park
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Patent number: 10477743Abstract: A magnetic field shielding sheet and a wireless power transfer module that includes the same are provided. The magnetic field shielding sheet, according to an exemplary embodiment of the present invention, which is applied to a combo-type antenna unit that includes at least two antennas using different frequency bands of magnetic fields, comprises: a first sheet layer that includes a metal component that shields a first frequency band of a magnetic field and concentrates the magnetic field in a designated direction; a second sheet layer that shields a second frequency band of a magnetic field and concentrates the magnetic field in a designated direction; and a micro-piece separation and oxidation preventing member provided on a side surface of the first sheet layer in order to prevent a micro-piece from being separated from the side surface of the first sheet or to prevent the side surface from being oxidized.Type: GrantFiled: December 29, 2015Date of Patent: November 12, 2019Assignee: AMOSENSE CO., LTDInventors: Kil Jae Jang, Dong Hoon Lee, Min Sik Jang
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Patent number: 10283521Abstract: Disclosed are a semiconductor device and a manufacturing method thereof. The semiconductor device includes source select lines, word lines, drain select lines, and a bit line stacked on a substrate in which a first cell string region and a second cell string region are defined; channel layers and memory layers vertically passing through the source select lines, the word lines, and the drain select lines in each of the first cell string region and the second cell string region; and a common source line vertically passing through the source select lines, the word lines, and the drain select lines at centers of the first cell string region and the second cell string region, and extended to a lower side of the source select lines.Type: GrantFiled: June 23, 2017Date of Patent: May 7, 2019Assignee: SK hynix Inc.Inventor: Min Sik Jang
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Patent number: 10164471Abstract: Provided is a transmission device for a wireless charger. A transmission device for a wireless charger in accordance with exemplary embodiments of the present invention comprises: a plurality of planar coils which transmit a wireless power signal for wireless charging and which are arranged so as to be at least partially overlapped with each other; a shielding sheet which has an attachment surface to which a part or all of the planar coils are fixed by the medium of an adhesive layer, and which shields a magnetic field generated from the planar coils; and a height deviation compensation means which is provided on the attachment surface and which compensates for individual height deviation between each planar coil and the attachment surface.Type: GrantFiled: November 6, 2015Date of Patent: December 25, 2018Assignee: AMOSENSE CO., LTDInventors: Kil Jae Jang, Dong Hoon Lee, Min Sik Jang, Ki Chul Kim, Jong Ho Park
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Publication number: 20180279517Abstract: A magnetic field shielding sheet and a wireless power transfer module that includes the same are provided. The magnetic field shielding sheet, according to an exemplary embodiment of the present invention, which is applied to a combo-type antenna unit that includes at least two antennas using different frequency bands of magnetic fields, comprises: a first sheet layer that includes a metal component that shields a first frequency band of a magnetic field and concentrates the magnetic field in a designated direction; a second sheet layer that shields a second frequency band of a magnetic field and concentrates the magnetic field in a designated direction; and a micro-piece separation and oxidation preventing member provided on a side surface of the first sheet layer in order to prevent a micro-piece from being separated from the side surface of the first sheet or to prevent the side surface from being oxidized.Type: ApplicationFiled: December 29, 2015Publication date: September 27, 2018Applicant: Amosense Co., LtdInventors: Kil Jae JANG, Dong Hoon LEE, Min Sik JANG
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Publication number: 20180269716Abstract: Provided is a transmission device for a wireless charger. A transmission device for a wireless charger in accordance with exemplary embodiments of the present invention comprises: a plurality of planar coils which transmit a wireless power signal for wireless charging and which are arranged so as to be at least partially overlapped with each other; a shielding sheet which has an attachment surface to which a part or all of the planar coils are fixed by the medium of an adhesive layer, and which shields a magnetic field generated from the planar coils; and a height deviation compensation means which is provided on the attachment surface and which compensates for individual height deviation between each planar coil and the attachment surface.Type: ApplicationFiled: November 6, 2015Publication date: September 20, 2018Applicant: Amosense Co., Ltd.Inventors: Kil Jae JANG, Dong Hoon LEE, Min Sik JANG, Ki Chul KIM, Jong Ho PARK
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Publication number: 20170372837Abstract: Provided are an attractor for PMA wireless charging type wireless power reception module and a manufacturing method thereof, and a wireless power reception module having the same. The attractor for PMA wireless charging type wireless power reception module according to an embodiment of the present invention comprises: a wireless power reception module; and a thin magnetic piece formed of a magnetic material having a saturation magnetic flux density of 0.5 tesla or more such that a change in the voltage value of a hall sensor of a certain value or more can be detected in both an aligned state when a wireless power transmission module is aligned and a non-aligned state when the wireless power reception module is not in line with the wireless power transmission module within a non-alignment region having a certain area including the aligned state.Type: ApplicationFiled: November 23, 2015Publication date: December 28, 2017Applicant: AMOSENSE CO., LTD.Inventors: Chun Gul LEE, Kil Jae JANG, Dong Hoon LEE, Min Sik JANG, Ki Chul KIM, Jong Ho PARK
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Publication number: 20170358393Abstract: A wireless charging module is provided. A wireless charging module according to an exemplary embodiment of the present invention comprises at least one wireless charging coil unit fixed to one surface of a shielding sheet, wherein the shielding sheet comprises: a ferrite sheet for shielding a magnetic field generated by a wireless high frequency signal, the ferrite sheet being formed of a plate-shaped member having a certain area; and position maintaining members attached to the upper surface and the lower surface of the ferrite sheet, respectively, such that, even when the ferrite sheet is broken into pieces by an external impact, the positions of the pieces of the broken ferrite sheet are maintained.Type: ApplicationFiled: November 26, 2015Publication date: December 14, 2017Applicant: AMOSENSE CO., LTD.Inventors: Kil Jae JANG, Min Sik JANG, Dong Hoon LEE
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Publication number: 20170287932Abstract: Disclosed are a semiconductor device and a manufacturing method thereof. The semiconductor device includes source select lines, word lines, drain select lines, and a bit line stacked on a substrate in which a first cell string region and a second cell string region are defined; channel layers and memory layers vertically passing through the source select lines, the word lines, and the drain select lines in each of the first cell string region and the second cell string region; and a common source line vertically passing through the source select lines, the word lines, and the drain select lines at centers of the first cell string region and the second cell string region, and extended to a lower side of the source select lines.Type: ApplicationFiled: June 23, 2017Publication date: October 5, 2017Applicant: SK hynix Inc.Inventor: Min Sik JANG
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Patent number: 9711525Abstract: Disclosed are a semiconductor device and a manufacturing method thereof. The semiconductor device includes: source select lines, word lines, drain select lines, and a bit line stacked on a substrate in which a first cell string region and a second cell string region are defined; channel layers and memory layers vertically passing through the source select lines, the word lines, and the drain select lines in each of the first cell string region and the second cell string region; and a common source line vertically passing through the source select lines, the word lines, and the drain select lines at centers of the first cell string region and the second cell string region, and extended to a lower side of the source select lines.Type: GrantFiled: July 6, 2015Date of Patent: July 18, 2017Assignee: SK hynix Inc.Inventor: Min Sik Jang
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Publication number: 20160225754Abstract: Disclosed are a semiconductor device and a manufacturing method thereof. The semiconductor device includes: source select lines, word lines, drain select lines, and a bit line stacked on a substrate in which a first cell string region and a second cell string region are defined; channel layers and memory layers vertically passing through the source select lines, the word lines, and the drain select lines in each of the first cell string region and the second cell string region; and a common source line vertically passing through the source select lines, the word lines, and the drain select lines at centers of the first cell string region and the second cell string region, and extended to a lower side of the source select lines.Type: ApplicationFiled: July 6, 2015Publication date: August 4, 2016Inventor: Min Sik JANG
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Patent number: 8609507Abstract: A semiconductor device includes gates formed over a semiconductor substrate that are spaced apart from one another and each have a stack structure of a tunnel insulation layer, a floating gate, a dielectric layer, a first conductive layer, and a metal silicide layer, a first insulation layer formed along the sidewalls of the gates and a surface of the semiconductor substrate between the gates and configured to have a height lower than the top of the metal silicide layer; and a second insulation layer formed along surfaces of the first insulation layer and surfaces of the metal silicide layer and configured to cover an upper portion of a space between the gates, wherein an air gap is formed between the gates.Type: GrantFiled: May 31, 2011Date of Patent: December 17, 2013Assignee: Hynix Semiconductor Inc.Inventors: Tae Kyung Kim, Min Sik Jang, Sung Deok Kim
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Publication number: 20120280300Abstract: A semiconductor device includes gates formed over a semiconductor substrate that are spaced apart from one another and each have a stack structure of a tunnel insulation layer, a floating gate, a dielectric layer, a first conductive layer, and a metal silicide layer, a first insulation layer formed along the sidewalls of the gates and a surface of the semiconductor substrate between the gates and configured to have a height lower than the top of the metal silicide layer; and a second insulation layer formed along surfaces of the first insulation layer and surfaces of the metal silicide layer and configured to cover an upper portion of a space between the gates, wherein an air gap is formed between the gates.Type: ApplicationFiled: May 31, 2011Publication date: November 8, 2012Inventors: Tae Kyung KIM, Min Sik Jang, Sang Deok Kim
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Publication number: 20120074485Abstract: A nonvolatile memory device comprises a gate insulating layer, a floating gate and a dielectric layer sequentially formed over a semiconductor substrate, a capping layer formed over the dielectric layer, and a control gate formed over the capping layer, wherein the control gate includes nitrogen or carbon as an additive.Type: ApplicationFiled: December 6, 2011Publication date: March 29, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Chul Young Ham, Min Sik Jang, Sang Soo Lee
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Publication number: 20110159674Abstract: A method of manufacturing nonvolatile memory devices comprises forming a plurality of floating gates spaced from each other over a semiconductor substrate, forming a dielectric layer on a surface of the floating gates, forming a capping layer on a surface of the dielectric layer, adding impurities to the capping layer, and forming a control gate over the capping layer containing the impurities.Type: ApplicationFiled: December 17, 2010Publication date: June 30, 2011Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Chul Young Ham, Min Sik Jang, Sang Soo Lee
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Patent number: 7858491Abstract: This invention relates to a method of fabricating a semiconductor device. A P well for a cell junction may be formed by performing an ion implantation process employing a zero tilt condition. Stress caused by collision between a dopant and a Si lattice within a semiconductor substrate may be minimized and, therefore stress remaining within the semiconductor substrate may be minimized. Accordingly, Number Of Program (NOP) fail by disturbance caused by stress remaining within a channel junction may be reduced. Further, a broad doping profile may be formed at the interface of trenches by using BF2 as the dopant when the P well is formed. A fluorine getter layer may be formed on an oxide film of the trench sidewalls and may be used as a boron diffusion barrier. Although a Spin On Dielectric (SOD) insulating layer may be used as an isolation layer, loss of boron (B) may be prevented.Type: GrantFiled: December 21, 2007Date of Patent: December 28, 2010Assignee: Hynix Semiconductor Inc.Inventors: Noh Yeal Kwak, Min Sik Jang
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Patent number: 7838421Abstract: A method of forming metal lines of a semiconductor device, comprising providing a semiconductor substrate in which a plurality of gates and junctions formed between the gates are included in a cell area and a peripheral area; forming an insulating layer over the semiconductor substrate including the gates; forming an etch protection layer over the insulating layer; etching the etch protection layer and the insulating layer, and gap-filling conductive material to form contact plugs contacting the junctions of the cell area; and, forming first metal lines contacting the contact plugs and forming second metal lines contacting the junctions of the peripheral area by etching the etch protection layer and the insulating layer.Type: GrantFiled: June 27, 2008Date of Patent: November 23, 2010Assignee: Hynix Semiconductor Inc.Inventor: Min Sik Jang