Patents by Inventor Min Song

Min Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250253452
    Abstract: A battery assembly of the present disclosure includes: a plurality of battery cells disposed along a preset stacking direction; a cell cover covering a tab portion protruding from one side of at least one battery cell among the plurality of battery cells; an accommodating case accommodating the plurality of battery cells; and a side member extending from the accommodating case toward the plurality of battery cells, wherein at least a part of the cell cover is positioned on the upper portion of the side member and supported by the side member.
    Type: Application
    Filed: January 22, 2025
    Publication date: August 7, 2025
    Inventors: Min Song KANG, Ji Woong KIM, Hae Ryong JEON
  • Publication number: 20250254990
    Abstract: Forksheet stacked field-effect transistor (FET) devices are provided. A forksheet stacked FET device includes a first stacked FET having a first lower FET and a first upper FET. The forksheet stacked FET device includes a second stacked FET that is adjacent the first stacked FET. The second stacked FET has a second lower FET and a second upper FET. The forksheet stacked FET device includes a dielectric wall that is between the first lower FET and the second lower FET. The forksheet stacked FET device includes a middle isolation region having a first portion that is between the first lower FET and the first upper FET, and a second portion that is between the second lower FET and the second upper FET. Related methods of forming stacked FET devices are also provided.
    Type: Application
    Filed: July 3, 2024
    Publication date: August 7, 2025
    Inventors: MYUNG YANG, SEUNG MIN SONG, JAEHONG LEE, KANG-ILL SEO
  • Patent number: 12369377
    Abstract: A semiconductor structure and forming method thereof are provided. A substrate includes a region. A first gate structure and a sacrificial gate structure are recessed in the substrate and disposed in the region. The sacrificial gate structure is adjacent to the first gate structure. A first contact is electrically connected to the first gate structure. A sacrificial gate masking structure is disposed over the sacrificial gate structure. An upper surface of the sacrificial gate structure is entirely covered by the sacrificial gate masking structure.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: July 22, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jhu-Min Song, Chien-Chih Chou, Yu-Chang Jong
  • Patent number: 12362427
    Abstract: The battery module includes: a battery cell stack in which a plurality of battery cells are stacked; a terminal block electrically connected to the battery cell stack; a housing accommodating the battery cell stack in a form of an opened side surface on which the terminal block is formed; an insulating cover covering an opening of the housing, a terminal block through hole exposing the terminal block to the outside being formed on one side of the insulating cover; and a terminal block protective cover accommodating the terminal block exposed to the outside. A portion of the terminal block protective cover being melted in a situation of a certain temperature or higher to cover and insulate an outer surface of the terminal block, thereby insulating the terminal block and preventing the short circuit in a thermal runaway situation.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: July 15, 2025
    Assignee: SK On Co., Ltd.
    Inventors: Jun Hee Jung, Jin Su Han, Jae Il Hwang, Min Song Kang, Bon Seok Ku, Sei Hoon Cho
  • Publication number: 20250227963
    Abstract: Transistors with strained source drain (SDD) structures are suitable for high voltage applications. A gate stack is present upon the substrate that includes a gate dielectric layer and a gate structure upon the gate dielectric layer. A gate spacer is present on the sidewalls of the gate stack. Two lightly doped drain (LDD) regions extend from below the gate stack towards opposite sides of the gate stack. A plurality of strained source and drain (SSD) structures are present within each LDD region. The SSD structures do not extend below the gate spacers. The transistor can be used in high voltage devices and still avoid junction breakdown.
    Type: Application
    Filed: January 10, 2024
    Publication date: July 10, 2025
    Inventors: Yi-Huan Chen, Jhu-Min Song, Chien-Chih Chou, Fei-Yun Chen
  • Patent number: 12356384
    Abstract: A method for providing a V2X service in a next generation wireless access technology (New RAT) comprises: receiving sidelink control information transmitted from other terminal through a sidelink control channel; and receiving sidelink data information transmitted by the other terminal on a sidelink data channel configured in the same slot based on the sidelink control information, wherein the sidelink control information and the sidelink data information are received in N same symbols among 14 symbols constituting the same slot, and the sidelink data information is received in all of the 14 symbols.
    Type: Grant
    Filed: April 25, 2024
    Date of Patent: July 8, 2025
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Sun Woo Kim, Yong Min Song
  • Patent number: 12356658
    Abstract: A semiconductor structure and a method for forming a semiconductor structure are provided. The semiconductor structure includes: a substrate; a gate electrode disposed within the substrate; a gate dielectric layer disposed within the substrate and surrounding the gate electrode; a plurality of first protection structures formed in an array disposed over the gate electrode; and a second protection structure comprising a ring shape from a top-view perspective, and disposed over the gate dielectric layer and at a same level as the plurality of first protection structures from a cross-sectional view.
    Type: Grant
    Filed: May 21, 2024
    Date of Patent: July 8, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yi-Huan Chen, Chien-Chih Chou, Szu-Hsien Liu, Kong-Beng Thei, Huan-Chih Yuan, Jhu-Min Song
  • Patent number: 12356689
    Abstract: Transistor devices are provided. A transistor device includes a substrate and a transistor stack including first and second transistors on the substrate. The first transistor or the second transistor includes a plurality of semiconductor channel layers, a gate on the plurality of semiconductor channel layers, and an insulating spacer that is on a sidewall of the gate and between the plurality of semiconductor channel layers. Moreover, the insulating spacer includes: a first portion on a sidewall of the gate; and a second portion that is spaced apart from the sidewall of the gate by the first portion, and that has a lower dielectric constant than the first portion. Related methods of forming transistor devices are also provided.
    Type: Grant
    Filed: March 21, 2024
    Date of Patent: July 8, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung Yang, Seung Min Song, Kang-Ill Seo
  • Patent number: 12349454
    Abstract: Some embodiments relate to an integrated chip structure. The integrated chip structure includes a substrate having a first device region and a second device region. A plurality of first transistor devices are disposed in the first device region and respectively include epitaxial source/drain regions disposed on opposing sides of a first gate structure. The epitaxial source/drain regions have an epitaxial material. A plurality of second transistor devices are disposed in the second device region and respectively include implanted source/drain regions disposed on opposing sides of a second gate structure. A dummy region includes one or more dummy structures. The one or more dummy structures have dummy epitaxial regions including the epitaxial material.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: July 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chang Jong, Yi-Huan Chen, Chien-Chih Chou, Tsung-Chieh Tsai, Szu-Hsien Liu, Huan-Chih Yuan, Jhu-Min Song
  • Publication number: 20250210614
    Abstract: A semiconductor structure and a method for forming a semiconductor structure are provided. The semiconductor structure includes a substrate having an isolation ring extending in the direction substantially parallel to the surface of the substrate, an active region over the substrate and laterally enclosed by the isolation ring, a seal ring structure over the substrate, the seal ring structure laterally enclosing the active region and including at least a wiring layer and at least a via layer, and an encapsulant material laterally enclosing the seal ring structure.
    Type: Application
    Filed: March 11, 2025
    Publication date: June 26, 2025
    Inventors: FU-JIER FAN, ALEXANDER KALNITSKY, KONG-BENG THEI, JHU-MIN SONG
  • Publication number: 20250210619
    Abstract: The present technology relates to an electrode slurry coating method and apparatus comprising a pressure adjustment member for adjusting the discharge pressure of slurry, and enables electrode slurry to be discharged under constant pressure even when a coated part and an uncoated part are repeatedly formed on a current collector layer.
    Type: Application
    Filed: March 13, 2025
    Publication date: June 26, 2025
    Applicant: LG Energy Solution, Ltd.
    Inventors: Hyeon Min Song, Duk Hyun Ryu
  • Patent number: 12336090
    Abstract: A display device includes: a display panel including a bending area; and a first passivation film and a second passivation film disposed on a first surface of the display panel to be spaced apart from each other. The second passivation film includes a first flat portion and a first stepped portion overlapping the bending area, and a thickness of the first stepped portion is less than a thickness of the first flat portion.
    Type: Grant
    Filed: August 21, 2023
    Date of Patent: June 17, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung Min Song, Ki Nyeng Kang, Seon Beom Ji, Tae Hoon Yang
  • Publication number: 20250189143
    Abstract: A hot water supply system according to the present invention comprises a boiler which heats water supplied from a direct water pipe to provide same to a hot water pipe and a hot water circulation valve which connects or separates the hot water pipe to or from the direct water pipe on the basis of a valve operation temperature, wherein a preheating time may be learned on the basis of a flow rate of water circulated through the hot water pipe, the hot water circulation valve, the direct water pipe, and the boiler when a preheating operation is performed, and a malfunction of the hot water circulation valve can be determined through flow rate detection without a separate device.
    Type: Application
    Filed: December 30, 2022
    Publication date: June 12, 2025
    Applicant: KYUNGDONG NAVIEN CO., LTD.
    Inventors: Nam Soo DO, Si Hwan KIM, Chang Heoi HEO, Yong Min SONG
  • Publication number: 20250178969
    Abstract: Provided is a vanadium carbide containing an oxygen content of 4,000 ppm or less and a carbon content of less than 15 wt %, where a crystalline system of the vanadium carbide exhibits a combination of a trigonal system and a cubic system, which facilitates the process for manufacturing MAX and MXene excluding the expensive vanadium metal.
    Type: Application
    Filed: November 27, 2024
    Publication date: June 5, 2025
    Applicant: Korea Institute Of Geoscience And Mineral Resources
    Inventors: Ki-Min ROH, Han-Jung KWON, Sun-Kyung KIM, Tae-Jun PARK, Jae-Min SONG, Do-Yeon LEE
  • Publication number: 20250171371
    Abstract: A method of preparing a high-performance green building material based on combustion flue gas carbon dioxide mineralization, including: calculating a raw material ratio; taking each industrial solid waste material to obtain a solid powder; pouring the solid powder, dihydrate gypsum and gel material into a granulator, mixing uniformly, and then taking a part of the mixture, and then stirring the remaining mixture with deionized water sprayed until spherical kernels are formed, uniformly adding the previously-taken part of mixture to prepare an aggregate; performing hydration reaction on the aggregate; drying the hydrated aggregate to prepare spherical ceramic granules; placing the ceramic granules into a reaction kettle and introducing a combustion flue gas containing CO2 for mineralization reaction, and taking out reacted ceramic granules and putting into drying oven for drying to prepare a cold-bonded lightweight aggregate; supplementing water to the lightweight aggregate to perform hydration reaction and ob
    Type: Application
    Filed: November 30, 2023
    Publication date: May 29, 2025
    Applicant: SOUTHEAST UNIVERSITY
    Inventors: Min SONG, Yue HU, Jiahao LAI, Lei YU
  • Publication number: 20250143077
    Abstract: A display panel includes a substrate, light emitting elements in a display area of the substrate, and configured to emit light, an organic encapsulation layer on the light emitting elements, a first dam in a non-display area of the substrate, and organic patterns spaced apart from each other outside the first dam in the non-display area of the substrate, and including a first organic pattern and a second organic pattern adjacent to each other and having a gap therebetween.
    Type: Application
    Filed: December 27, 2024
    Publication date: May 1, 2025
    Inventors: Chang Min SONG, Kyung Min PARK, Dong Yoon SO, Young Dae YI, Jae Ho CHOI
  • Publication number: 20250133801
    Abstract: Transistor devices are provided. A transistor device includes a substrate and a transistor stack including first and second transistors on the substrate. The first transistor or the second transistor includes a plurality of semiconductor channel layers, a gate on the plurality of semiconductor channel layers, and an insulating spacer that is on a sidewall of the gate and between the plurality of semiconductor channel layers. Moreover, the insulating spacer includes: a first portion on a sidewall of the gate; and a second portion that is spaced apart from the sidewall of the gate by the first portion, and that has a lower dielectric constant than the first portion. Related methods of forming transistor devices are also provided.
    Type: Application
    Filed: March 21, 2024
    Publication date: April 24, 2025
    Inventors: MYUNG YANG, SEUNG MIN SONG, KANG-ILL SEO
  • Patent number: 12278358
    Abstract: The present technology relates to an electrode slurry coating method and apparatus comprising a pressure adjustment member for adjusting the discharge pressure of slurry, and enables electrode slurry to be discharged under constant pressure even when a coated part and an uncoated part are repeatedly formed on a current collector layer.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 15, 2025
    Assignee: LG Energy Solution, Ltd.
    Inventors: Hyeon Min Song, Duk Hyun Ryu
  • Patent number: 12272686
    Abstract: A semiconductor structure and a method for forming a semiconductor structure are provided. The semiconductor structure includes a substrate having an isolation ring extending in the direction substantially parallel to the surface of the substrate, an active region over the substrate and laterally enclosed by the isolation ring, a seal ring structure over the substrate, the seal ring structure laterally enclosing the active region and including at least a wiring layer and at least a via layer, and an encapsulant material laterally enclosing the seal ring structure.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: April 8, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Fu-Jier Fan, Alexander Kalnitsky, Kong-Beng Thei, Jhu-Min Song
  • Publication number: 20250103629
    Abstract: Provided is a method for analyzing technology including an information collection step of designing a metaframe structure for keywords to be analyzed, deriving a technology structure based on the metaframe structure using a generative AI model, generating search keywords based on the derived technology structure, and searching and obtaining a plurality of documents based on the search keywords; and a technology classification step of refining the plurality of documents according to a similarity between the documents, performing preprocessing to utilize contents of the plurality of documents, and then performing detailed technology classification based on results obtained by performing content-based clustering, and a device for processing the method.
    Type: Application
    Filed: March 7, 2024
    Publication date: March 27, 2025
    Inventors: Byeong Ki Jeong, Kyung Min Song, Ky Sang Kwon, Seung Joon Cha, Dong Ha Kim, Hyun Han Kim, Jae Hyeong An, Ui Won Cheong