Abstract: A data processing system may be configured to include a memory device, a controller configured to access the memory device when a host requests offload processing of an application, and process the application, and a sharing memory management component within the controller and configured to: set controller owning rights of access to a target region of the memory device in response to the host stores, in the target region, data used for the requested offload processing of the application; and set the controller owning rights of access or the host owning rights of access to the target region based on a processing state of the application.

Abstract: An apparatus for supplying food ingredients according to the present disclosure includes a food ingredient lifting part configured to separate and move upward a food ingredient stack from a food ingredient cassette on which food ingredients including a plurality of stacked food ingredients are seated, a food ingredient separation part configured to suck and move upward a single sheet of a food ingredient from the food ingredient stack moved upward by the food ingredient lifting part, and a horizontal movement part configured to transfer forward the single sheet of the food ingredient moved upward by the food ingredient separation part.

Abstract: A system for manufacturing edible food products according to the present disclosure includes a first food ingredient supply apparatus configured to separate a single sheet of a first food ingredient from a first food ingredient stack including a plurality of stacked first food ingredients and supply the single sheet of first food ingredient, a second food ingredient supply apparatus configured to separate a single sheet of a second food ingredient from a second food ingredient stack including a plurality of stacked second food ingredients and supply the single sheet of second food ingredient, and a pressing device configured to form an edible food product by pressing a semi-finished product formed by seating the supplied single sheet of the first food ingredient on the supplied single sheet of the second food ingredient.

Abstract: A cutting apparatus according to the present disclosure includes a cutting roller including a cutting body having a cylindrical shape and configured to rotate about an axis defined in a leftward/rightward direction, and cutting blades protruding outward in a radial direction of the cutting body further than a surface of the cutting body to cut an edible food product provided in a forward/rearward direction, and a cutting base part disposed at a position facing the cutting roller based on the edible food product to support the edible food product to be cut by the cutting roller.

Abstract: A memory device includes a memory cell array and a peripheral circuit. The memory cell array includes a plurality of memory regions each identified by a row address and a column address. The peripheral circuit accesses the memory cell array by performing, based on an address, a burst length and a burst address gap provided from a memory controller, a burst operation supporting a variable burst address gap. The burst address gap is a numerical difference between adjacent column addresses, on which the burst operation is to be performed.

Abstract: A memory device includes a memory cell array and a peripheral circuit. The memory cell array includes a plurality of memory regions each identified by a row address and a column address. The peripheral circuit accesses the memory cell array by performing, based on an address, a burst length and a burst address gap provided from a memory controller, a burst operation supporting a variable burst address gap. The burst address gap is a numerical difference between adjacent column addresses, on which the burst operation is to be performed.

Abstract: A data bus inversion (DBI) circuit of a memory device includes a first processing component configured to generate first combination data by combining read data read from a memory cell region and previous data previously outputted from a data line, and generate second combination data by selectively inverting the first combination data depending on a result of comparing the first combination data and the previous data; and a second processing component configured to generate data to be outputted from the data line, by combining the second combination data and the previous data, wherein the second processing component generates bits of unnecessary bit positions in the data to be the same as bits of the unnecessary bit positions in the previous data.

Abstract: A data processing system may be configured to include a memory device, a controller configured to access the memory device when a host requests offload processing of an application, and process the application, and a sharing memory management component within the controller and configured to: set controller owning rights of access to a target region of the memory device in response to the host stores, in the target region, data used for the requested offload processing of the application; and set the controller owning rights of access or the host owning rights of access to the target region based on a processing state of the application.

Abstract: A memory device includes a memory cell array and a peripheral circuit. The memory cell array includes a plurality of memory regions each identified by a row address and a column address. The peripheral circuit accesses the memory cell array by performing, based on an address, a burst length and a burst address gap provided from a memory controller, a burst operation supporting a variable burst address gap. The burst address gap is a numerical difference between adjacent column addresses, on which the burst operation is to be performed.

Abstract: A data processing system may be configured to include a memory device, a controller configured to access the memory device when a host requests offload processing of an application, and process the application, and a sharing memory management component within the controller and configured to: set controller owning rights of access to a target region of the memory device in response to the host stores, in the target region, data used for the requested offload processing of the application; and set the controller owning rights of access or the host owning rights of access to the target region based on a processing state of the application.

Abstract: A data bus inversion (DBI) circuit of a memory device includes a first processing component configured to generate first combination data by combining read data read from a memory cell region and previous data previously outputted from a data line, and generate second combination data by selectively inverting the first combination data depending on a result of comparing the first combination data and the previous data; and a second processing component configured to generate data to be outputted from the data line, by combining the second combination data and the previous data, wherein the second processing component generates bits of unnecessary bit positions in the data to be the same as bits of the unnecessary bit positions in the previous data.

Abstract: The present disclosure relates to a memory system and an operating method thereof. The memory system may include a shared memory device to store data, a sharing manager to store operation policy information and to autonomously generate a first internal command by using the operation policy information during an auto mode started in response to receiving an auto mode start command from a host, and a memory controller to generate a second internal command for controlling the shared memory device in response to the first internal command.

Abstract: A memory system includes a memory group including a plurality of memory devices having two or more different types; and a controller configured to control data input and output for the memory group, wherein the controller includes a scrubbing controller configured to collect health information to which a deterioration degree for each of the plurality of memory devices is reflected and determine a scrubbing interval for each of the plurality of memory devices based on the health information, the scrubbing interval being reduced in proportion to the deterioration degree.

Abstract: A data processing system may be configured to include a memory device, a controller configured to access the memory device when a host requests offload processing of an application, and process the application, and a sharing memory management component within the controller and configured to: set controller owning rights of access to a target region of the memory device in response to the host stores, in the target region, data used for the requested offload processing of the application; and set the controller owning rights of access or the host owning rights of access to the target region based on a processing state of the application.

Abstract: A data processing system may include a memory apparatus and a controller configured to control the memory apparatus. The memory apparatus includes a plurality of pages and is accessible in units of the pages. The controller may include a mode control component configured to generate an activation mode control signal for setting the memory apparatus in a partial page activation mode based on a type of a processing task requested by a host and address information requested to be accessed, and wherein less than all of a page of the memory apparatus being accessed is activated when the memory apparatus is in the partial page activation mode.

Abstract: A memory system includes a memory group including a plurality of memory devices having two or more different types; and a controller configured to control data input and output for the memory group, wherein the controller includes a scrubbing controller configured to collect health information to which a deterioration degree for each of the plurality of memory devices is reflected and determine a scrubbing interval for each of the plurality of memory devices based on the health information, the scrubbing interval being reduced in proportion to the deterioration degree.

Abstract: A data processing system may include a memory module composed of a plurality of memory banks including a plurality of pages; and a controller configured to control the memory module. The controller is configured to receive a type of an application of an operation to be offloaded and performed and a storage address of a program code of the application, to execute the program code, to store data generated as a result of the execution in the memory module, and to control, based on the type of the application, whether to refresh the memory module, a refresh cycle of the memory module, or both.

Abstract: A data processing system may include a data processing group including a plurality of memory devices and a system controller configured to control a data input and output for the data processing group. The system controller may be configured to include a power management device configured to configure at least one memory group by grouping the plurality of memory devices based on a preset criterion and to determine a power mode of each of the memory groups based on whether a host device accesses each of the memory groups and an access interval.

Abstract: The present disclosure relates to a memory system and an operating method thereof. The memory system may include a shared memory device to store data, a sharing manager to store operation policy information and to autonomously generate a first internal command by using the operation policy information during an auto mode started in response to receiving an auto mode start command from a host, and a memory controller to generate a second internal command for controlling the shared memory device in response to the first internal command.

Abstract: The present disclosure relates to a memory system and an operating method thereof. The memory system may include a shared memory device to store data, a sharing manager to store operation policy information and to autonomously generate a first internal command by using the operation policy information during an auto mode started in response to receiving an auto mode start command from a host, and a memory controller to generate a second internal command for controlling the shared memory device in response to the first internal command.