Patents by Inventor Min Tu

Min Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9147799
    Abstract: An LED epitaxial structure includes a substrate, a buffer layer and an epitaxial layer. The buffer layer is grown on a top surface of the substrate, and the epitaxial layer is formed on a surface of the buffer layer. The epitaxial layer has a first n-type epitaxial layer and a second n-type epitaxial layer. The first n-type epitaxial layer is formed between the buffer layer and the second n-type epitaxial layer. The first n-type epitaxial layer has a plurality of irregular holes therein. The first n-type epitaxial layer has a doping concentration which varies along a thickness direction of the first n-type epitaxial layer.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: September 29, 2015
    Assignee: ShenZhen Treasure City Technology Co., LTD.
    Inventors: Po-Min Tu, Shih-Cheng Huang
  • Patent number: 9130087
    Abstract: A light emitting diode includes a substrate, an un-doped GaN layer, a plurality of carbon nanotubes, an N-type GaN layer, an active layer formed on the N-type GaN layer, and a P-type GaN layer formed on the active layer. The substrate includes a first surface and a second surface opposite and parallel to the first surface. A plurality of convexes is formed on the first surface of the substrate. The un-doped GaN layer is formed on the first surface of the substrate. The plurality of carbon nanotubes is formed on an upper surface of the un-doped GaN layer. The plurality of carbon nanotubes is spaced from each other to expose a portion of the upper surface of the un-doped GaN layer. The N-type GaN layer is formed on the exposed portion of the upper surface of the un-doped GaN layer and covering the carbon nanotubes therein.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: September 8, 2015
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Ya-Wen Lin, Ching-Hsueh Chiu, Po-Min Tu, Shih-Cheng Huang
  • Patent number: 9105763
    Abstract: A light emitting diode (LED) chip includes an N-type semiconductor layer, a compensation layer arranged on the N-type semiconductor layer, an active layer arranged on the compensation layer; and a P-type semiconductor layer arranged on the active layer. During growth of the compensation layer, atoms of an element (i.e., Al) of the compensation layer move to fill epitaxial defects in the N-type semiconductor layer, wherein the epitaxial defects are formed due to lattice mismatch when growing the N-type semiconductor. A method for manufacturing the chip is also disclosed. The compensation layer is made of a compound having a composition of AlxGa1-xN.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: August 11, 2015
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Ching-Hsueh Chiu, Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang
  • Patent number: 9082934
    Abstract: A semiconductor optoelectronic structure with increased light extraction efficiency, includes a substrate; a buffer layer is formed on the substrate and includes a pattern having plural grooves formed adjacent to the substrate; a semiconductor layer is formed on the buffer layer and includes an n-type conductive layer formed on the buffer layer, an active layer formed on the n-type conductive layer, and a p-type conductive layer formed on the active layer; a transparent electrically conductive layer is formed on the semiconductor layer; a p-type electrode is formed on the transparent electrically conductive layer; and an n-type electrode is formed on the n-type conductive layer.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: July 14, 2015
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Peng-Yi Wu, Wen-Yu Lin, Chih-Pang Ma, Tzu-Chien Hong, Chia-Hui Shen
  • Patent number: 9070829
    Abstract: An LED package includes a substrate, a buffer layer formed on the substrate, an epitaxial structure formed on the buffer layer, and a plurality of carbon nanotube bundles formed in the epitaxial structure.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: June 30, 2015
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Ya-Wen Lin, Ching-Hsueh Chiu, Po-Min Tu, Shih-Cheng Huang
  • Patent number: 9044120
    Abstract: A spice grinder is revealed. The spice grinder includes a base connected to a bottom of a container body, an inner grinding member, and an outer grinding member arranged between the container body and the base. The inner grinding member includes a plurality of grinding blades. Each grinding blade has an insertion hole on a center thereof. A rod of a fixing shaft is inserted through the insertion hole of each grinding blade. Thus a first fixing block on one end of the fixing shaft and a second fixing block on other end thereof are against a top and a bottom of the inner grinding member respectively. While in use, the container body and the base are rotated to drive the inner and the outer grinding members. Thus granular spices are ground gradually by the grinding blades. Therefore the granular spices are broken into fine grains precisely.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: June 2, 2015
    Inventor: Hsieh-Min Tu
  • Patent number: 9040328
    Abstract: A manufacturing method for an LED includes providing a substrate having a buffer layer and a first N-type epitaxial layer, forming a blocking layer on the first N-type epitaxial layer, and etching the blocking layer to form patterned grooves penetrating the blocking layer to the first N-type epitaxial layer. A second N-type epitaxial layer is then formed on the blocking layer to contact the first N-type epitaxial layer; a light emitting layer, a P-type epitaxial layer and a conductive layer are thereafter disposed on the second N-type epitaxial layer; an N-type electrode is formed to electrically connect with the first N-type epitaxial layer, and a P-type electrode is formed on the conductive layer. The N-type electrode is disposed on the blocking layer and separated from the second N-type epitaxial layer and has a portion extending into the patterned grooves to contact the first N-type epitaxial layer.
    Type: Grant
    Filed: May 4, 2014
    Date of Patent: May 26, 2015
    Assignee: Zhongshan Innocloud Intellectual Property Services Co., Ltd.
    Inventors: Ya-Wen Lin, Shih-Cheng Huang, Po-Min Tu, Chia-Hung Huang, Shun-Kuei Yang
  • Patent number: 9029831
    Abstract: An exemplary light emitting diode includes a substrate and a first undoped gallium nitride (GaN) layer formed on the substrate. The first undoped GaN layer defines a groove in an upper surface thereof. A distributed Bragg reflector is formed in the groove of the first undoped GaN layer. The distributed Bragg reflector includes a plurality of second undoped GaN layers and a plurality of air gaps alternately stacked one on the other. An n-type GaN layer, an active layer and a p-type GaN layer are formed on the distributed Bragg reflector and the first undoped GaN layer. A p-type electrode and an n-type electrode are electrically connected with the p-type GaN layer and the n-type GaN layer, respectively. A method for manufacturing plural such light emitting diodes is also provided.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: May 12, 2015
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Ching-Hsueh Chiu, Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang
  • Publication number: 20150115218
    Abstract: An optoelectronic module includes a substrate, an LED and a laser LED formed on the substrate, simultaneously. A method for manufacturing an optoelectronic module includes following steps: providing a sapphire substrate, and forming two adoped GaN layers, an N-type GaN layer, an active layer and a P-type GaN layer on the sapphire substrate in sequence; providing a substrate and forming a metallic adhering layer on the substrate; forming an ohmic contact layer and a reflecting layer on the P-type GaN layer in series; arranging the reflecting layer on the adhering layer; stripping the sapphire substrate and the two doped GaN layers from the N-type GaN layer to form a semiconductor structure; etching a top end of the semiconductor structure to divide the semiconductor structure into a laser LED region and an LED region; forming two N-type electrodes on the LED region and an LED region, respectively.
    Type: Application
    Filed: September 10, 2014
    Publication date: April 30, 2015
    Inventors: CHING-HSUEH CHIU, YA-WEN LIN, PO-MIN TU, SHIH-CHENG HUANG
  • Patent number: 9000464
    Abstract: A semiconductor structure includes a temporary substrate; a first semiconductor layer positioned on the temporary substrate; a dielectric layer comprising a plurality of patterned nano-scaled protrusions disposed on the first semiconductor layer; a dielectric layer surrounding the plurality of patterned nano-scaled protrusions and disposed on the first semiconductor layer; and a second semiconductor layer positioned on the dielectric layer, wherein the top surfaces of the patterned nano-scaled protrusions are in contact with the bottom of the second semiconductor layer. An etching process is performed on the semiconductor structure to separate the first semiconductor layer and the second semiconductor layer, in order to detach the temporary substrate from the second semiconductor layer and transfer the second semiconductor layer to a permanent substrate.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: April 7, 2015
    Assignee: Design Express Limited
    Inventors: Chun-Yen Chang, Po-Min Tu, Jet-Rung Chang
  • Patent number: 9000445
    Abstract: An exemplary light emitting diode includes a substrate and a first undoped GaN layer formed on the substrate. The first undoped GaN layer has ion implanted areas on an upper surface thereof. A plurality of second undoped GaN layers is formed on the first undoped GaN layer. Each of the second undoped GaN layers is island shaped and partly covers at least one corresponding ion implanted area. A Bragg reflective layer is formed on the second undoped GaN layer and on portions of upper surfaces of the ion implanted areas not covered by the second undoped GaN layers. An n-type GaN layer, an active layer and a p-type GaN layer are formed on an upper surface of the Bragg reflective layer in that sequence. A method for manufacturing the light emitting diode is also provided.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: April 7, 2015
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Ching-Hsueh Chiu, Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang
  • Patent number: 8987025
    Abstract: A manufacturing method for an LED (light emitting diode) includes following steps: providing a substrate; disposing a transitional layer on the substrate, the transitional layer comprising a planar area with a flat top surface and a patterned area with a rugged top surface; coating an aluminum layer on the transitional layer; using a nitriding process on the aluminum layer to form an AlN material on the transitional layer; disposing an epitaxial layer on the transitional layer and covering the AlN material, the epitaxial layer contacting the planar area and the patterned area of the transitional layer, a plurality of gaps being defined between the epitaxial layer and the slugs of the second part of the AlN material in the patterned area of the transitional layer.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: March 24, 2015
    Assignee: Zhongshan Innocloud Intellectual Property Services Co., Ltd.
    Inventors: Chia-Hung Huang, Shih-Cheng Huang, Po-Min Tu, Ya-Wen Lin, Shun-Kuei Yang
  • Publication number: 20150069323
    Abstract: A single photon source die includes a first semiconductor layer, a plurality of columnar structures formed on the first semiconductor layer, a second semiconductor layer formed on the columnar structures. Each columnar structure includes a bottom layer, a single photon point layer and a connecting layer. The single photon point layer includes a plurality of single photon points.
    Type: Application
    Filed: September 9, 2014
    Publication date: March 12, 2015
    Inventors: CHING-HSUEH CHIU, YA-WEN LIN, PO-MIN TU, SHIH-CHENG HUANG
  • Publication number: 20150054012
    Abstract: An LED die includes a substrate, a first buffer layer, a second buffer layer, a plurality of nanospheres, a first semiconductor layer, an active layer and a second semiconductor layer. The first buffer layer, the second buffer layer, the first semiconductor layer, the active layer and the second semiconductor layer are formed successively on the substrate. The substrate has a plurality of protrusions on a surface thereof. The nanospheres are located on the protrusions and covered by the second buffer layer and located in the second buffer layer. The present disclosure also provides a method of manufacturing an LED die.
    Type: Application
    Filed: August 22, 2014
    Publication date: February 26, 2015
    Inventors: CHING-HSUEH CHIU, YA-WEN LIN, PO-MIN TU, SHIH-CHENG HUANG
  • Publication number: 20150048302
    Abstract: A light emitting diode includes a substrate, an un-doped GaN layer, a plurality of carbon nanotubes, an N-type GaN layer, an active layer formed on the N-type GaN layer, and a P-type GaN layer formed on the active layer. The substrate includes a first surface and a second surface opposite and parallel to the first surface. A plurality of convexes is formed on the first surface of the substrate. The un-doped GaN layer is formed on the first surface of the substrate. The plurality of carbon nanotubes is formed on an upper surface of the un-doped GaN layer. The plurality of carbon nanotubes is spaced from each other to expose a portion of the upper surface of the un-doped GaN layer. The N-type GaN layer is formed on the exposed portion of the upper surface of the un-doped GaN layer and covering the carbon nanotubes therein.
    Type: Application
    Filed: March 20, 2014
    Publication date: February 19, 2015
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: YA-WEN LIN, CHING-HSUEH CHIU, PO-MIN TU, SHIH-CHENG HUANG
  • Publication number: 20150041823
    Abstract: An LED die includes a substrate, a first buffer layer, a second buffer layer, a plurality of nanospheres, a first semiconductor layer, an active layer and a second semiconductor layer. The first buffer layer, the second buffer layer, the first semiconductor layer, the active layer and the second semiconductor layer are formed successively on the substrate. The substrate has a plurality of protrusions formed on a surface thereof. The nanospheres are located on the first buffer layer formed on the protrusions and covered by the second buffer layer. The present disclosure also provides a method of manufacturing an LED die.
    Type: Application
    Filed: August 11, 2014
    Publication date: February 12, 2015
    Inventors: CHING-HSUEH CHIU, YA-WEN LIN, PO-MIN TU, SHIH-CHENG HUANG
  • Publication number: 20150034965
    Abstract: An LED includes a substrate and a semiconductor structure mounted on the substrate. A plurality of first holes and a plurality of second holes are defined in the semiconductor structure. The second holes are located above the first holes and communicate with the first holes. A method for manufacturing the LED is also provided.
    Type: Application
    Filed: July 31, 2014
    Publication date: February 5, 2015
    Inventors: YA-WEN LIN, CHING-HSUEH CHIU, PO-MIN TU, SHIH-CHENG HUANG
  • Patent number: 8946737
    Abstract: A light emitting diode (LED) includes a substrate, a buffer layer and an epitaxial structure. The substrate has a first surface with a patterning structure formed thereon. The patterning structure includes a plurality of projections. The buffer layer is arranged on the first surface of the substrate. The epitaxial structure is arranged on the buffer layer. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer arranged on the buffer layer in sequence. The first semiconductor layer has a second surface attached to the active layer. A distance between a peak of each the projections and the second surface of the first semiconductor layer is ranged from 0.5 ?m to 2.5 ?m.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: February 3, 2015
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang, Chia-Hung Huang, Shun-Kuei Yang
  • Patent number: 8936955
    Abstract: An LED manufacturing method includes following steps: providing an LED die; providing an electrode layer having a first section and a second section electrically insulated from the first section, and arranging the LED die on the second section wherein an electrically conductive material electrical connects a bottom of the LED die with second section; forming a transparent conductive layer to electrically connect a top of the LED die with the first section; providing a base and coating an outer surface of the base with a layer of electrically conductive material, defining a continuous gap in the electrically conductive material to divide the electrically conductive material into a first electrode part, and a second electrode part, arranging the electrode layer on the base so that the first section contacts the first electrode part, and the second section contacts the second electrode part.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: January 20, 2015
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Ya-Wen Lin
  • Patent number: 8921828
    Abstract: An exemplary light emitting diode includes a first type semiconductor layer, a second type semiconductor layer, and a multi quantum well layer sandwiched between the first and second type semiconductor layers. The multi quantum well layer includes a first barrier layer, a second barrier layer, two well layers sandwiched between the first and second barrier layers, and a third barrier layer sandwiched between the two well layers. The first and second barrier layers each have an energy level of conduction band higher than that of the third barrier layer. The first and second barrier layers each have an energy level of valence band higher than that of the third barrier layer.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: December 30, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Ya-Wen Lin, Shih-Cheng Huang, Po-Min Tu