Patents by Inventor Min Tu

Min Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for manufacturing polychromatic light emitting diode device having wavelength conversion layer made of semiconductor
    Patent number: 8580590
    Abstract: A method for manufacturing a polychromatic light emitting diode device, comprising steps of providing an epitaxial substrate and forming a multiple semiconductor layer on the epitaxial substrate, wherein the multiple semiconductor layer comprises an n-type semiconductor layer, a p-type semiconductor layer and an active layer. The active layer emits light of a first wavelength. Thereafter a first wavelength conversion layer is formed on the multiple semiconductor layer. The first wavelength conversion layer is made of semiconductor and absorbs a portion of the light of a first wavelength and emits light of a second wavelength, wherein the second wavelength is longer than the first wavelength.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: November 12, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Ying-Chao Yeh, Wen-Yu Lin, Peng-Yi Wu, Shih-Hsiung Chan
  • Photoelectric device having group III nitride semiconductor
    Patent number: 8581283
    Abstract: A photoelectric device having Group III nitride semiconductor includes a conductive layer, a metallic mirror layer located on the conductive layer, and a Group III nitride semiconductor layer located on the metallic mirror layer. The Group III nitride semiconductor layer defines a number of microstructures thereon. Each microstructure includes at least one angled face, and the angled face of each microstructure is a crystal face of the Group III nitride semiconductor layer.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: November 12, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Wen-Yu Lin, Chih-Peng Hsu, Shih-Hsiung Chan
  • Semiconductor optoelectronics structure with increased light extraction efficiency and fabrication method thereof
    Patent number: 8574939
    Abstract: A semiconductor optoelectronic structure with increased light extraction efficiency and a fabrication method thereof are presented. The semiconductor optoelectronic structure includes continuous grooves formed under an active layer of the semiconductor optoelectronic structure to reflect light from the active layer and thereby direct more light through a light output surface so as to increase the light intensity from the semiconductor optoelectronic structure.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: November 5, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih Cheng Huang, Po Min Tu, Peng Yi Wu, Wen Yu Lin, Chih Pang Ma, Tzu Chien Hong, Chia Hui Shen
  • SEMICONDUCTOR STRUCTURE HAVING LOW THERMAL STRESS
    Publication number: 20130285216
    Abstract: A semiconductor structure includes a Si substrate, a supporting layer and a blocking layer formed on the substrate and an epitaxy layer formed on the supporting layer. The supporting layer defines a plurality of grooves therein to receive the blocking layer. The epitaxy layer is grown from the supporting layer. A plurality of slots is defined in the epitaxy layer and over the blocking layer. The epitaxy layer includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer.
    Type: Application
    Filed: June 25, 2013
    Publication date: October 31, 2013
    Inventors: SHIH-CHENG HUANG, PO-MIN TU, SHUN-KUEI YANG, CHIA-HUNG HUANG
  • Method for manufacturing light emitting chip
    Patent number: 8563340
    Abstract: A method for manufacturing light emitting chips includes steps of: providing a substrate having a plurality of separate epitaxy islands thereon, wherein the epitaxy islands are spaced from each other by channels; filling the channels with an insulation material; sequentially forming a reflective layer, a transition layer and a base on the insulation material and the epitaxy islands; removing the substrate and the insulation material to expose the channels; and cutting the reflective layer, the transition layer and the base to form a plurality of individual chips along the channels.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: October 22, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Chia-Hung Huang
  • FLIP-CHIP SEMICONDUCTOR OPTOELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME
    Publication number: 20130248922
    Abstract: A method for fabricating flip-chip semiconductor optoelectronic devices initially flip-chip bonds a semiconductor optoelectronic chip attached to an epitaxial substrate to a packaging substrate. The epitaxial substrate is then separated using lift-off technology.
    Type: Application
    Filed: May 20, 2013
    Publication date: September 26, 2013
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Chester KUO, Lung-Hsin CHEN, Wen-Liang TSENG, Shih-Cheng HUANG, Po-Min TU, Ying-Chao YEH, Wen-Yu LIN, Peng-Yi WU, Shih-Hsiung CHAN
  • Light emitting element package
    Patent number: 8536590
    Abstract: A light emitting element package includes a substrate, at least two light emitting element modules and an encapsulation member. The substrate includes a circuit layer. The circuit layer includes a plurality of solder pads. The at least two light emitting element modules are mounted on the substrate. Each of the at least two light emitting element modules includes a plurality of light emitting elements. Each light emitting element of the at least two light emitting element modules is electrically coupled to neighboring light emitting element in serial through the solder pads. The at least two light emitting element modules are reversely arranged. The encapsulation member is configured to encapsulate the at least two light emitting element modules on the substrate.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: September 17, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Chia-Hung Huang
  • Light emitting diode with peripheral circular slots and method for manufacturing the same
    Patent number: 8536597
    Abstract: A light emitting diode chip includes an electrically conductive substrate, a reflecting layer disposed on the substrate, a semiconductor structure formed on the reflecting layer, an electrode disposed on the semiconductor structure, and a plurality of slots extending through the semiconductor structure. The semiconductor structure includes a P-type semiconductor layer formed on the reflecting layer, a light-emitting layer formed on the P-type semiconductor layer, and an N-type semiconductor layer formed on the light-emitting layer. A current diffusing region is defined in the semiconductor structure and around the electrode. The slots are located outside the current diffusing region.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: September 17, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang
  • LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREOF
    Publication number: 20130234150
    Abstract: A light emitting diode includes a substrate, a transitional layer on the substrate and an epitaxial layer on the transitional layer. The transitional layer includes a planar area with a flat top surface and a patterned area with a rugged top surface. An AlN material includes a first part consisting of a plurality of spheres and a second part consisting of a plurality of slugs. The spheres are on a top surface of the transitional layer, both at the planar area and the patterned area. The slugs are in grooves defined in the patterned area. Air gaps are formed between the slugs and a bottom surface of the epitaxial layer. The spheres and slugs of the AlN material help reflection of light generated by the epitaxial layer to a light output surface of the LED.
    Type: Application
    Filed: August 30, 2012
    Publication date: September 12, 2013
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: CHIA-HUNG HUANG, SHIH-CHENG HUANG, PO-MIN TU, YA-WEN LIN, SHUN-KUEI YANG
  • SEMICONDUCTOR STRUCTURE FOR SUBSTRATE SEPARATION AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20130228809
    Abstract: A semiconductor structure includes a temporary substrate; a first semiconductor layer positioned on the temporary substrate; a dielectric layer comprising a plurality of patterned nano-scaled protrusions disposed on the first semiconductor layer; a dielectric layer surrounding the plurality of patterned nano-scaled protrusions and disposed on the first semiconductor layer; and a second semiconductor layer positioned on the dielectric layer, wherein the top surfaces of the patterned nano-scaled protrusions are in contact with the bottom of the second semiconductor layer. An etching process is performed on the semiconductor structure to separate the first semiconductor layer and the second semiconductor layer, in order to detach the temporary substrate from the second semiconductor layer and transfer the second semiconductor layer to a permanent substrate.
    Type: Application
    Filed: March 1, 2012
    Publication date: September 5, 2013
    Applicant: DESIGN EXPRESS LIMITED
    Inventors: CHUN-YEN CHANG, PO-MIN TU, JET-RUNG CHANG
  • Semiconductor light-emitting structure having low thermal stress
    Patent number: 8519419
    Abstract: A semiconductor light-emitting structure includes a silicon substrate, a distributed Bragg reflector, a semiconductor structures layer and an epitaxy connecting layer. The silicon substrate has a top surface. The distributed Bragg reflector is formed on the top surface of the silicon substrate. The semiconductor structures layer is configured for emitting light. The epitaxy connecting layer is placed between the distributed Bragg reflector and the semiconductor structures layer. Grooves extend from the semiconductor structures layer through the epitaxy connecting layer and the distributed Bragg reflector to reach the semiconductor structures layer.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: August 27, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Chia-Hung Huang
  • Method for fabricating semiconductor lighting chip
    Patent number: 8513039
    Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate; forming a first etching layer on the substrate; forming a connecting layer on the first etching layer; forming a second etching layer on the connecting layer; forming a lighting structure on the second etching layer; and etching the first etching layer, the connecting layer, the second etching layer and the lighting structure, wherein an etching rate of the first etching layer and the second etching layer is lager than that of the connecting layer and the lighting structure, thereby to form the connecting layer and the lighting structure each with an inverted frustum-shaped structure.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: August 20, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Tzu-Chien Hung, Ya-Wen Lin
  • Lateral thermal dissipation LED and fabrication method thereof
    Patent number: 8513696
    Abstract: A lateral thermal dissipation LED and a fabrication method thereof are provided. The lateral thermal dissipation LED utilizes a patterned metal layer and a lateral heat spreading layer to transfer heat out of the LED. The thermal dissipation efficiency of the LED is increased, and the lighting emitting efficiency is accordingly improved.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: August 20, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po Min Tu, Shih Cheng Huang, Ying Chao Yeh, Wen Yu Lin, Peng Yi Wu, Shih Hsiung Chan
  • Semiconductor structure having low thermal stress and method for manufacturing thereof
    Patent number: 8501582
    Abstract: A semiconductor structure includes a Si substrate, a supporting layer and a blocking layer formed on the substrate and an epitaxy layer formed on the supporting layer. The supporting layer defines a plurality of grooves therein to receive the blocking layer. The epitaxy layer is grown from the supporting layer. A plurality of slots is defined in the epitaxy layer and over the blocking layer. The epitaxy layer includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer. A method for manufacturing the semiconductor structure is also disclosed.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: August 6, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Chia-Hung Huang
  • LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREOF
    Publication number: 20130161652
    Abstract: A light emitting diode (LED) includes a substrate, a buffer layer and an epitaxial structure. The substrate has a first surface with a patterning structure formed thereon. The patterning structure includes a plurality of projections. The buffer layer is arranged on the first surface of the substrate. The epitaxial structure is arranged on the buffer layer. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer arranged on the buffer layer in sequence. The first semiconductor layer has a second surface attached to the active layer. A distance between a peak of each the projections and the second surface of the first semiconductor layer is ranged from 0.5 ?m to 2.5 ?m.
    Type: Application
    Filed: August 8, 2012
    Publication date: June 27, 2013
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Ya-Wen LIN, Po-Min TU, Shih-Cheng HUANG, Chia-Hung HUANG, Shun-Kuei YANG
  • Method for fabricating a flip-chip semiconductor optoelectronic device
    Patent number: 8470621
    Abstract: A method for fabricating flip-chip semiconductor optoelectronic devices initially flip-chip bonds a semiconductor optoelectronic chip attached to an epitaxial substrate to a packaging substrate. The epitaxial substrate is then separated using lift-off technology.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: June 25, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Chester Kuo, Lung Hsin Chen, Wen Liang Tseng, Shih Cheng Huang, Po Min Tu, Ying Chao Yeh, Wen Yu Lin, Peng Yi Wu, Shih Hsiung Chan
  • Light emitting diode and manufacturing method thereof
    Patent number: 8466033
    Abstract: A light emitting diode comprises a substrate, a buffer layer, a semiconductor layer and a semiconductor light emitting layer. The buffer layer is disposed on the substrate. The semiconductor layer is disposed on the buffer layer. The semiconductor light emitting layer is disposed on the semiconductor layer. A plurality of voids is defined within the semiconductor layer. Each void encloses air therein. A method for manufacturing the light emitting diode is also provided. Light generated by the semiconductor light emitting layer toward the substrate is reflected by the voids to emit out of the light emitting diode.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: June 18, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang
  • Light emitting diode chip and method of manufacturing the same
    Patent number: 8461619
    Abstract: An LED chip includes a substrate, a first type semiconductor layer, a light-emitting layer, a second type semiconductor layer, a first electrode and a second electrode formed on the substrate in sequence. A surface of the first type semiconductor layer away from the substrate comprises an exposed first area and a second area covered by the light-emitting layer. The first electrode is formed on the exposed first area of the substrate. A number of recesses are defined in the second area of the surface of the first type semiconductor layer. The recesses are spaced apart from each other and arranged in sequence in a direction away from the first electrode; depths of the recesses gradually decrease following an increase of a distance between the recesses and the first electrode. The second electrode is formed on the second type semiconductor layer.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: June 11, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Chia-Hung Huang, Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang
  • Gallium nitride-based semiconductor device and method for manufacturing the same
    Patent number: 8461666
    Abstract: A gallium nitride-based semiconductor device includes a composite substrate and a gallium nitride layer. The composite substrate includes a silicon substrate and a filler. The silicon substrate includes a first surface and a second surface opposite to the first surface, and the first surface defines a number of grooves therein. The filler is filled into the number of grooves on the first surface of the silicon substrate. A thermal expansion coefficient of the filler is bigger than that of the silicon substrate. The gallium nitride layer is formed on the second surface of the silicon substrate.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: June 11, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang
  • Light emitting element and manufacturing method thereof
    Patent number: 8450749
    Abstract: A light emitting element includes a substrate, a GaN layer formed on the substrate, a first low refractive index semiconductor layer formed on the GaN layer, and a lighting structure having a high refractive index formed on the first low refractive index semiconductor layer. A second low refractive index semiconductor layer is embedded in the first low refractive index semiconductor layer. The first low refractive index semiconductor layer and the GaN layer exhibit a lattice mismatch therebetween.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: May 28, 2013
    Assignee: Advanced Optoelectronics Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang