Patents by Inventor Min Yao

Min Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230047153
    Abstract: Face mask including a mask body, lining around an edge of the mask body, and a nose strip, wherein the complete face mask including the mask body, the lining, and the nose strip is made of a single recyclable material, such as PET. The face mask can be ground directly for recycling without first separating the parts of the face mask.
    Type: Application
    Filed: December 2, 2021
    Publication date: February 16, 2023
    Inventors: Min Yao, Roy Yao
  • Publication number: 20220418115
    Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
    Type: Application
    Filed: August 30, 2022
    Publication date: December 29, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Hsing Kuo TIEN, Chih-Cheng LEE, Min-Yao CHEN
  • Patent number: 11492373
    Abstract: A balanced-lattice-ledge nucleant having ledge inducing local densification of proteins and a balanced-lattice inducing self-organized crystal packing. Using this balanced-lattice-ledge nucleant enhances nucleation of protein crystals.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: November 8, 2022
    Assignee: NATIONAL UNIVERSITY CORPORATION HOKKAIDO UNIVERSITY
    Inventors: Min Yao, Long Li
  • Patent number: 11482172
    Abstract: A display device and an operating method of the display device are provided. The display device includes a first light emitting diode (LED), a first switch, a second switch, a second LED, a third switch, and a first controller. A first terminal of the first switch receives a first electrical signal. A first terminal of the second switch receives a second electrical signal. A first terminal of the third switch receives a third electrical signal. Here, whether the first switch, the second switch, and the third switch are switched on or off is determined by whether the first LED and the second LED are damaged or not. The first controller is configured to detect whether the first LED and the second LED are damaged or not, generate the second electrical signal and the electrical signal, and generate a plurality of control signals controlling the first switch to the third switch.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: October 25, 2022
    Assignee: AU Optronics Corporation
    Inventors: Ming-Chen Hsu, Hsiang-Yuan Hsieh, Min-Yao Lu, Chin-Tang Chuang
  • Publication number: 20220285282
    Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.
    Type: Application
    Filed: May 24, 2022
    Publication date: September 8, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Min-Yao CHEN
  • Patent number: 11432406
    Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: August 30, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Hsing Kuo Tien, Chih-Cheng Lee, Min-Yao Chen
  • Patent number: 11342272
    Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: May 24, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Min-Yao Chen
  • Publication number: 20220157745
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.
    Type: Application
    Filed: January 31, 2022
    Publication date: May 19, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Chih-Cheng LEE, Min-Yao CHEN, Hsing Kuo TIEN
  • Patent number: 11335650
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate. The electronic component includes a conductive wire comprising an alignment mark section and a connection section, and a magnetic layer partially covering the conductive wire. The magnetic layer includes an alignment window disposed in an upper surface of the magnetic layer and exposing a first upper surface of the alignment mark section, and a recess disposed in the upper surface of the magnetic layer and exposing a second upper surface of the connection section. The conductive trace is in the recess and electrically connected to the second upper surface of the connection section of the conductive wire.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: May 17, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Chih-Cheng Lee, Min-Yao Chen, Hsing Kuo Tien
  • Publication number: 20220095462
    Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 24, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Hsing Kuo TIEN, Chih-Cheng LEE, Min-Yao CHEN
  • Publication number: 20220052013
    Abstract: A semiconductor device package is provided. The semiconductor device package includes providing a first substrate, a computing unit and a power module. The first substrate has a first surface and a second surface opposite to the first surface. The computing unit is adjacent to the first surface. The computing unit includes a semiconductor die. The power module is adjacent to the second surface. The power module includes a power element and a passive element. Each of the semiconductor die, the power element, and the passive element is vertically arranged with respect to each other, and the passive elements are assembled between the semiconductor die and the power element.
    Type: Application
    Filed: October 26, 2021
    Publication date: February 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Han-Chee YEN, Ying-Nan LIU, Min-Yao CHENG
  • Patent number: 11239184
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: February 1, 2022
    Assignee: ADVANCED SEMICONDUTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Chih-Cheng Lee, Min-Yao Chen, Hsing Kuo Tien
  • Publication number: 20210391283
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Chih-Cheng LEE, Min-Yao CHEN, Hsing Kuo TIEN
  • Publication number: 20210391284
    Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate. The electronic component includes a conductive wire comprising an alignment mark section and a connection section, and a magnetic layer partially covering the conductive wire. The magnetic layer includes an alignment window disposed in an upper surface of the magnetic layer and exposing a first upper surface of the alignment mark section, and a recess disposed in the upper surface of the magnetic layer and exposing a second upper surface of the connection section. The conductive trace is in the recess and electrically connected to the second upper surface of the connection section of the conductive wire.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Chih-Cheng LEE, Min-Yao CHEN, Hsing Kuo TIEN
  • Publication number: 20210391271
    Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wu Chou HSU, Min-Yao CHEN
  • Publication number: 20210383757
    Abstract: A display device and an operating method of the display device are provided. The display device includes a first light emitting diode (LED), a first switch, a second switch, a second LED, a third switch, and a first controller. A first terminal of the first switch receives a first electrical signal. A first terminal of the second switch receives a second electrical signal. A first terminal of the third switch receives a third electrical signal. Here, whether the first switch, the second switch, and the third switch are switched on or off is determined by whether the first LED and the second LED are damaged or not. The first controller is configured to detect whether the first LED and the second LED are damaged or not, generate the second electrical signal and the electrical signal, and generate a plurality of control signals controlling the first switch to the third switch.
    Type: Application
    Filed: August 24, 2021
    Publication date: December 9, 2021
    Applicant: Au Optronics Corporation
    Inventors: Ming-Chen Hsu, Hsiang-Yuan Hsieh, Min-Yao Lu, Chin-Tang Chuang
  • Patent number: 11170710
    Abstract: A display module including display pixels, driving circuit and first switches is provided. The display pixels are arranged in columns and rows in the display area, and every display pixel includes sub-pixels. The display pixels form pixel rows along the first direction, and the sub-pixels of the display pixels form sub-pixel columns along the second direction. The color of the light emitting from the sub-pixels of the same sub-pixel column are substantially the same. The first direction and the second direction are substantially perpendicular. The driving circuit includes signal connectors, and every signal connector connects one of the pixel rows. The first switch is connected between a power source and one of the pixel rows, transmitting driving signal. The first switch is controlled by the driving circuit. A display device and a driving method are also provided.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: November 9, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsiang-Yuan Hsieh, Min-Yao Lu, Ming-Chen Hsu, Chin-Tang Chuang
  • Patent number: 11166103
    Abstract: The present disclosure provides a playing device and a playing method based on the playing device. The playing device includes a headphone interface circuit and a speaker circuit. Signal input terminals of the headphone interface circuit and the speaker circuit are directly connected to a sound source output terminal of the playing device. The signal input terminal of the speaker circuit is connected to a first enable signal output terminal when the first enable signal output terminal outputs a matched enable signal, a sound source signal output from the sound source output terminal is played by the speaker circuit. The signal input terminal of the headphone interface circuit is connected to a second enable signal output terminal. When a headphone is inserted and the second enable signal output terminal outputs a matched enable signal, a sound source signal output from the sound source output terminal is played by the headphone.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: November 2, 2021
    Assignee: HUIZHOU TCL MOBILE COMMUNICATION CO., LTD.
    Inventors: Min Yao, Mingliang Liu, Chunxia Yan
  • Patent number: 11158596
    Abstract: A semiconductor device package is provided. The semiconductor device package includes providing a first substrate, a computing unit and a power module. The first substrate has a first surface and a second surface opposite to the first surface. The computing unit is adjacent to the first surface. The computing unit includes a semiconductor die. The power module is adjacent to the second surface. The power module includes a power element and a passive element. Each of the semiconductor die, the power element, and the passive element is vertically arranged with respect to each other, and the passive elements are assembled between the semiconductor die and the power element.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: October 26, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Han-Chee Yen, Ying-Nan Liu, Min-Yao Cheng
  • Patent number: 11159871
    Abstract: The present disclosure provides a signal transmission circuit, a signal transmission system, a signal transmission method, and an intelligent terminal. The signal transmission circuit includes an earphone interface circuit, a comparison circuit, and a control circuit. The earphone interface circuit is configured for connection to an audio receiving device. The comparison circuit is configured to acquire a voltage value corresponding to an impedance of the audio receiving device via the earphone interface circuit, the voltage value is compared with a reference voltage of the comparison circuit, to output a comparison result to the control circuit. The control circuit judges whether the audio receiving device is a digital audio device according to the comparison result, and switches the earphone interface circuit to digital output when the audio receiving device is determined to be a digital audio device.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: October 26, 2021
    Assignee: HUIZHOU TCL MOBILE COMMUNICATION CO., LTD.
    Inventors: Chunxia Yan, Mingliang Liu, Min Yao