Patents by Inventor MIN-YU HUANG

MIN-YU HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220069851
    Abstract: According to one embodiment, an RF frontend IC device includes a first RF transceiver to transmit and receive RF signals within a first frequency band and a second RF transceiver to transmit and receive RF signals within a second frequency band that is different than the first frequency band. The RF frontend IC device further includes a converter and a multi-band local oscillator (LO) generator to provide LO signals to the converter. The multi-band LO generator includes a phase-lock loop (PLL) circuit operating at a PLL operating frequency, wherein the PLL operating frequency is outside of the first frequency band and the second frequency band. The multi-band LO generator also includes multiple frequency multipliers coupled to the PLL circuit to upscale the PLL operating frequency and to generate an LO signal having a frequency within a predetermined proximity from the frequency band.
    Type: Application
    Filed: August 31, 2020
    Publication date: March 3, 2022
    Inventors: Min-Yu Huang, Thomas Chen
  • Patent number: 10855317
    Abstract: An RF receiver includes a low-noise amplifier (LNA) to receive and amplify RF signals, a transformer-based IQ generator circuit, one or more load resisters, one or more mixer circuit, and a downconverter. The transformer-based IQ generator is to generate a differential in-phase local oscillator (LOI) signal and a differential quadrature (LOQ) signal based on a local oscillator (LO) signal received from an LO. The load resisters are coupled to an output of the transformer-based IQ generator. Each of the load resisters is to couple one of the differential LOI and LOQ signals to a predetermined bias voltage. The mixers are coupled to the LNA and the transformer-based IQ generator to receive and mix the RF signals amplified by the LNA with the differential LOI and LOQ signals to generate an in-phase RF (RFI) signal and a quadrature RF (RFQ) signal. The downconverter is to down convert the RFI signal and the RFQ signal into IF signals.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: December 1, 2020
    Assignee: SWIFTLINK TECHNOLOGIES INC.
    Inventors: Min-Yu Huang, Thomas Chen
  • Patent number: 10840959
    Abstract: According to one embodiment, a compact broadband radio frequency (RF) receiver circuit includes a low noise amplifier which includes a first amplifier stage, a second amplifier stage, an inter-stage network including a higher order filter network, where the inter-stage network is coupled between the first amplifier stage and the second amplifier stage, and a double resonance transformer network coupled to an output of the second amplifier stage. The RF receiver circuit includes a low pass filter and a mixer circuit coupled between the low noise amplifier and the low pass filter.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: November 17, 2020
    Assignees: SWIFTLINK TECHNOLOGIES INC., GEORGIA TECH RESEARCH CORPORATION
    Inventors: Huy Thong Nguyen, Taiyun Chi, Min-Yu Huang, Hua Wang, Thomas Chen
  • Publication number: 20200215153
    Abstract: This disclosure provides for a method of treating and/or preventing cancer in a subject by targeting the BIK degradation pathway in combination with the administration of an active BIKDD. Also described herein are compositions comprising an active BIKDD and methods of their making an use for the treatment of cancer.
    Type: Application
    Filed: December 12, 2019
    Publication date: July 9, 2020
    Inventors: Ruey-Hwa CHEN, Fei-Yun CHEN, Min-Yu HUANG
  • Patent number: 10707817
    Abstract: According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: July 7, 2020
    Assignees: SPEEDLINK TECHNOLOGY INC., GEORGIA TECH RESEARCH CORPORATION
    Inventors: Min-Yu Huang, Hua Wang, Thomas Chen, Taiyun Chi
  • Patent number: 10536182
    Abstract: A packaged integrated circuit device includes a transceiver with one or more oscillators therein. The oscillators can be configured as harmonic or fundamental-frequency oscillators for signal transmitting, or they can be configured as regenerative receivers for signal receiving. An antenna is provided in the package and, preferably, on the same chip IC chip as the transceiver. The antenna includes one or more feeds, which are coupled to the one or more oscillators. A dual-function varactor/envelope detector is provided, which is electrically coupled to the one or more oscillators. A control circuit is provided, which is configured to drive nodes of the transceiver and the dual-function varactor/envelope detector with a first plurality of reference voltages during operation of the transceiver as a radio transmitter (with varactor) and a second plurality of reference voltages during operation of the transceiver as a radio receiver (with envelope detector).
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: January 14, 2020
    Assignee: GEORGIA TECH RESEARCH CORPORATION
    Inventors: Hua Wang, Taiyun Chi, Min-Yu Huang
  • Publication number: 20190372533
    Abstract: According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.
    Type: Application
    Filed: May 30, 2018
    Publication date: December 5, 2019
    Inventors: Min-Yu HUANG, Hua WANG, Thomas CHEN, Taiyun CHI
  • Publication number: 20190356348
    Abstract: According to one embodiment, a compact broadband radio frequency (RF) receiver circuit includes a low noise amplifier which includes a first amplifier stage, a second amplifier stage, an inter-stage network including a higher order filter network, where the inter-stage network is coupled between the first amplifier stage and the second amplifier stage, and a double resonance transformer network coupled to an output of the second amplifier stage. The RF receiver circuit includes a low pass filter and a mixer circuit coupled between the low noise amplifier and the low pass filter.
    Type: Application
    Filed: May 15, 2018
    Publication date: November 21, 2019
    Inventors: Huy Thong NGUYEN, Taiyun CHI, Min-Yu HUANG, Hua WANG, Thomas CHEN
  • Publication number: 20190312604
    Abstract: An RF receiver includes a low-noise amplifier (LNA) to receive and amplify RF signals, a transformer-based IQ generator circuit, one or more load resisters, one or more mixer circuit, and a downconverter. The transformer-based IQ generator is to generate a differential in-phase local oscillator (LOI) signal and a differential quadrature (LOQ) signal based on a local oscillator (LO) signal received from an LO. The load resisters are coupled to an output of the transformer-based IQ generator. Each of the load resisters is to couple one of the differential LOI and LOQ signals to a predetermined bias voltage. The mixers are coupled to the LNA and the transformer-based IQ generator to receive and mix the RF signals amplified by the LNA with the differential LOI and LOQ signals to generate an in-phase RF (RFI) signal and a quadrature RF (RFQ) signal. The downconverter is to down convert the RFI signal and the RFQ signal into IF signals.
    Type: Application
    Filed: May 16, 2019
    Publication date: October 10, 2019
    Inventors: Min-Yu HUANG, Thomas CHEN
  • Patent number: 10411745
    Abstract: According to one embodiment, a radio frequency (RF) receiver circuit includes a low noise amplifier, a poly-phase filter, and an in-phase quadrature (IQ) mixer circuit coupled between the low noise amplifier and the poly-phase filter. The IQ mixer circuit includes an IQ generator having a differential in-phase input port, a differential in-phase output port, and a differential quadrature output port; a first frequency mixer having a differential local oscillator (LO) input port, where the differential LO input port of the first frequency mixer are coupled to the differential in-phase output port of the IQ generator to drive the first frequency mixer; and a second frequency mixer having a differential LO port, where the differential LO input port of the second frequency mixer are coupled to the differential quadrature output port of the IQ generator to drive the second frequency mixer.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: September 10, 2019
    Assignee: SPEEDLINK TECHNOLOGY INC.
    Inventors: Min-Yu Huang, Hua Wang, Thomas Chen, Taiyun Chi
  • Patent number: 10382084
    Abstract: According to one embodiment, a radio frequency (RF) frontend circuit includes a RF receiver, a transceiver (or transmit/receive) switch, and a high-order inductive degeneration matching network coupled in between the transceiver switch and an input port of the RF receiver, where the high-order inductive degeneration matching network matches an impedance for the RF receiver and the transceiver switch and the high-order inductive degeneration matching network is to resonate at a plurality of predetermined resonant frequencies.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: August 13, 2019
    Assignees: SPEEDLINK TECHNOLOGY INC., GEORGIA TECH RESEARCH CORPORATION
    Inventors: Min-Yu Huang, Hua Wang, Thomas Chen, Taiyun Chi
  • Publication number: 20180358995
    Abstract: A packaged integrated circuit device includes a transceiver with one or more oscillators therein. The oscillators can be configured as harmonic or fundamental-frequency oscillators for signal transmitting, or they can be configured as regenerative receivers for signal receiving. An antenna is provided in the package and, preferably, on the same chip IC chip as the transceiver. The antenna includes one or more feeds, which are coupled to the one or more oscillators. A dual-function varactor/envelope detector is provided, which is electrically coupled to the one or more oscillators. A control circuit is provided, which is configured to drive nodes of the transceiver and the dual-function varactor/envelope detector with a first plurality of reference voltages during operation of the transceiver as a radio transmitter (with varactor) and a second plurality of reference voltages during operation of the transceiver as a radio receiver (with envelope detector).
    Type: Application
    Filed: November 18, 2016
    Publication date: December 13, 2018
    Inventors: HUA WANG, TAIYUN CHI, MIN-YU HUANG