Wideband matching co-design of transmit/receive (T/R) switch and receiver frontend for a broadband MIMO receiver for millimeter-wave 5G communication
According to one embodiment, a radio frequency (RF) frontend circuit includes a RF receiver, a transceiver (or transmit/receive) switch, and a high-order inductive degeneration matching network coupled in between the transceiver switch and an input port of the RF receiver, where the high-order inductive degeneration matching network matches an impedance for the RF receiver and the transceiver switch and the high-order inductive degeneration matching network is to resonate at a plurality of predetermined resonant frequencies.
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Embodiments of the present invention relate generally to wireless communication devices. More particularly, embodiments of the invention relate to a multi-band image-reject receiver for a communication device.
BACKGROUNDFor next-generation 5G communication devices, a higher data rate is required for many applications such as augmented reality (AR)/virtual reality (VR), and 5G multiple-input and multiple-output (MIMO). A design shift towards millimeter-wave (mm-Wave) frequency supports this higher data rate. Meanwhile, a broader bandwidth is required to facilitate the higher data rate. For example, a broader bandwidth should cover the 5G spectrum including the 24, 28, 37, and 39 GHz bands.
Conventionally, a low noise amplifier (LNA) of an mm-Wave receiver front-end and transmit/receive (T/R) switch are designed separately with a single standard 50Ω interface. This partitioned method often reduces receiver bandwidth, input matching, and/or noise figure. Thus, there is a need for co-design of a LNA and T/R switch to improve performance of the receiver.
Embodiments of the invention are illustrated by way of example and not limitation in the figures of the accompanying drawings in which like references indicate similar elements.
Various embodiments and aspects of the inventions will be described with reference to details discussed below, and the accompanying drawings will illustrate the various embodiments. The following description and drawings are illustrative of the invention and are not to be construed as limiting the invention. Numerous specific details are described to provide a thorough understanding of various embodiments of the present invention. However, in certain instances, well-known or conventional details are not described in order to provide a concise discussion of embodiments of the present inventions.
Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in conjunction with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification do not necessarily all refer to the same embodiment.
Note that in the corresponding drawings of the embodiments, signals are represented with lines. Some lines may be thicker, to indicate more constituent signal paths, and/or have arrows at one or more ends, to indicate primary information flow direction. Such indications are not intended to be limiting. Rather, the lines are used in connection with one or more exemplary embodiments to facilitate easier understanding of a circuit or a logical unit. Any represented signal, as dictated by design needs or preferences, may actually comprise one or more signals that may travel in either direction and may be implemented with any suitable type of signal scheme.
Throughout the specification, and in the claims, the term “connected” means a direct electrical connection between the things that are connected, without any intermediary devices. The term “coupled” means either a direct electrical connection between the things that are connected, or an indirect connection through one or more passive or active intermediary devices. The term “circuit” means one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function. The term “signal” means at least one current signal, voltage signal or data/clock signal. The meaning of “a”, “an”, and “the” include plural references. The meaning of “in” includes “in” and “on”.
As used herein, unless otherwise specified the use of the ordinal adjectives “first,” “second,” and “third,” etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking or in any other manner. The term “substantially” herein refers to being within 10% of the target.
For purposes of the embodiments described herein, unless otherwise specified, the transistors are metal oxide semiconductor (MOS) transistors, which include drain, source, gate, and bulk terminals. Source and drain terminals may be identical terminals and are interchangeably used herein. Those skilled in the art will appreciate that other transistors, for example, Bi-polar junction transistors—BJT PNP/NPN, BiCMOS, CMOS, etc., may be used without departing from the scope of the disclosure.
According to some embodiments, a radio frequency (RF) frontend circuit includes a RF receiver, a transceiver (or transmit/receive) switch, and a high-order inductive degeneration matching network coupled in between the transceiver switch and an input port of the RF receiver, where the high-order inductive degeneration matching network matches an impedance for the RF receiver and the transceiver switch and the high-order inductive degeneration matching network is to resonate at a plurality of predetermined resonant frequencies.
In one embodiment, the high-order inductive degeneration matching network includes a capacitor in series with an inductive transmission line to resonate at a first predetermined resonant frequency. In one embodiment, a first terminal of the capacitor of the matching network is coupled to an input port of the matching network and a second terminal of the capacitor is coupled to a first end of the inductive transmission line and a second end of the inductive transmission line is coupled to the output port of the matching network.
In one embodiment, the capacitor comprises a transmission line having a gap. In one embodiment, the inductive transmission line is a microstrip line. In another embodiment, the matching network further includes a first inductor coupled in between the input port of the matching network and a ground plane and the first inductor is to resonate with off-switch parasitic capacitances seen at the output port of transceiver switch at a second predetermined resonant frequency. In another embodiment, the first inductor of the matching network comprises an on-chip spiral line. In another embodiment, the matching network further includes a second inductor coupled in between the output port of the matching network and an input port of the RF receiver so the second inductor resonates at a third predetermined resonant frequency with parasitic capacitances seen at the input port of the RF receiver. In another embodiment, the second inductor of the matching network comprises an on-chip spiral line. In one embodiment, the transmit/receive switch(es) are on-chip transistor switches.
In a radio receiver circuit, the RF frontend is a generic term for all the circuitry between the antenna up to and including the mixer stage. It consists of all the components in the receiver that process the signal at the original incoming radio frequency, before it is converted to a lower frequency, e.g., IF. In microwave and satellite receivers it is often called the low-noise block (LNB) or low-noise downconverter (LND) and is often located at the antenna, so that the signal from the antenna can be transferred to the rest of the receiver at the more easily handled intermediate frequency. A baseband processor is a device (a chip or part of a chip) in a network interface that manages all the radio functions (all functions that require an antenna).
In one embodiment, RF frontend module 101 includes one or more RF transceivers, where each of the RF transceivers transmits and receives RF signals within a particular frequency band (e.g., a particular range of frequencies such as non-overlapped frequency ranges) via one of a number of RF antennas. The RF frontend IC chip further includes an IQ generator and/or a frequency synthesizer coupled to the RF transceivers. The IQ generator or generation circuit generates and provides an LO signal to each of the RF transceivers to enable the RF transceiver to mix, modulate, and/or demodulate RF signals within a corresponding frequency band. The RF transceiver(s) and the IQ generation circuit may be integrated within a single IC chip as a single RF frontend IC chip or package.
Receiver 302 includes a low noise amplifier (LNA) 306, mixer(s) 307, and filter(s) 308. LNA 306 is to receive RF signals from a remote transmitter via antenna 221 and to amplify the received RF signals. The amplified RF signals are then demodulated by mixer(s) 307 (also referred to as a down-convert mixer) based on an LO signal provided by IQ generator 317. IQ generator 317 may represent an IQ generator of IQ generator/synthesizer 200 as described above. In one embodiment, IQ generator 317 is integrated into broadband receiver 302 as a single integrated circuit. The demodulated signals are then processed by filter(s) 308, which may be a low-pass filter. In one embodiment, transmitter 301 and receiver 302 share antenna 221 via a transmitting and receiving (T/R) switch 309. T/R switch 309 is configured to switch between transmitter 301 and receiver 302 to couple antenna 221 to either transmitter 301 or receiver 302 at a particular point in time. Although there is one pair of transmitter and receiver shown, multiple pairs of transmitters and receivers and/or a standalone receiver can be implemented.
Referring to
Referring to
For the second stage 1402, signal 1404 is amplified by M3 and M4 transistors. L6 is inserted between M3 and M4 transistors to cancel parasitic capacitances of M3 and M4 seen at inductor L6. The amplified signal is then transformed from single-ended into differential (e.g., balanced) components (e.g., ports Outp and Outn) by transformer-based balun 1405. A balun is a type of transformer used to convert an unbalanced signal to a balanced signal or vice versa. A balanced signal includes two signals carrying signals equal in magnitude but opposite in phase. An unbalanced signal includes a single signal working against a ground signal. A balanced signal allows for a balanced configuration for the next stages (e.g., mixer 307) to guard against RF-LO, LO-IF, and RF-IF signal leakages. In one embodiment, the passive loss of transformer-based balun 1405 in the second stage 1402 is kept at a minimum by placing transformer-based balun 1405 near the output ports (e.g., Outp and Outn) of LNA 306 for a low LNA noise figure.
In one embodiment, matching network 304 includes Lmatching to resonate with capacitances (e.g., Coff) of T/R switches 309 and capacitances for off-state PA 303. Referring to
In one embodiment, matching network 304 includes multiple resonating LC pairs, including (1) a first LC pair from Coff of T/R switch and load capacitor of the PA resonanting with Lmatching, (2) a second LC pair from C2 with Tline and L1, and (3) a third LC pair from gate-to-source parasitic capacitor of M1 with inductor L2. Having multiple resonating LC pairs, matching network 304 is similar to a high-order chebyshev filter that can achieve a broadband input matching at mm-Wave. For example, referring to
In the foregoing specification, embodiments of the invention have been described with reference to specific exemplary embodiments thereof. It will be evident that various modifications may be made thereto without departing from the broader spirit and scope of the invention as set forth in the following claims. The specification and drawings are, accordingly, to be regarded in an illustrative sense rather than a restrictive sense.
Claims
1. A radio frequency (RF) frontend circuit, comprising:
- an RF receiver;
- a transceiver switch; and
- a high-order inductive degeneration matching network coupled in between the transceiver switch and an input port of the RF receiver, wherein the high-order inductive degeneration matching network matches impedance for the RF receiver and the transceiver switch and the high-order inductive degeneration matching network is to resonate at a plurality of predetermined resonant frequencies, wherein the high-order inductive degeneration matching network comprises a capacitor in series with an inductive transmission line to resonate at a first predetermined resonant frequency.
2. The RF frontend circuit of claim 1, wherein a first terminal of the capacitor of the matching network is coupled to an input port of the matching network and a second terminal of the capacitor is coupled to a first end of the inductive transmission line and a second end of the inductive transmission line is coupled to the output port of the matching network.
3. The RF frontend circuit of claim 1, wherein the capacitor in series comprises a transmission line having a gap.
4. The RF frontend circuit of claim 1, wherein the inductive transmission line is a microstrip line.
5. The RF frontend circuit of claim 2, wherein the matching network further comprises a first inductor coupled in between the input port of the matching network and a ground plane and the first inductor is to resonate with off-switch parasitic capacitances seen at the output port of transceiver switch at a second predetermined resonant frequency.
6. The RF frontend circuit of claim 5, wherein the first inductor of the matching network comprises an on-chip spiral line.
7. The RF frontend circuit of claim 6, wherein the matching network further comprises a second inductor coupled in between the output port of the matching network and an input port of the RF receiver so the second inductor resonates at a third predetermined resonant frequency with parasitic capacitances seen at the input port of the RF receiver.
8. The RF frontend circuit of claim 7, wherein the second inductor of the matching network comprises an on-chip spiral line.
9. A mobile device, comprising:
- an antenna;
- a radio frequency (RF) frontend circuit coupled to the antenna, wherein the RF frontend circuit includes: an RF receiver, a transceiver switch, and a high-order inductive degeneration matching network coupled in between the transceiver switch and an input port of the RF receiver, wherein the high-order inductive degeneration matching network matches impedance for the RF receiver and the transceiver switch and the high-order inductive degeneration matching network is to resonate at a plurality of predetermined resonant frequencies, wherein the high-order inductive degeneration matching network comprises a capacitor in series with an inductive transmission line to resonate at a first predetermined resonant frequency; and
- a baseband processor coupled to the RF frontend circuit.
10. The mobile device of claim 9, wherein a first terminal of the capacitor of the matching network is coupled to an input port of the matching network and a second terminal of the capacitor is coupled to a first end of the inductive transmission line and a second end of the inductive transmission line is coupled to the output port of the matching network.
11. The mobile device of claim 9, wherein the capacitor in series comprises a transmission line having a gap.
12. The mobile device of claim 9, wherein the inductive transmission line is a microstrip line.
13. The mobile device of claim 10, wherein the matching network further comprises a first inductor coupled in between the input port of the matching network and a ground plane and the first inductor is to resonate with off-switch parasitic capacitances seen at the output port of transceiver switch at a second predetermined resonant frequency.
14. The mobile device of claim 13, wherein the first inductor of the matching network comprises an on-chip spiral line.
15. The mobile device of claim 14, wherein the matching network further comprises a second inductor coupled in between the output port of the matching network and an input port of the RF receiver so the second inductor resonates at a third predetermined resonant frequency with parasitic capacitances seen at the input port of the RF receiver.
16. The mobile device of claim 15, wherein the second inductor of the matching network comprises an on-chip spiral line.
20080280585 | November 13, 2008 | Chen |
20100109798 | May 6, 2010 | Chu |
20120063555 | March 15, 2012 | Pullela |
20140253242 | September 11, 2014 | Youssef |
Type: Grant
Filed: May 15, 2018
Date of Patent: Aug 13, 2019
Assignees: SPEEDLINK TECHNOLOGY INC. (Cupertino, CA), GEORGIA TECH RESEARCH CORPORATION (Atlanta, GA)
Inventors: Min-Yu Huang (Atlanta, GA), Hua Wang (Atlanta, GA), Thomas Chen (Atlanta, GA), Taiyun Chi (Atlanta, GA)
Primary Examiner: Kevin Kim
Application Number: 15/980,449
International Classification: H04B 1/48 (20060101); H04B 1/44 (20060101); H01Q 1/24 (20060101); H01Q 13/20 (20060101); H04L 25/02 (20060101); H04L 27/00 (20060101);