Patents by Inventor Min-Chul Sun
Min-Chul Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240121924Abstract: A water-cooled heat dissipation module assembly capable of cooling a power module of a vehicle driving inverter system using a battery or fuel cell. The water-cooled heat dissipation module assembly includes a housing unit provided in the form of a housing having an opening portion at least partially opened at one side thereof. The housing unit and at least a part of a rim region of the cooling unit are made of a plastic material, and the housing unit and the cooling unit are joined to each other by plastic welding using a laser.Type: ApplicationFiled: August 4, 2022Publication date: April 11, 2024Inventors: Kwan Ho RYU, Jeong Keun LEE, Min Woo LEE, Ju Hyun SUN, Tae Keun PARK, Kang Wook PARK, Lee Cheol JI, Hyeok Chul YANG, Tae Heon KIM, Keun Jae LEE
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Publication number: 20240047275Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.Type: ApplicationFiled: October 20, 2023Publication date: February 8, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Min-Chul SUN, Myeong-Cheol KIM, Kyoung-Sub SHIN
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Publication number: 20240047521Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.Type: ApplicationFiled: October 17, 2023Publication date: February 8, 2024Inventors: Min-Chul SUN, Dae Won HA, Dong Hoon HWANG, Jong Hwa BAEK, Jong Min JEON, Seung Mo HA, Kwang Yong YANG, Jae Young PARK, Young Su CHUNG
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Patent number: 11830775Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.Type: GrantFiled: March 18, 2022Date of Patent: November 28, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Min-Chul Sun, Myeong-Cheol Kim, Kyoung-Sub Shin
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Patent number: 11830911Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.Type: GrantFiled: February 1, 2023Date of Patent: November 28, 2023Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
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Publication number: 20230178595Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.Type: ApplicationFiled: February 1, 2023Publication date: June 8, 2023Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
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Patent number: 11575002Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.Type: GrantFiled: March 25, 2021Date of Patent: February 7, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
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Publication number: 20220208616Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.Type: ApplicationFiled: March 18, 2022Publication date: June 30, 2022Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Min-Chul SUN, Myeong-Cheol KIM, Kyoung-Sub SHIN
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Patent number: 11302585Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.Type: GrantFiled: March 6, 2020Date of Patent: April 12, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Min-Chul Sun, Myeong-Cheol Kim, Kyoung-Sub Shin
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Publication number: 20210233995Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.Type: ApplicationFiled: March 25, 2021Publication date: July 29, 2021Inventors: Min-Chul SUN, Dae Won HA, Dong Hoon HWANG, Jong Hwa BAEK, Jong Min JEON, Seung Mo HA, Kwang Yong YANG, Jae Young PARK, Young Su CHUNG
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Patent number: 10964782Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.Type: GrantFiled: December 16, 2019Date of Patent: March 30, 2021Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
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Publication number: 20200211907Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.Type: ApplicationFiled: March 6, 2020Publication date: July 2, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Min-Chul Sun, Myeong-Cheol KIM, Kyoung-Sub SHIN
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Publication number: 20200119143Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.Type: ApplicationFiled: December 16, 2019Publication date: April 16, 2020Inventors: Min-Chul SUN, Dae Won HA, Dong Hoon HWANG, Jong Hwa BAEK, Jong Min JEON, Seung Mo HA, Kwang Yong YANG, Jae Young PARK, Young Su CHUNG
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Patent number: 10615080Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.Type: GrantFiled: September 27, 2018Date of Patent: April 7, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Min-Chul Sun, Myeong-Cheol Kim, Kyoung-Sub Shin
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Patent number: 10529801Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.Type: GrantFiled: March 23, 2018Date of Patent: January 7, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
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Publication number: 20190096993Abstract: A semiconductor device including a device isolation region is provided. The semiconductor device includes first active regions disposed on a substrate, and an isolation region between the active regions. The isolation region includes a first portion formed of a first insulating material, and a second portion formed of a second insulating material, having different characteristics from those of the first insulating material. The first portion is closer to the first active regions than the second portion. The second portion has a bottom surface having a height different from that of a bottom surface of the first portion.Type: ApplicationFiled: March 23, 2018Publication date: March 28, 2019Inventors: Min-Chul Sun, Dae Won Ha, Dong Hoon Hwang, Jong Hwa Baek, Jong Min Jeon, Seung Mo Ha, Kwang Yong Yang, Jae Young Park, Young Su Chung
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Publication number: 20190027411Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.Type: ApplicationFiled: September 27, 2018Publication date: January 24, 2019Inventors: Min-Chul SUN, Myeong-Cheol KIM, Kyoung-Sub SHIN
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Patent number: 10109532Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.Type: GrantFiled: July 25, 2017Date of Patent: October 23, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Min-Chul Sun, Myeong-Cheol Kim, Kyoung-Sub Shin
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Publication number: 20180254219Abstract: In a method of manufacturing a semiconductor device, first to third active fins are formed on a substrate. Each of the first to third active fins extends in a first direction, and the second active fin, the first active fin, and the third active fin are disposed in this order in a second direction crossing the first direction. The second active fin is removed using a first etching mask covering the first and third active fins. The third active fin is removed using a second etching mask covering the first active fin and a portion of the substrate from which the second active fin is removed. A first gate structure is formed on the first active fin. A first source/drain layer is formed on a portion of the first active fin adjacent the first gate structure.Type: ApplicationFiled: July 25, 2017Publication date: September 6, 2018Inventors: Min-Chul SUN, Myeong-Cheol KIM, Kyoung-Sub SHIN
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Patent number: 10014219Abstract: A semiconductor device includes a structure on a substrate and a plurality of gate-all-around devices on the structure. The structure includes a plurality of sacrificial layers and a plurality of active layers alternately stacked on one another. The sacrificial layers have different widths and the active layers have different widths to form multiple stepped layers on the substrate. The gate-all-around devices are on respective ones the multiple stepped layers.Type: GrantFiled: February 24, 2017Date of Patent: July 3, 2018Assignees: Samsung Electronics Co., Ltd., Seoul National University R & DB FoundationInventors: Min-Chul Sun, Byung-Gook Park