Patents by Inventor Mineo Shimotsusa

Mineo Shimotsusa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190259788
    Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.
    Type: Application
    Filed: April 30, 2019
    Publication date: August 22, 2019
    Inventor: Mineo Shimotsusa
  • Publication number: 20190252458
    Abstract: A solid-state imaging device includes: a first semiconductor substrate including a photoelectric conversion element; and a second semiconductor substrate including at least a part of a peripheral circuit arranged in a main face of the second semiconductor substrate, the peripheral circuit generating a signal based on the charge of the photoelectric conversion element, a main face of the first semiconductor substrate and the main face of the second semiconductor substrate being opposed to each other with sandwiching a wiring structure therebetween; a pad to be connected to an external terminal; and a protection circuit electrically connected to the pad and to the peripheral circuit, wherein the protection circuit is arranged in the main face of the second semiconductor substrate.
    Type: Application
    Filed: April 24, 2019
    Publication date: August 15, 2019
    Inventors: Masahiro Kobayashi, Mineo Shimotsusa
  • Publication number: 20190198537
    Abstract: A manufacturing method includes a first process for forming a first gate electrode for a first MOS transistor and a second gate electrode for a second MOS transistor on a substrate including a semiconductor region defined by an insulator region for element isolation, a second process for masking a portion located above the semiconductor region of the first gate electrode to introduce an impurity to a source-drain region of the first MOS transistor, and a third process for forming a first conductor member being in contact with the portion of the first gate electrode through a first hole disposed on an insulator member covering the substrate and a second conductor member being in contact with the second gate electrode through a second hole disposed on the insulator member.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 27, 2019
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Yusuke Onuki, Nobuaki Kakinuma, Masato Fujita
  • Patent number: 10325948
    Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: June 18, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mineo Shimotsusa
  • Patent number: 10304899
    Abstract: A solid-state imaging device includes: a first semiconductor substrate including a photoelectric conversion element; and a second semiconductor substrate including at least a part of a peripheral circuit arranged in a main face of the second semiconductor substrate, the peripheral circuit generating a signal based on the charge of the photoelectric conversion element, a main face of the first semiconductor substrate and the main face of the second semiconductor substrate being opposed to each other with sandwiching a wiring structure therebetween; a pad to be connected to an external terminal; and a protection circuit electrically connected to the pad and to the peripheral circuit, wherein the protection circuit is arranged in the main face of the second semiconductor substrate.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: May 28, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Mineo Shimotsusa
  • Publication number: 20190157335
    Abstract: A semiconductor apparatus includes a conductive member penetrating through a first semiconductor layer, a first insulator layer, and a third insulator layer, and connecting a first conductor layer with a second conductor layer. The conductive member has a first region containing copper, and a second region containing a material different from the copper is located at least between a first region and the first semiconductor layer, between the first region and the first insulator layer, and between the first region and the third insulator layer. A diffusion coefficient of the copper to a material is lower than a diffusion coefficient of the copper to the first semiconductor layer and a diffusion coefficient of the copper to the first insulator layer.
    Type: Application
    Filed: January 25, 2019
    Publication date: May 23, 2019
    Inventor: Mineo Shimotsusa
  • Publication number: 20190148446
    Abstract: A solid-state image pickup device capable of suppressing the generation of dark current and/or leakage current is provided. The solid-state image pickup device has a first substrate provided with a photoelectric converter on its primary face, a first wiring structure having a first bonding portion which contains a conductive material, a second substrate provided with a part of a peripheral circuit on its primary face, and a second wiring structure having a second bonding portion which contains a conductive material. In addition, the first bonding portion and the second bonding portion are bonded so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. Furthermore, the conductive material of the first bonding portion and the conductive material of the second bonding portion are surrounded with diffusion preventing films.
    Type: Application
    Filed: January 8, 2019
    Publication date: May 16, 2019
    Inventor: Mineo Shimotsusa
  • Patent number: 10263029
    Abstract: A manufacturing method includes a first process for forming a first gate electrode for a first MOS transistor and a second gate electrode for a second MOS transistor on a substrate including a semiconductor region defined by an insulator region for element isolation, a second process for masking a portion located above the semiconductor region of the first gate electrode to introduce an impurity to a source-drain region of the first MOS transistor, and a third process for forming a first conductor member being in contact with the portion of the first gate electrode through a first hole disposed on an insulator member covering the substrate and a second conductor member being in contact with the second gate electrode through a second hole disposed on the insulator member.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: April 16, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Yusuke Onuki, Nobuaki Kakinuma, Masato Fujita
  • Patent number: 10229948
    Abstract: A semiconductor apparatus includes a conductive member penetrating through a first semiconductor layer, a first insulator layer, and a third insulator layer, and connecting a first conductor layer with a second conductor layer. The conductive member has a first region containing copper, and a second region containing a material different from the copper is located at least between a first region and the first semiconductor layer, between the first region and the first insulator layer, and between the first region and the third insulator layer. A diffusion coefficient of the copper to a material is lower than a diffusion coefficient of the copper to the first semiconductor layer and a diffusion coefficient of the copper to the first insulator layer.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: March 12, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mineo Shimotsusa
  • Publication number: 20190068903
    Abstract: Provided is a solid-state imaging apparatus, including pixels each including: a photoelectric conversion unit; a charge accumulation unit; a transistor including a control electrode; a waveguide; and a light-shielding portion. The waveguide includes an incident portion and an output portion, the light-shielding portion includes a first portion that covers the control electrode of the transistor and a second portion that covers a part of the photoelectric conversion unit, the output portion and the photoelectric conversion unit are arranged with an interval therebetween, the interval between the output portion and the photoelectric conversion unit is larger than an interval between a lower end of the second portion of the light-shielding portion and the photoelectric conversion unit, and the interval between the output portion and the photoelectric conversion unit is smaller than an interval between an upper end of the second portion of the light-shielding portion and the photoelectric conversion unit.
    Type: Application
    Filed: October 25, 2018
    Publication date: February 28, 2019
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Masahiro Kobayashi, Kazunari Kawabata, Takeshi Ichikawa
  • Patent number: 10217786
    Abstract: A solid-state image pickup device capable of suppressing the generation of dark current and/or leakage current is provided. The solid-state image pickup device has a first substrate provided with a photoelectric converter on its primary face, a first wiring structure having a first bonding portion which contains a conductive material, a second substrate provided with a part of a peripheral circuit on its primary face, and a second wiring structure having a second bonding portion which contains a conductive material. In addition, the first bonding portion and the second bonding portion are bonded so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. Furthermore, the conductive material of the first bonding portion and the conductive material of the second bonding portion are surrounded with diffusion preventing films.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: February 26, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mineo Shimotsusa
  • Patent number: 10158817
    Abstract: Provided is a solid-state imaging apparatus, including pixels each including: a photoelectric conversion unit; a charge accumulation unit; a transistor including a control electrode; a waveguide; and a light-shielding portion. The waveguide includes an incident portion and an output portion, the light-shielding portion includes a first portion that covers the control electrode of the transistor and a second portion that covers a part of the photoelectric conversion unit, the output portion and the photoelectric conversion unit are arranged with an interval therebetween, the interval between the output portion and the photoelectric conversion unit is larger than an interval between a lower end of the second portion of the light-shielding portion and the photoelectric conversion unit, and the interval between the output portion and the photoelectric conversion unit is smaller than an interval between an upper end of the second portion of the light-shielding portion and the photoelectric conversion unit.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: December 18, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Masahiro Koboyashi, Kazunari Kawabata, Takeshi Ichikawa
  • Publication number: 20180301483
    Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.
    Type: Application
    Filed: June 21, 2018
    Publication date: October 18, 2018
    Inventor: Mineo Shimotsusa
  • Patent number: 10038023
    Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: July 31, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mineo Shimotsusa
  • Patent number: 10026774
    Abstract: A method of manufacturing a solid-state image sensor including preparing a wafer including a pixel region where a photoelectric conversion element is provided, a peripheral circuit region where a gate electrode of a peripheral MOS transistor for constituting a peripheral circuit is provided, and a scribe region. The method includes forming an insulating film covering the pixel region, the peripheral circuit region, and the scribe region, and forming a sidewall spacer on a side surface of the gate electrode by etching the insulating film so that portions of the insulating film remains to cover the pixel region and the scribe region, and forming a metal silicide layer in the peripheral circuit region by using, as a mask for protection from silicidation, the insulating film covering the pixel region and the scribe region.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: July 17, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yusuke Onuki, Masatsugu Itahashi, Nobuaki Kakinuma, Mineo Shimotsusa, Masato Fujita, Takumi Ogino, Keita Torii
  • Publication number: 20180166494
    Abstract: A solid-state image pickup device capable of suppressing the generation of dark current and/or leakage current is provided. The solid-state image pickup device has a first substrate provided with a photoelectric converter on its primary face, a first wiring structure having a first bonding portion which contains a conductive material, a second substrate provided with a part of a peripheral circuit on its primary face, and a second wiring structure having a second bonding portion which contains a conductive material. In addition, the first bonding portion and the second bonding portion are bonded so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. Furthermore, the conductive material of the first bonding portion and the conductive material of the second bonding portion are surrounded with diffusion preventing films.
    Type: Application
    Filed: February 12, 2018
    Publication date: June 14, 2018
    Inventor: Mineo Shimotsusa
  • Publication number: 20180138227
    Abstract: A photoelectric conversion device includes a first semiconductor substrate including a photoelectric conversion unit for generating a signal charge in accordance with an incident light, and a second semiconductor substrate including a signal processing unit for processing an electrical signal on the basis of the signal charge generated in the photoelectric conversion unit. The signal processing unit is situated in an orthogonal projection area from the photoelectric conversion unit to the second semiconductor substrate. A multilayer film including a plurality of insulator layers is provided between the first semiconductor substrate and the second semiconductor substrate. The thickness of the second semiconductor substrate is smaller than 500 micrometers. The thickness of the second semiconductor substrate is greater than the distance from the second semiconductor substrate and a light-receiving surface of the first semiconductor substrate.
    Type: Application
    Filed: December 20, 2017
    Publication date: May 17, 2018
    Inventors: Mineo Shimotsusa, Takeshi Ichikawa, Yasuhiro Sekine
  • Publication number: 20180131885
    Abstract: Provided is a solid-state imaging apparatus, including pixels each including: a photoelectric conversion unit; a charge accumulation unit; a transistor including a control electrode; a waveguide; and a light-shielding portion. The waveguide includes an incident portion and an output portion, the light-shielding portion includes a first portion that covers the control electrode of the transistor and a second portion that covers a part of the photoelectric conversion unit, the output portion and the photoelectric conversion unit are arranged with an interval therebetween, the interval between the output portion and the photoelectric conversion unit is larger than an interval between a lower end of the second portion of the light-shielding portion and the photoelectric conversion unit, and the interval between the output portion and the photoelectric conversion unit is smaller than an interval between an upper end of the second portion of the light-shielding portion and the photoelectric conversion unit.
    Type: Application
    Filed: January 4, 2018
    Publication date: May 10, 2018
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Masahiro Koboyashi, Kazunari Kawabata, Takeshi Ichikawa
  • Publication number: 20180128677
    Abstract: A photoelectric conversion apparatus according to one aspect of the present invention includes a first substrate including a photoelectric conversion region and a surrounding region, and a second substrate including a circuit for processing a signal from the photoelectric conversion region, and overlapping the first substrate. In this case, the circuit for processing a signal from the photoelectric conversion region includes a first circuit and a second circuit with a higher drive frequency than that of the first circuit. In an orthogonal projection, the second circuit is only provided in the photoelectric conversion region.
    Type: Application
    Filed: January 8, 2018
    Publication date: May 10, 2018
    Inventors: Mineo Shimotsusa, Koichiro Iwata
  • Publication number: 20180130847
    Abstract: A solid-state imaging device includes: a first semiconductor substrate including a photoelectric conversion element; and a second semiconductor substrate including at least a part of a peripheral circuit arranged in a main face of the second semiconductor substrate, the peripheral circuit generating a signal based on the charge of the photoelectric conversion element, a main face of the first semiconductor substrate and the main face of the second semiconductor substrate being opposed to each other with sandwiching a wiring structure therebetween; a pad to be connected to an external terminal; and a protection circuit electrically connected to the pad and to the peripheral circuit, wherein the protection circuit is arranged in the main face of the second semiconductor substrate.
    Type: Application
    Filed: January 11, 2018
    Publication date: May 10, 2018
    Inventors: Masahiro Kobayashi, Mineo Shimotsusa